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NXP Launches Cortex M0+ LPC800 MCU and $15 LPC812-LPCXpresso Board

November 14th, 2012 Leave a comment Go to comments

Following ARM Cortex M0+ announcement in March 2012, NXP Semiconductors has just announced the LPC800, tiny 32-bit MCUs based on Cortex M0+ core @ 30 MHz designed to replace 8-bit MCUs, together with LPCXpresso development board for the LPC800. The MCUs come with 1 to 4KB SRAM, 4 to 16 KB Flash, several serial interfaces and are available in SO20, TSSOP20, TSSOP16 and even DIP8 packages.

LPC800 in SO20, TSSOP20, TSSOP16 and DIP8 packagesHere are the key features of NXP new ultra low power 32-bit MCU family:

  • ARM Cortex-M0+processor up to 30 MHz, software compatible with Cortex M0, M3 and M4 cores
  • Memories:
    • 4 to 16 kB Flash (with 64 Byte page size)
    • 1 to 4 kB SRAM
  • Serial Peripherals:
    • Up to 3 USART interfaces
    • Up to 2 SPI controllers
    •  1x I2C-bus interface
  • Timers:
    • Multiple-channel multi-rate timer (MRT)
    • State Configurable Timer (SCT)
    • Self Wake-up Timer (WKT) clocked from either the IRC or a low-power clock source
    • Windowed Watchdog timer (WWDT)
    • System tick timer
  • Analog peripherals – Comparator with external voltage reference
  • I/O:
    • Switch matrix for flexible configuration of each I/O pin function
    • Up to 18 General-Purpose I/O (GPIO) pins
    • GPIO interrupt generation capability with boolean pattern-matching capability
    • Digital glitch filter with programmable time constant
  • Clock Generation Unit:
    • 12 MHz internal RC oscillator trimmed to 1% accuracy
    • Crystal oscillator with an operating range of 1 MHz to 25 MHz
    • Programmable watchdog oscillator
    •  10 kHz low-power oscillator for the WKT.
    •  PLL allows max CPU rate without a high-frequency crystal.
  • Other:
    • ROM drivers for I2C, USART, power profiles, ISP ((In-System Programming), and IAP (In-Application Programming)
    • Easy to use low pin-count TSSOP and DIP packages
    • CRC engine
    • Single VDD power supply (1.8 V to 3.6 V)

NXP LPC800 Block Diagram

NXP has re-designed serial peripherals in order to be as power efficiency as possible. For example, the new SPI interface can operate at frequencies independent of the processor clock,  avoiding the need to over-sample 4-to-n times the SPI just to receive data.  I2C has also been modified to allow the MCU core to operate at at near-zero power consumption (even without a system clock) and wake up upon an (I2C) address match.

The LPC800 provides driver-free operations, and drivers for I2C and UART do not take up Flash space anymore, and those interfaces can simply be controlled via API calls. The same is true for power management.

There are 6 LCP800 micro-controllers in the family.

LPC800 Part Numbers

NXP LPC810, LPC811 and LPC812 Features Comparison

For evaluation and early development, NXP provides the LPC812-LPCXpresso demo board (OM13053) featuring the top of the range LPC812 MCU with 4 kB SRAM, 16 kB Flash and lots of peripherals and GPIOs (The last MCU in the table above), 3 LEDs and a potentiometer. It is connected to the LPCLINK board that allows programming and debugging via USB.

LPC812-LPCXpresso (Left: LPC-Link; Right: Target Board)

You can watch the video below for an introduction to the demo board, and development tools.

Programming can be done with LPCXpresso, a free Eclipse-based IDE, ARM Keil Microcontroller Development Kit or IAR Embedded Workbench. Support, free tools, and sample code are available from the LPC developer community.

LPC810 price starts at $0.39 USD (supposedly for DIP8 package and a massive order) and LPC800 evaluation kit can be pre-ordered for $15 from Mouser Electronics with final product availability starting in February 2013.

Further information is available on NXP LPC 800 page, LPC8120LPCXpresso demo board page and a surprisingly informative and well formatted press release.

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