Imperas Releases ARM Cortex A53 & A57 Open Source Models for OVPsim

Since the end of 2012, it has been possible to use ARM 64-bit Fast models to run code compiled for the new ARMv8 architecture by emulating a 64-bit ARM processor inside an Intel / AMD processor. ARM fast models are not the only “free” option anymore, as Imperas has released OVPsim 20140430 with open source models for ARM Cortex A53 and Cortex A57 cores. OVPsim is a virtual platform that’s available free of charge for personal usage. The simulator itself (OVPsim) is closed source, but processor, peripheral and platform models are released under the Apache License version 2.0.

Open Virtual Platform Architecture with SystemC
Open Virtual Platform using SystemC Environment

OVP models of the ARM Cortex-A53 and Cortex-A57 are fully instruction accurate models, and you can use them for personal with an additional free license key, but if you want to make use of advanced features such as TrustZone and hardware virtualization you’ll need to purchase a commercial version (Imperas Developer or Imperas Advanced Multicore Software Development Kit).

OVPsim is available both for Windows and Linux, and I’ve given it a try in Ubuntu 14.04. The whole process is not as enjoyable as it could be due to registration and licensing requirements. Here’s what I’ve managed to do so far:

  1. Register or login to ovpworld.org
  2. Go to the Download page to download  OVPsim Fast Simulator, the ARM Cortex A models and OVPsim_demo_arm_ARMv8 (single and multi- core demos for Cortex A53 and Cortex A57). You can also find other models, demos, as well as documentation there. You may especially want to download Imperas_Installation_and_Getting_Started.pdf.
  3. Install OVPsim

    You’ll need a accept the software license to complete the installation. I will create Imperas.20140430 directory by default.
  4. Configure OVPsim
  5. Get a license key. The hostid & hostname correspond to your  MAC address and hostname that you can retrieve with /sbin/ifconfig and hostname commands. Email to [email protected] to request a license key for ARMv8 models.
  6. Copy the license keys, you’ve received to $IMPERAS_HOME/OVPsim.lic
  7. Install the ARM models (Cortex A, R, and

    Accept the license agreement to go ahead with the installation.
  8. Install the Cortex A53 and A57 demos (binary and source code).

    You’ll need to accept another license agreement…
  9. You should now be able to go to Imperas.20140430/Demo, and go inside OVPsim_arm_Cortex-A53, OVPsim_manycore_arm_Cortex-A53, OVPsim_arm_Cortex-A57, and OVPsim_manycore_arm_Cortex-A57 to try various demos: linpack, dhrystone, peakSpeed2, fibonacci, and more.

At the time of writing, I’ve only received my standard OVPsim license key, and I’m still waiting for my ARMv8 license key, so I haven’t been able to try it successfully yet, and I get the following error:

Fatal (LIC) No such feature exists.
Feature:       IMP_MODEL_ARMv8
License path:  /home/jaufranc/edev/sandbox/Imperas.20140430/OVPsim.lic:
FLEXnet Licensing error:-5,357

If you want to check out the source, it is located in Imperas.20140430/ImperasLib/source/arm.ovpworld.org/ for processors, peripherals, and platforms. It’s a bunch of hpp files written using SystemC TLM 2, a set of C+ classes or macros used for virtual platform modeling.

You can find more information about OVPSim and various models on ovpworld.org.

[Update: I’ve finally received the IMP_MODEL_ARMv8 license by email, and tried a few tests from a single core Cortex A53 to a 24-core Cortex A57 model.  I’ve also been told the Linux kernel can’t boot on the model right now, but will for next release

Here’s the output for Dhrystone test on a single Cortex A53 core:

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