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Posts Tagged ‘arm’

Linaro 14.12 Release with Linux 3.18 and Android 5.0

December 19th, 2014 No comments

Linaro usually releases images and source code on the last Thursday of the month, but since most people will have long holidays for Chritsmas and New Year, the last working Thrusday of this month was yesterday (18th). Linaro 14.12 release includes Linux kernel 3.18 (baseline), Linux 3.10.62 & 3.14.26 (LSK, same versions as last month), and Android 5.0.1 Lollipop.

Here are the highlights of this release:

  • Linux Linaro 3.18-2014.12
    • Based on v3.18 release
    • GATOR topic: version 5.20
    • updated topic from Qualcomm LT (includes IFC6410 board support)
    • updated integration-linaro-vexpress64 topic by ARM LT (FVP Base and Foundation models, and Juno support)
    • updated LLVM topic (uses the community llvmlinux-latest branch)
    • included ILP32 patch set v3  rebased on 3.18. Boot tested with aarch64 userland. Work is in progress to test with aarch64-ilp32 userland.
    • config fragments updated – SELinux related config options enabled in linaro-base.conf, device tree runtime self tests enabled in distribution.conf
  • Linaro builds of AOSP 14.12
    • built with AOSP toolchain
    • All the Android builds have been updated to 5.0.1
    • Audio on Versatile Express TC2 is fixed (Android 5.0.1)
    • DNS issue fixed on Juno, FVP models and Versatile Express TC2 (Android 5.0.1)
    • daily CI updated to include benchmarks for Versatile Express TC2 and Juno
  • Linaro OpenEmbedded 2014.12
    • integrated Linaro GCC 4.9-2014.11 and Linaro binutils 2.24-2014.11
    • switched from eglibc to Linaro glibc 2.20-2014.11
    • improved external toolchain support
    • improved ACPI tooling
    • added python-numpy to images for LAVA tests
    • upstreaming:
  • Linaro Ubuntu 14.12 – updated packages: juno-pre-boot, LSK 3.10.62/3.14.26 and linux-linaro 3.18 kernels
  • CI loop for testing the pre-built Linaro toolchain using the OpenEmbedded external toolchain support has been reactivated
  • ARMv8 Ubuntu engineering build for Enterprise is available
  • CI bring up: HiSilicon Hi3716cv200
  • CI bring up: EAS (Energy Aware Scheduling) development – integration branch testing
  • Publish OpenSDK images on snapshots.linaro.org
  • Ship board recovery image into hwpack for Juno

You can visit https://wiki.linaro.org/Cycles/1412/Release for a list of known issues, and further release details about the LEB, LMB (Linaro Member Builds), and community builds, as well as Android, Kernel, Graphics, Multimedia, Landing Team, Platform, Power management and Toolchain components.

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Linux 3.18 Released

December 10th, 2014 2 comments

Linus Torvalds released Linux Kernel 3.18 last Sunday:

It’s been a quiet week, and the patch from rc7 is tiny, so 3.18 is out.

I’d love to say that we’ve figured out the problem that plagues 3.17 for a couple of people, but we haven’t. At the same time, there’s absolutely no point in having everybody else twiddling their thumbs when a couple of people are actively trying to bisect an older issue, so holding up the release just didn’t make sense. Especially since that would just have then held things up entirely over the holiday break.

So the merge window for 3.19 is open, and DaveJ will hopefully get his bisection done (or at least narrow things down sufficiently that we have that “Ahaa” moment) over the next week. But in solidarity with Dave (and to make my life easier too ;) let’s try to avoid introducing any _new_ nasty issues, ok?

Linus

Linux 3.17 added support for Xbox One controllers, USB device sharing over IP, more secure random numbers, several modifications for perf and more.

Some of the changes made to Linux 3.18 include:

  • Performance improvements for the networking stack thanks to bulk network packet transmission, which “allows a relatively small system to drive a high-speed interface at full wire speed, even when small packets are being transmitted.”
  • Faster suspend and resume by replacing a 100ms polling loop with proper completion notification. This will mostly be noticeable on systems with a large number of cores. Git pull.
  • Berkeley Packet Filter bpf() system call. “The hooks to use this code (in tracing and packet filtering, for example) will take a little longer, but the core support for a “universal virtual machine” in the kernel is now present.”
  • Nouveau drivers for Nvidia GPUs now supports basic DisplayPort audio
  • Several filesystems improvements, notably for BTRFS and F2FS
  • Audio hardware. Codecs: Cirrus Logic CS35L32, Everest ES8328 and Freescale ES8328; others: Generic Freescale sound cards, Analog Devices SSM4567 audio amplifier

New features and improvements specific to the ARM architecture include:

  • Allwinner
    • Allwinner A31/A23 –  RTC  & Watchdog
    • Allwinner A23 – MMC, pinctrl, DMA and I2C
    • New boards: Olimex A20-OLinuXino-Lime, Merrii Hummingbird A20, and HSG H702 tablet board.
  • Rockchip
    • Added new clock-type for the cpuclk
    • Ethernet: Added support for Rockchip SoC layer device tree bindings for arc-emac driver, and emac nodes to the rk3188 device tree.
    • Added driver for Rockchip Successive Approximation Register (SAR) ADC.
    • RK808 PMIC: Added regulator driver, clkout driver, and mfd driver.
  • Amlogic – Added MesonX support, only Meson6 for now (Amlogic AML8726-MX). DTS for Geniatech ATV1200 media player
  • Added basic support for BCM63138 DSL SoC, Texas Instruments AM57xx family, Atmel SAMA5D4, Qualcomm IPQ8064, Renesas r8a7794 SoC,
  • New Device tree files for various board and products: Gateworks GW5520, SAMA5D4ek board,  i.MX1 Armadeus APF9828, i.MX1 ADS board, Technexion Thunder support (TAO3530 SOM based, Sony Xperia Z1, IFC6540 board, CM-QS600 SoM,  etc…

I could find a few changes for MIPS architecture in Linux 3.18 too:

  • SEAD3: Nuke PIC32 I2C driver.
  • Loongson: Make platform serial setup always built-in
  • Netlogic: handle modular USB case & AHCI builds
  • tlbex: Fix potential HTW race on TLBL/M/S handlers
  • cpu-probe: Set the FTLB probability bit on supported cores
  • fix EVA & non-SMP non-FPU FP context signal handling
  • Etc.. You can find a few more changes @ http://lwn.net/Articles/623825/

A more thorough changelog for Linux 3.18 will soon be published on Kernelnewbies.org. Remember to also check ARM architecture and drivers sections, for more details about changes related to ARM platforms.

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Fujitsu MB86S70 and MB86S73 ARM Cortex A15 & A7 Processors Run Linux for the Embedded Market

November 28th, 2014 1 comment

I like to check the ARM Linux kernel mailing list from time to time, as you may discover a few upcoming ARM processors. This week I found out Exynos 5433 and Exynos 7 are actually two different processors (thanks David!), and that AMD had submitted code for their 64-bit ARM Opteron A1100 SoC for servers. I also noticed a patchset for Fujitsu MB86S7X SoCs, and since I don’t often mention Japanese silicon vendors, probably because they now mainly deal mostly with the embedded market that gets very little press, and most information is in Japanese, I decide to have a look.

Fujitsu MB86S70 Block Diagram

Fujitsu MB86S70 Block Diagram

There seems to be four SoC parts in MB86S7x family with MB86S70 quad core processor with two ARM Cortex A15 and two ARM Cortex A7 cores in big.LITTLE configuration, and MB86S73 with two ARM Cortex A7 cores only, as well as MB86S71/72 with 2x A15 and 2x A7, with all featuring a single or quad core Mali-T624 GPU.

Fujitsu provided a comparison tables for both MB86S70 and MB86S73 processors in English, but there’s very little info about MB86S71/72 SoCs.

Block Function MB86S70 MB86S73
CSS
DMC
CPU Cortex-A15
2 cores Up to 2.4GHz 1MB-L2C
-
CPU Cortex-A7
2 cores up to 800MHz 256k-L2C
Cortex-A7
2 cores up to 1.2GHz 512k-L2C
3D/GPGPU Mali-T624
4 cores @ 400MHz 128k-L2C
Mali-T624
1 core @400MHz 32k-L2C
MEMC 2-ch DDR3-1.333Gbps 32bit 1-ch DDR3-1.333Gbps 64bit
SCB CPU ARM Cortex M3 @ 125MHz ARM Cortex M3 @ 125MHz
LAN GbE, WoL, TCP Acceleration GbE, WoL, TCP Acceleration
FLASH-IF HSSPI, NOR, eMMC, NAND
SecureBoot (SROM/NOR)
HSSPI, NOR, eMMC, NAND
SecureBoot (SROM/NOR)
SERIAL-IF 3x UART, 16x GPIO, 10x I2C 3x UART, 16 GPIO, 3x I2C
MPB CODEC 1080p Multi Encode, 4 stream H.264 Decode
32k × 32k JPEG CODEC
32k × 32k JPEG CODEC
Display HDMI-1.4a HDCP
MIPI-DSI 1Gbps-4Lane
LVDS (CLK 1ch / data 4ch)
CAPTURE 1-ch RBG/YUV 720p capture only -
TSIF 2 serial TS Demux -
AUDIO 2-ch I2S (I/O Independent) + 4ch
I2S (HDMI)
2-ch I2S (I/O Independent)
SD 1-ch SDIO UHS-I 1ch SDIO UHS-I
HSIOB PCIe 2-ch PCIe-Gen2-4Lane + Data Scrambler 2-ch PCIe-Gen2-4Lane + Data Scrambler
USB USB3 Host 2ch USB3 Host
USB USB2 HDC 1ch USB2 Host, 1ch USB2 Device

MB86S70 is the more powerful of the two, not only when it comes with CPU power, but also with regards to multimedia capabilities with 1080p encode, and 4-k encode, TS demux, and RGB/YUV 720p video capture, whereas MB86S73 does not seem to support hardware video decoding / encoding at all, providing only JPEG acceleration, and an LVDS interface, so it’s mostly probably desinted to be used in control panels for example. Both processors however feature high-speed interfaces like USB 3.0 host, Ggiabit Ethernet, and PCI-E interface, the latter being not so common in ARM SoCs, and only found in a few products like Freescale i.MX6 and Tegra K1 SoCs.

Fujitsu MB86S73 Block Diagram

Fujitsu MB86S73 Block Diagram

The company also provides evaluation boards for their two processors, together with a software development platform based on Linux with support for OpenGL, OpenCL, and OpenMAX for graphics and video decoding, and they’ve also started getting some code to mainline kernel.

MB86S70 (Left) and MB86S73 (Right) Evaluation Kits (Click to Enlarge)

MB86S70 (Left) and MB86S73 (Right) Evaluation Kits (Click to Enlarge)

More information is available in Japanese only on Fujitsu’s Platform SoC page, and a presentation (PDF) made at Java Day Tokyo 2014.

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NXP Introduces LPC54100 Single & Dual Core Cortex M4F/M0+ MCU Family and LPCXpresso54102 Development Kit

November 11th, 2014 No comments

NXP has recently introduced LPC54100 Series microcontrollers with a Cortex-M4F core up to 100MHz, and optionally an ARM Cortex M0+ core for always-on sensor processing applications, as well as LPCXpresso 54102 board.  Typical applications include mobile, portable health and fitness, home and building automation, fleet management and asset tracking, robotics and gaming.

LCP5400_Block_DiagramKey features of LPC54100 series MCUs:

  • CPU – 32-bit ARM Cortex-M4F up to 100 MHz,  optional 32-bit ARM Cortex-M0+ coprocessor
  • On-chip RAM – 104 KB internal RAM
  • On-chip Storage – Up to 512 KB on-chip Flash
  • Interfaces
    • 3 fast-mode plus I²C, 4 UART, 2 SPI, 39 GPIO
    • ADC with up to 12-channels, 12 bits, and 4.8 Msps sample rate, full-spec (1.62 V to 3.6 V)
  • Clock Sources – IRC, digital clock input, PLL, 32 kHz XTAL, WWDT
  • Timers – 5x 32-bit general-purpose timers/counters, One-state configurable timer/PWM, RTC with alarm, and WWDT
  • 22-channel DMA with 20-programmable triggers
  • Power consumption
    • 3 µA continuous sensor listening (power-down with RAM retention)
    • Scalable active power/performance technology: Cortex-M0+ (55 µA/MHz) or Cortex-M4F (100 µA/MHz)
    • Four low-power modes and power profiles
  • Operating voltage – 1.62 V to 3.6 V
  • Temperature Range – -40 to 105°C
  • Packages – WLCSP49 (3.2 x 3.2 mm), LQFP64 (10 x 10 mm)

There are currently 8 MCUs in the family with single or dual core, with 256 to 512 KB flash, and different packages:

  • LPC54101J256UK49 – Cortex M4F only, with 256 KB flash, WLCSP49 package
  • LPC54101J512UK49 – Cortex M4F only, with 512 KB flash, WLCSP49 package
  • LPC54101J256BD64 – Cortex M4F only,  with 256 KB flash, LQFP64 package
  • LPC54101J512BD64 – Cortex M4F only,  with 512 KB flash, LQFP64 package
  • LPC54102J256UK49 – Cortex M4F & M0+, with 256 KB Flash, WLCSP49 package
  • LPC54102J512UK49 – Cortex M4F & M0+, with 512 KB Flash, WLCSP49 package
  • LPC54102J256BD64 – Cortex M4F & M0+, with 256 KB Flash, LQFP64 package
  • LPC54102J512BD64 – Cortex M4F & M0+, with 512 KB Flash, LQFP64 package

So LPC54101 are the part with only a Cortex M4F core, and LPC54102 feature both Cortex M4F and Cortex M0+ cores.

LPC54100 devices are supported by Keil MDK, IAR EWARM, and the NXP LPCXpresso IDE, a cross-platform C/C++ development suite that supports all of NXP’s LPC microcontrollers.
LPCXpresso 54102 Development Board

LPCXpresso 54102 Development Board

For evaluation and rapid prototyping, NXP also launched LPCXpresso54102 board with the following technical specifications:

  • MCU – LPC54102 with Cortex M4F + Cortex M0+ in LQFP64 package.
  • On-board high-speed USB based debug probe with CMSIS-DAP and LPCXpresso IDE Redlink protocol options, can debug on-board LPC54102 or external target
  • Support for external debug probes
  • Tri-color LED
  • Target Reset, ISP and WAKE buttons
  • Expansion options based on Arduino UNO and Pmod, plus additional expansion port pins
  • On-board 1.8/3.3V or external power supply options
  • Built-in MCU power consumption and supply voltage measurement
  • UART, I2C and SPI port bridging from LPC54102 target to usb via the on-board debug probe
  • FTDI UART connector
  • Dimensions – 123 x 59mm
The board is pre-programmed with CMSIS-DAP firmware. Drivers, libraries and FreeRTOS operating system can be downloaded @ http://www.lpcware.com/lpcopen.

The LPC54100 series will be available in Q1 2015, with pricing starting at USD $1.99 in 10K quantities. LPCXpresso 54102 evaluation board is available now for about $40 from DigiKey and Embedded Artists (Part number: OM13077). Further details are available on NXP LPC54100 series and LPCXpresso 54102 board product pages.

Via EETimes

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ARM Unveils Embedded Systems Education Kit Based on NXP LPC4088 Cortex M4 MCU

October 31st, 2014 5 comments

Following up on their first “Lab-In-a-Box” initiative based on Micro STM32F4-Discovery board and Wolfson audio card, ARM launched another low-cost toolkit, based on Embedded Artists LPC4088 QuickStart and Experiment boards, and called “Embedded Systems Education Kit”, to help university educators teach embedded systems design and programming concepts.

NXP_LPC4088_Devkit

LPC4088 QuickStart Board

The kit includes the following hardware, software tools, and teaching materials:

  • Embedded Artists LPC4088 QuickStart Board and LPC4088 Experiment Base Board
  • ARM Keil MDK-ARM Pro microcontroller development suite software licences
  • Complete teaching materials including lecture note slides, demonstration code and hands-on lab manuals with solutions in source for four embedded system courses:
    • ‘Efficient embedded systems design and programming’ teaches microcontroller fundamentals using NXP’s 32-bit ARM Cortex-M4 based LPC4088 microcontroller.
    • ‘Rapid embedded system design and programming’ delivers embedded systems design training for the high-level ARM mbed API
    • ‘OS design’ uses the royalty-free ARM Keil RTX RTOS to show how to design, program and optimize RTOS-based applications
    • ‘DSP’ teaches students about digital signal processing techniques and practice, especially for audio applications, using ARM Cortex-M4 based platforms.
NXP_LPC4088_Experiment_Board

LPC4088 Experiment Base Board

The education kit is available now for less than 20 Euros per student/per course, with all teaching materials provided free of charge to universities worldwide. Details can be found on ARM University Program website.

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ARM Unveils Mali-T800 Series GPUs, Mali-V550 VPU, and Mali-DP550 Display Processor

October 28th, 2014 3 comments

ARM has just announced several new Mali media IP: three Mali-T800 series GPUs (Mali-T820, Mali-T830, and Mali-T830) based on Midgard architecture, as well as Mali-V500 video accelerator, and the Mali-DP550 display processor.

ARM_Mali-T860_Mali-V550_Mali-DP550

Mali T800 Series GPU

The new Mali T-8xx GPUs are based on the same Midgard architecture used in Mali T-6xx and T-7xx GPUs, but deliver better power efficiency thanks to technologies such as ARM Frame Buffer Compression (AFBC), and Adaptive Scalable Texture Compression (ASTC) for imput bandwidth reduction, as well as Transaction Elimination and Smart Composition.

ARM provided some performance and energy-comparison between T800 and T600 series (but strangely nothing against T700):

  • The Mali-T820 GPU is optimized for entry-level products, achieving up to 40 percent more performance density compared to the Mali-T622 GPU.
  • The Mali-T830 GPU delivers up to 55 percent more performance than the Mali-T622 GPU.
  • The Mali-T860 GPU provides higher performance and 45 percent more energy-efficiency compared to the Mali-T628 GPU.

Mali-T860_GPU_Block_Diagram

Mali-T860 supports up to 16 shader cores whereas Mali-T820 and Mali T-830 are limited to 4 shader cores. Supported APIs include OpenGL ES 3.1/3.0/2.0/1.1, DirectX 11, OpenCL 1.2/1.1, and RenderScript. Mali-T860 also provides 10-bit YUV input and output at full speed, which could be especially useful for 4K video using HEVC codec.

More details can be found on Mali-T860, Mali-T830 and Mali-T820 product pages.

Mali-V550 Video Processing Unit

Mali-V550 video processor fully supports the HEVC standard, and the single core version can decode/encode 1080p60 HEVC video, whereas the eight core version can handle 4K @ 120 Hz HEVC decoding/encoding.

Mali-V550_VPU
Mali-V550 also benefits from new features such as Motion Search Elimination technology that reduces bandwidth by up to 35 percent, and will improve Wi-Fi Display/Miracast user experience. Up to 50% bandwidth reduction can also be achieve with AFBC. It also supports 10-bit YUV, so 10-bit HEVC/H.265 video be supported combined with Mali-T800 GPU, with the VPU “feeding” 10-bit decoded data to the GPU.  Other video codecs include the usual suspects, namely H.264, MPEG4, MPEG2, VP8, VC1, Real Media, H.263, MPEG-4 and JPEG. VP9 support is not mentioned. Driver and video streaming infrastructure is based on OpenMAX.

Visit Mali-V550 product page for more information.

Mali-DP550 Display Processor

Mali-DP550 display process will handle composition, scaling, rotation and image post-processing from the GPU in a single pass, and it also support Motion Search Elimination, and AFBC to reduce bandwidth use in order to maximize battery life. Up to seven layers of composition, up to 4K resolution, are supported, a co-processor interface enabled easy integration with third party IP blocks.

Mali-DP550Single and dual display output are supported, as well as various YUV/RGB pixel formats, including 10-bit YUV. More details can be found on ARM’s Mali-DP550 page.

All three new ARM Mali media IPs are available for immediate licensing, and consumer devices are expected in late 2015 and early 2016.

Via Anandtech.

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Categories: Graphics Tags: arm, gpu, h.265, hevc, mali, mali-t860, vp8

Applied Micro X-Gene (64-bit ARM) vs Intel Xeon (64-bit x86) Performance and Power Usage

October 26th, 2014 5 comments

A group of researcher at CERN have evaluated Applied Micro X-Gene 1 64-bit ARM XC-1 development board against Intel Xeon E5-2650 and Xeon Phi SE10/7120 systems, and one of them, David Abdurachmanov, presented their findings at ACAT’ 14 conference (Advanced Computing and Analysis Techniques) by listing some of the issues they had to port their software to 64-bit ARM, and performance efficiency of the three systems for data processing of High Energy Physics (HEP) experiments like those at the Large Hadron Collider (LHC), where performance-per-watt is important, as computing systems may scale to several hundred thousands cores.

HEP_Test_Systems_X-Gene_Intel_Xeon
Intel Xeon Phi platform based on Many Integrated Cores (MIC) computer architecture was launched the HPC market, and contrary to the table above features 61 physical cores. Applied X-Gene 1 (40nm process) was used instead of X-Gene 2 built on 28-nm process which was not available at the time. The ARM platform ran Fedora 19, whereas the Intel processor used Scientific Linux CERN 6.5.

The researchers run the CERN’s CMSSW applications for testing. Let’s jump to the results.

AOM_X-Gene_1_vs_Intel_XeonAs expected Intel Xeon processor and Phi coprocessor both have more performance than X-Gene 1 ARM SoC.

X-Gene_Intel_Xeon_Phi_Performance_Per_WattHowever, when it comes to performance-per-watt, APM X-Gene 1 is clearly ahead of Intel Xeon E5-2650 and there’s no comparison against Xeon Phi systems.

The conclusion of the report reads as follows:

We have built the software used by the CMS experiment at CERN, as well as portions of the OSG software stack, for ARMv8 64-bit. It has been made available in the official CMS software package repository and via the CVMFS distributed file system used by Grid sites.

Our initial validation has demonstrated that APM X-Gene 1 Server-on-Chip ARMv8 64-bit solution is a relevant and potentially interesting platform for heterogeneous high-density computing. In the absence of platform specific optimizations in the ARMv8 64-bit GCC compiler used, APM X-Gene 1 shows excellent promise that the APM X-Gene hardware will be a valid competitor to Intel Xeon in term of power efficiency as the software evolves. However, Intel Xeon Phi is a completely different category of product. As APM X-Gene 2 is being sampled right now, built on the TMSC 28nm process, we look forward to extending our work to include it into our comparison.

You can read the full report “Heterogeneous High Throughput Scientific Computing with APM X-Gene and Intel Xeon Phi” for details.

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Beyond Semi Introduces 32-bit BA20 Core with Cortex M4 Performance Efficiency, and Cortex M0+ Silicon Area

October 24th, 2014 4 comments

Beyond Semiconductor and CAST have jointly announced BA20 32-bit embedded processor core with PipelineZero Architecture (zero-stage execution pipeline), that rivals with ARM Cortex A4 in terms of performance per MHz, while using about the same silicon area as an ARM Cortex M0+. which could be critical for applications such as wearables, sensors, and wireless communication, that may require both a small footprint and high performance efficiency.

Beyond_Semi_BA20_Block_Diagram

Beyond Semi BA20 Block Diagram

The company’s PipelineZero micro-archirtecture can execute one instruction per cycle, hence saving energy by doing more in less time, and by operating at lower clock rates.

Key features listed for BA20 IP core:

  • PipelineZero architecture for high performance efficiency with tiny silicon footprint
    • 3.04 DMIPs/MHz (vs ARM Cortex M4: 1.25 DMIPS/MHz)
    • 3.41 Coremarks/MHz (vs ARM Cortex M4: 3.40 CoreMarks/MHz)
    • 2µW/MHz (vs ARM Cortex M0+: 3µW/MHz)
    • 10K gates (0.01mm2) in 9-track 40G (vs 0.009mm2 for ARM Cortex M0+)
  • BA2 ISA Extreme Code Density for less instruction fetching energy usage
  • Interconnect – 32-bit wide AMBA AXI4-lite bus
  • Advanced power management
    • Dynamic clock gating and power shut-off of unused units
    • Software- and hardware-controlled clock frequency
    • Wake-up on tick timer or external interrupt
  • Optional Processor Units
    • Programmable Vectored Interrupt Controller Unit
    • Memory Protection Unit
    • Timer Unit
    • Debug Unit
      • MDB support
      • Trace port support
    • ROM Patching Unit
    • IEEE-754 compliant Floating Point Unit
    • Hardware Multiplier/Divider
  • Peripherals include GPIO, UART, Real-Time Clock, Timers, I2C, and SPI
  • Memory controllers, interconnects, and more

Beyond_BA20_vs_ARM_Cortex_M BA20 Processor IP Core, and peripherals IP are available now in RTL source code (Verilog) or FPGA netlists, and BeyondStudio Eclipse-based IDE for Windows or Linux can be used for software development. The company can also provide reference design boards with JTAG and serial debug/trace for both CPU and system, but no details have been provided about these hardware platforms.

As with all Beyond Semi processor Core, BA20 is royalty-free, and only a one-time license needs to be purchased. Further details can be found on Beyond Semi BA20 PilelineZero Embedded Processor page.

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Categories: Beyond Semi BAxx Tags: arm, beyond semi, mcu