Posts Tagged ‘arm’

ARM TechCon 2015 Schedule – IoT, Servers, 64-bit ARM, Power Usage Optimization, and More

October 1st, 2015 No comments

ARM_TechCon_2015The ARM Technology Conference (ARM TechCon) will take place on November 10 – 12, 2015, in Santa Clara Convention Center, and just like every year, there will be a free exposition for companies to showcase their latest innovation and/or products, as well as a technical conference with sessions and workshops sorted into various tracks:

  • Automotive/Embedded Vision
  • Embedded
  • IoT
  • Mobile/Connectivity
  • Networking Infrastructure/Servers
  • Tools & Implementation
  • Wearables/Sensors
  • ARM Training Day
  • Sponsored Vendor Training
  • Special Event
  • General Event
  • Software Developers Workshop

You can find the complete schedule on ARM TechCon website. Although I won’t attend, I’ve created my own virtual schedule with some of the sessions I found interesting.

Tuesday – November 10

  • 8:30 – 9:20 – ARM Vision for Thermal Management and Energy Aware Scheduling on Linux by Ian Rickards (ARM), Charles Garcia-Tobin (ARM), Bobby Batacharia (ARM)

This talk will cover the history and where are we going, for ARM’s Power Software (IPA, EAS, and some concepts for the future).

ARM will detail the latest update on our thermal control software Intelligent Power Allocation (IPA) which has just been released in mainline Linux 4.2. The tuning and implementation flow allow IPA to be easily deployed in Linux-based devices including Android.

We will also introduce ‘Energy Aware Scheduling’ (EAS) which is a new development by ARM/Linaro to allow the Linux scheduler to make the most energy efficient decisions using a generic energy model based approach. EAS includes improved upstream Linux support for ARM “big.LITTLE” systems and other advanced multi-cpu topologies.

  • 9:30 – 10:30 – Innovation is Thriving in Semiconductors by Mike Muller (ARM)

The human capacity to find a path past difficult challenges is astonishing. Though traditional silicon scaling is more complex at advanced geometries, electronics design innovation is more robust than ever as engineers devise new ways to improve the latest chips. ARM CTO Mike Muller will describe advances in design innovation spanning low power, trust, and architectural innovation all the way from sensors to server and beyond. And he’ll unveil the latest technology achievements from ARM in his signature lively, humorous and engaging style.

  • 10:30 – 11:20 – IoT Prototyping 101: The All-in-One Platform by Steven Si (MediaTek)

Power efficiency, connectivity and size are top priorities for any developer looking to prototype innovative IoT devices. Best utilizing these key features with ARM’s technology will be the spotlight of this session a live demonstration of how a developer at any level can create the next big thing in IoT. Skills to be shown: connecting sensors; using a cloud interface to build a virtual device; sending data from the device to the cloud and communicating with other smart devices. (cnxsoft: possibly using LinkIt ONE platform)

  • 11:30 – 12:20 – Khronos APIs for Fast and Cool Graphics, Compute and Vision by Neil Trevett (Khronos)

Discover how 100 companies cooperate at the Khronos Group to create open, royalty free standards that enable developers to access the power of hardware to accelerate the demanding tasks in cutting-edge mobile applications including heterogeneous parallel computation, 3D graphics and vision processing. This session includes the latest updates to API standards including OpenGL, OpenCL, OpenVX, and the recent Vulkan new generation graphics and compute API. The session will explore how modern APIs will accelerate the availability of compelling experiences such as neural-net based driver assistance, virtual and augmented reality, and advanced environmental tracking and 3D reconstruction on ARM-based devices

  • 13:00 – 15:00 – Boosting Performance from ‘C’ to Sky with Custom Accelerators on ARM-based FPGAs by Shaun Purvis (Hardent)

Offloading tasks to specialized hardware, such as a GPU or FPU, is a common approach to boosting software performance. However, the fixed nature (i.e. hard-silicon) of such hardware places an upper limit on just how much performance can be boosted. In order to break down this barrier, some modern SoCs have combined ARM processing power with programmable logic allowing software to be offloaded to custom, scalable, accelerators. With accelerators that can be tailored to specific needs, suddenly the sky’s the limit! But that’s not all. Combining these SoCs with modern tools allows designers to migrate high-level functions directly to hardware, skipping all the hardware design in between. This presentation will introduce one such tool and discuss the design methodology that takes a software-defined system and turns it into a custom hardware accelerated one.

  • 15:30 – 16:20 – Bringing Mali, the Android GPU of Choice, to Wearables by Dan Wilson (ARM Ltd.)

In this talk we will look at the trends for the use of graphics processors in Wearable devices and how the technical requirements of this space differ from that of smartphones and other segments. We look specifically at the ARM Mali GPU Utgard architecture which provides the perfect fit for Wearable designs and describe how this architecture has been implemented to create ARM’s latest ultra-low-power Mali GPU.

  • 16:30 – 18:00 – Efficient Interrupts on ARM Cortex-M Microcontrollers by Chris Shore (ARM)

Most real-time embedded systems make extensive use of interrupts to provide real-time response to external events. The design of the interrupt architecture is crucial to achieve maximum system efficiency. When designing software for devices based on ARM’s Cortex-M microcontroller cores, it is important to understand the interaction between interrupt priority, sub-priority, tail-chaining and pre-emption to achieve the most efficient design. This session will examine various use cases and give practical advice to software developers.

Wednesday – November 11

  • 8:30 – 9:20 – How (Not) to Generate Misleading Performance Results for ARM Servers by Markus Levy (EEMBC) & Bryan Chin (Cavium)

Cloud workloads are putting unique demands on SoCs and other system-level hardware being integrated into scale-out servers. Traditional benchmarks address the suitability of processors for different tasks. However, many factors contribute to the whole system performance memory, disks, OS, network interfaces, and network stack. In addition, the manner of generating workloads can affect the results. This session uses a case study from Cavium’s ARM-based Thunder X system and the EEMBC cloud and server benchmark, to present results that demonstrate how subtle test environment variations can obfuscate benchmark results and how a properly designed benchmark can overcome these obstacles.

  • 9:30 – 10:30 – Keynote by Simon Segars (ARM’s CEO)
  • 10:30 – 11:20 – Pentralux Flexible Digital Displays on Paper, Plastic, Cloth & Synthetics by Mathew Gilliat-Smith (DST Innovations), Anthony Miles (DST Innovations)

DST Innovations has created a flexible digital display proof of concept produced on plastic, paper, cloth or synthetic substrates. It’s integrated with the ARM mbed OS and will be suitable for developers and designers to integrate into third party products. Initially the digital screens will be for informational or promotional data and video. Being bright, safe, robust and requiring little power, the design parameters will be significant and far reaching for the wearable sector in thousands of clothing, fashion, promotional and other commercial concepts. The screens will offer inter-connectivity through the mbed ecosystem to receive transmitted IoT cloud generated data.

  • 11:30 – 12:20 – Are you ready for USB Type-C? by Ravi Shah (NXP Semiconductors) & Andy Lin (NXP Semiconductors)

USB Type-C offers new features and benefits like reversible plug orientation, improved data rates up to 10 Gbps as well as an unprecedented, scalable, 100 W power-delivery capability that can power higher wattage devices and support faster charging. This session will review the features, benefits and applications it is being designed into today. In addition, design considerations and lessons learned from the field will be reviewed.

  • 12:30 – 13:20 – From Concept to Reality: Advancing ARM-based Enterprise SoCs – Presented by Applied Micro Circuits Corporation by Dr. Paramesh Gopi (Allied Micro Circuits Corporation)

No abstract…

  • 14:30 – 17:20 – STM32L7 Hands-On Workshop by James Lombard & Steve Miller (STMicroelectronics)

Thursday – November 12

  • 8:30 – 9:20 – All Things Data: Healthcare by Pierre Roux (Atmel)

Examples of IoT are everywhere, including digital home, remote resourcing monitoring and automation, but what gets less attention is how the IoT will impact healthcare with the combination of technologies that leverages big data and analytics that go along with it.

This talk will look at opportunities, hurdles and the skills required to make the most of this intersection of Internet-connected physical objects and the deluge of data. It will examine new generation of data analytics for use cases associated with our changing world and, examine the role big data analytics will play in the future of the healthcare industry.

  • 10:30 – 11:20 – The ARM Cortex-A72 processor: Delivering high efficiency for Server Networking and HPC by Ian Forsyth,  Director of Marketing, ARM

New content-rich features, services and evolving business models are transforming network architectures, giving rise to the Intelligent Flexible Cloud (IFC). Architects are decentralizing intelligence to deliver required flexibility and to cope with increased traffic demands. This, in turn, is driving new classes of SoCs, enabled by technology standards including software-defined networking (SDN) and network functional virtualization (NFV). These require significant throughput-per-watt efficiencies within networking and servers. This talk will explore how the latest Cortex-A72 CPU offers compelling performance and throughput to meet the requirements of these future workloads.

  • 11:30 – 12:20 – Porting to 64-bit on ARM by Chris Shore (ARM)

With the introduction of the A64 instruction set in ARMv8-A, many developers need to port existing code to work in a 64-bit environment. At the coding level, this presentation will cover porting C code, assembly code and NEON code. Issues covered will include data typing and type conversion, pointers, bitwise operations, differences in the SIMD register bank layout, mapping of assembly instructions. At a system level, we will cover maintenance operations and extensions to the security architecture.

  • 13:30 – 14:20 – Keynote- The Hard Things About the Internet of Things by Colt McAnlis (Google)
  • 14:30 – 15:20 – Wearable System Power Analysis and Optimization by Greg Steiert (Maxim Integrated), Jesse Marroquin (Maxim Integrated)

This session will demonstrate how to extend battery life by showing the real world impact of system level architecture decisions. The session will introduce a technique for measuring battery current and then use that technique to compare the power efficiency of different system implementations. Tradeoffs analyzed will include: power architecture, operating voltage, sensor data interfaces, DMA, SIMD.

Takeaway: a method for measuring real time power consumption,  advantage of operating at the lowest voltage possible with efficient regulators, tradeoffs of different sensor interfaces and of different micro-controller architectures (peripherals/M0+/M3/M4)

  • 15:30 – 16:20 – Improving Software Security through Standards Compliance and Structural Coverage Analysis by Shan Bhattacharya (LDRA)

This presentation will focus on secure software best practices. Ensuring the security of embedded devices involves more than simply using vulnerability preventive programming. However, paying attention to and leveraging security standards such as CWE/CVE, CERT C and even CERT Java, will certainly improve the probability of delivering a secure and effective system.

  • 16:30 – 17:20 – Top Android Performance Problems of 2015 by Colt McAnlis (Google)

When you look at performance problems all day, you’re bound to lose your hair. So rather than balding early yourself, Colt McAnlis will walk you through the top performance problems that dominated 2015. This talk will cover the range of issues from Memory, to Rendering, to Networking, listing specific topics that have shown up in many of the top apps in Google Play. We’ll even take some time to look at the differences in some form factors, and how you should plan around that.

  • 17:30 – 18:30 – Happy Hour :)

If you are going to attend, you can register online. While as usual, going to the expo and attending vendor’s sponsored sessions is free, there are different passes to join the conference sessions, ARM training day, and software developers workshops. The earlier you register, the cheaper.

Conference Pass ARM Training Day Software Developers
Expo Pass
Super Early Bird
(Ends July 24)
$599 $199 $99 Free
Early Bird
(Ends Sept. 4)
$799 $249 $149 Free
(Ends Oct. 30)
$999 $299 $199 Free
Regular/Onsite $1249 $349 $249 Free

There are also discounts for groups, students, press & media, and government employees. You can check details on ARm TechCon 2015’s Passes & Prices page.

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Linux 4.2 Release – Main Changes, ARM and MIPS Architectures

September 2nd, 2015 No comments

Linus Torvalds released Linux Kernel 4.2 last Sunday:

So judging by how little happened this week, it wouldn’t have been a mistake to release 4.2 last week after all, but hey, there’s certainly a few fixes here, and it’s not like delaying 4.2 for a week should have caused any problems either.

So here it is, and the merge window for 4.3 is now open. I already have a few pending early pull requests, but as usual I’ll start processing them tomorrow and give the release some time to actually sit.

The shortlog from rc8 is tiny, and appended. The patch is pretty tiny too.

Go get it,


Some notable changes made to Linux 4.2 include:

  • File systems
    • New features for F2FS including per file encryption
    • CIFS support SMB 3.1.1 (experimental)
  • Cryptography – Jitter Entropy Random Number Generator, Chacha20 stream cipher and Poly1305 authentication (RFC7539),New RSA implementation. See for details.
  • AMD GPU driver added support for AMD “Tonga,” “Iceland,” and “Carrizo” systems. That driver has now over 400,000 lines of code…
  • Networking

Some of the new features and improvements specific to the ARM architecture include (With a focus on Allwinner/Rockchip/Amlogic/Mediatek processors often discussed in this blog):

  • Allwinner:
    • A10/A10s/A13/A20/A31/A23 – SRAM Controller
    • A23 – SMP support, architected timer support
    • A31/A31s – CPUFreq support
    • A33 – Machine support, Bring-up sharing most drivers with A23, pinctl driver, PIO controller
    • A80 – Architected timer support, USB support
    • AXP221 PMIC driver
    • New boards and devices: LinkSprite pcDuino3 Nano, Cubietech Cubieboard4, Gemei G9, Auxtek T004, Utoo P66, Wexler TAB 7200, MK808C, Jesurun Q5, Xunlong Orange Pi, Xunlong Orange Pi Mini, Sinlinx SinA33
  • Rockchip
    • Fixes for GPU DRM driver
    • RK3368 – Added pinctrl and Ethernet (dwmac) support
    • Device tree – Files relicensed under GPLv2/X11 dual-license, Enable A12 HW PMU events in RK3288 boards, and TSADC for Firefly and PopMetal boards
    • Fixed IR receiver bug and modify some GPIO code in RK3288
  • Amlogic – Added documentation to the clock controller… nothing else.
  • Mediatek
    • Fixed clock registration in MT8135
    • Small changes and fixes to pinctrl driver
    • Added driver for Mediatek MT8173 I2C controller
    • Some fixes for PMIC
    • MT7601U driver (WiFi device)
    • Pinctrl driver for MT8127, MT6397,
  • Qualcomm
    • Added SPMI PMIC Arbiter device tree node for MSM8916
    • Added 8×16 chipset SPMI PMIC’s nodes
    • Added MSM8916 restart device node
    • Added initial set of PMIC and SoC pins for APQ8016 SBC board
  • Samsung
    • Fix exynos3250 MIPI DSI display and MIPI CSIS-2 camera sensor
    • Bring back cpufreq for exynos4210
  •  ARM64
    • New processors: Hisilicon ARM64 SoCs (e.g. Hi6220)
    • Various fixes for ARM64 for ACPI, MMU, SMP, perf, and more.
    • Enabled EDAC on ARM64
    • Support for Hikey board, ARM Juno r1 board
  • Various changes to some Atmel and Marvell processors, see Free Electrons blog post for details.
  • Other new ARM SoCs & hardware platforms – Freescale i.MX 7Dual, ZTE ZX29670, Buffalo WXR-1900DHP, ASUS RT-AC87U, SmartRG SR400ac, Compulab CM-A510, and more

There has also been some interesting changes for the MIPS architecture:

  • many bug fixes: LLVM build issue, KVM fixes, fix seccomp MIPS64, fix for oprofile (get_c0_perfcount_int), Fix JR emulation for R6, etc…
  • Some code cleanups (fixed misspellings, removes some code)
  • Added support for appended DTP
  • Improvements for R12000, R3000, Broadcom BCM47xx and BCM63xx,  ATH79
  • Large patchset for Ingenic JZ4740 SoC
  • Added support to Pistachio SoC
  • New MIPS platforms: MIPS Creator CI20 board and XWR-1750 board

A complete changelog for Linux 4.2 should soon be published on, and you’ll probably also want to look at their ARM architecture and drivers sections for more details about to various platforms including ARM and MIPS. I’ve also generated a complete Linux 4.2 Changelog with comments only (13.9MB) using git (git log v4.1..v4.2 --stat)

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Scaleway C1 Dedicated ARM Server Price Drops to 3 Euros Per Month

September 2nd, 2015 4 comments

Scaleaway launched their hosting services with dedicated ARM servers based on Marvell Armada 370/XP quad core ARM Cortex A9 processor this spring for 10 Euros per month, or 0.02 Euro per hour, and at the time, some people found it was not that attractive, as similarly priced plans provided by Linode or DigitalOcean with Intel server were also available, and it might have only been really compelling for people who specifically required an ARM server to play with. The company has now slashed its price, and it has become very attractive at 2.99 Euros (~$3.37 US) per month or 0.006 Euro per hour, excluding VAT.

Iliad C1 Server Module

Iliad C1 Server Module

The server technical specifications and features are still the same:

  • Server based on Marvell Armada 370/XP quad core ARMv7 processor
  • Memory – 2 GB Memory
  • Storage – 50 GB SSD Disk (extra space available for 1 Euro per 50GB)
  • 1x Reserved public IPv4
  • 200Mbit/s – Unmetered bandwith

You can deploy Ubuntu, openSUSE, Gentoo, Fedora, Debian, Arch Linux (ARM), or Alpine Linux to the server in less than one minute, as well as applications (InstantApps) such as Docker, Drupal, WordPress, ownCloud, Torrents, Gitlab, etc.. that can be installed through the server web interface. If an app is not listed, you could always connect via SSH, and install the required packages as needed. Scripts used to build the operating systems that run on C1 server can be found on Scaleway github account.

You can find more information and/or sign up for an account on Scaleway website.

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Study Shows Octa Core Processors Bring Little Over Quad Core Processors in Mobile Devices

September 1st, 2015 5 comments

Silicon vendor are now launching 8-core and even 12-core processors for mobile devices, and I can see some advantages in terms of power consumption in processors leveraging big.LITTLE processing with low power ‘LITTLE’ cores running light tasks such as audio or video playback, while performance ‘big’ cores running much demanding tasks. However, some processors, such as RK3368, feature the same eight cores, and in real-use don’t bring that extra bit of performance or lower power consumption, except in very specific cases. So the only “advantage” of this type of processor is a marketing one, with keyword like “Octa-core”, “64-bit”, etc… Last year, I found out, that more powerful cores may be more important than many cores, when I tested Allwinner A80 processor with PVRMonitor to check CPU usage per core in real-time, and in Antutu, while Browsing the web or playing games, only a few cores were used most of the time, and rarely all eight cores were needed.

PVRMonitor showing only 4 Cores out of 8 Cores Used during 3D Graphics Tests in Antutu

PVRMonitor showing only 4 Cores out of 8 Cores Used During 3D Graphics Test in Antutu

Moor Insight and Strategy, a high-tech analyst firm, benchmarked five smartphones in order to find out whether the number of cores mattered, and when possible disabled a few cores during testing to get an idea of the performance difference between 2-, 4- and 8- core performance.

The five smartphones under test were:

  • LG G4 with a Qualcomm Snapdragon 808 2x Cortex-A57 + 4x Cortex-A53 processor (6 cores) – Android Lollipop
  • Samsung Galaxy S6 with Samsung Exynos 7420 4x Cortex-A57 + 4x Cortex-A53 processor (8 cores) – Android Lollipop
  • Xiaomi Mi 4i with Qualcomm Snapdragon 615 8x Cortex-A53 processor (8 cores) – Android Lollipop
  • HTC Desire 820S with MediaTek MT6752 8x Cortex-A53 processor (8 cores) – Android Kitkat
  • LG G Flex 2 with Qualcomm Snapdragon 810 4x Cortex-A57 + 4x Cortex-A53 processor (8 cores) – Android Lollipop

The three benchmarks:

They also ran YouTube v10.24.57 and WeChat v6.2 apps, as well as Qualcomm Trepn Profiler to measure clock speed and load, and 3D CPU manager to disable cores on devices that supported (rooted + hotplug support) it, which sadly, meant only LG G Flex 2 and Xiaomi Mi 4i.


6 and 8 Core Smartphones Results in PCMark

One of their first remark was to notice that LG G4 with its 6-core processor outperformed almost all smartphones based on 8-core processors. This should have been expected since two of the eight cores smartphone are only running low power (and performance) Cortex A53 cores while LG G4’s Snapdragon processor comes with both A57 and A57 cores, but I guess it still shows to consumers that an 8-core is not necessarily faster than 6-core smartphone.

The more interesting part of the study is when they disable cores with on the same device with 3D CPU Manager.

PCmark_2_4_8_coresThe chart above shows that PCMark results are the same with 2, 4, 6 or 8 on Xiaomi Mi 4i, and results only drop on LG G Flex when switching from 4 to 2 cores, and the only reason is that only two Cortex A53 cores were active, while at lest two Cortex A57 cores were active when  4 to 8 cores were enabled.

Basemark_X_LG_G_Flex_2In 3D graphics tests with Basemark X, there was little differences between 2, 4, 6 or 8 cores activated, and amazingly they even noticed a slightly better performance with 2 cores compared to 8 cores. They repeated the tests several times with the same, and assumed it might be due to thermal throttling as the processor would heat more with 8 cores…

CamSpeed_Gold_Xiaomi_Mi_4iThe camera benchmark however showed a clear improvement with 4 cores over 2 cores (the same Cortex A53 cores), but very little improvement when 6 or 8 core were enabled.

Finally, while testing apps they found out that YouTube would play 1080p video in Xiaomi Mi 4i with 2 cores enabled, except when UI calls may cause a slowdown, which disappeared with 4 cores or higher. Unsurprisingly, WeChat ran perfectly fine on two cores…

Their conclusion was that CPU core count was not an accurate measurement of performance or performance, and that more CPU cores is not always better. They called on phone manufacturers and carriers to stop promoting the number of cores as a selling point, and instead improve benchmark practices and education.

If you feel like it, you can also watch the 49-minute benchmark session.

The white paper can be downloaded here.

Via ExtremeTech and thanks to Milkboy for the tip!

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Phytium Mars is an Upcoming 64 Core ARMv8 Processor for Servers

August 26th, 2015 3 comments

Several server SoCs with a large number of ARMv8 cores have been announced in the past with products such as Cavium ThunderX featuring 48 64-bit ARM cores and EZTile TILE-Mx100 with 100 ARM Cortex A53 cores. Phytium Technology, a Chinese startup funded in 2012, has showcased its work on Mars processor with 64 custom design ARMv8 cores at Hotchips 2015 conference.

Phytium_MarsCharles Zhang, director of research for Phytium, made the presentation entitled “Mars: A 64-Core ARMv8 Processor” at the conference, and a PDF version is available on Hotchips 2015 website (Conf. Day 1 section) but unfortunately it’s password-protected and only accessible by attendees. Last year, they made all presentations publicly downloadable in December, so hopefully it will be the same this year. In the meantime, I relied on an articles published on EETimes and, the latter reproduced some of the slides, to get some of the specs and features:

  • 64 custom designed ARMv8 “Xiaomi” core up to 2.0 GHz
  • Cache – L1 I-Cache and D-Cache, 32MB L2 cache, 128MB L3 Cache
  • Memory – 16 DDR3-1600 channels
  • ECC and memory protection on all caches, tags and TLBs
  • Expansion – 2x 16-lane PCIe 3.0 interfaces
  • Performance – 512GFLOPS, 204 GB/s memory bandwidth, 32GB/s I/O bandwidth
  • Manufacturing process – 28 nm
  • Die size / Package – 640 mm2; FCBGA package with ~3,000 pins
  • TDP – 120 Watts
Xiaomi Core Block Diagram

Xiaomi Core Block Diagram

Mars design has not yet taped out, but the company perform some simulations with SpecCPU 2006 base and rate benchmark, where the chip achieved 672 points and 585 points for respectively integer and floating-point performance.


Here are some background between the base and rate benchmark to make it clearer to what is actually tested here:

The SPEC CPU 2006 benchmark has several different ways to measure computer performance. One way is to measure how fast the computer completes a single task; this is a speed measurement. Another way is to measure how many tasks a computer can accomplish in a certain amount of time; this is called a throughput, capacity or rate measurement.

  • The SPECspeed metrics (e.g., the SPECint 2006 benchmark) are used for comparing the ability of a computer to complete single tasks.
  • The SPECrate metrics (e.g., the SPECint_rate 2006 benchmark) measure the throughput or rate of a machine carrying out a number of tasks.

If we check published integer rate benchmarks results, Phytium Mars would have roughly the performance of four AMD Opteron 6174 deca-core processors (Max TDP: 115 Watt / processor) or two Intel Xeon E5-2643 v3 deca-core processors (135 W TDP / processor).

No date was provided for the launch of Mars SoC.

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STM32F746G-DISCO is a $49 Cortex-M7 Board with a 4.3″ LCD Display, Arduino Headers

August 7th, 2015 No comments

We’ve already seen Atmel started shipping its SAM V71 Xplained Board based on its latest Cortex M7 a few days ago, but Atmel is not the company which recently introduced a Cortex M7 development kit, as ST Micro also launched an STM32F7 Cortex M7 development kit with Arduino headers and 4.3″ LCD at the end of June.

STM32F7_Development_KitThe “Discovery Kit with STM32F746NG MCU” (STM32F746G-DISCO) comes with the following specifications:

  • MCU – STMicro STM32F746NGH6 Cortex M7 MCU with 1 MB Flash, 340 KB RAM, in BGA216 package
  • Memory – 128-Mbit (16 MB) SDRAM (64 Mbits accessible)
  • Storage – 16 MB Quad-SPI Flash memory, and micro SD slot
  • Display – 4.3″ 480×272 color LCD-TFT with capacitive touch screen
  • Camera – Camera connector
  • Connectivity – Ethernet connector compliant with IEEE-802.3-2002
  • USB
    • USB OTG HS with Micro-AB connectors,  USB OTG FS with Micro-AB connectors
    • USB functions: virtual COM port, mass storage, debug port
  • Audio – SAI audio codec, line IN and OUT jacks, stereo speaker outputs, 2x ST MEMS microphones, and S/PDIF RCA input connector
  • Debugging –  On-board ST-LINK/V2-1 supporting USB re-enumeration capability
  • Misc – 2x push buttons (user and reset)
  • Expansion Headers:
    • Arduino Uno V3 connectors
    • RF-EEPROM daughterboard connector
  • Power Supply
    • ST LINK/V2-1
    • 5V via USB FS connector or USB HS connector
    • VIN from Arduino connector
    • External 5 V from connector
    • Output for external applications: 3.3 V or 5 V
  • Dimensions – N/A

STM32F7-DISCOVERY_PinoutThe board supports various development toolchains such as IAR EWARM (IAR Embedded Workbench), Keil MDK-ARM, GCC-based IDEs (free AC6: SW4STM32, Atollic TrueSTUDIO,…), and ARM mbed online.  The company also released STM32CubeF7 embedded software for STM32F7 series which includes low level drivers, USB, TCP/IP, File system, RTOS, Graphic and more. You’ll need a Windows XP, 7, or 8 computer to use the board, because the drivers for ST-LINK/V2-1 are only available for Windows.

One developer got hold of the board and wrote a C program showing some of its graphics capabilities.

You can find more details, including the board’s user manual and hardware design files, as well as purchase the board on STM32F746G-DISCO product page.

Via Electronics

Thanks to Nanik for the tip.

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Atmel SAM S70 and SAM E70 Cortex M7 MCUs, SAM V71 Xplained Board Are Now Shipping

August 5th, 2015 4 comments

ARM Introduced Cortex M7 IP in September, and ST Micro simultaneously announced its STM32F7 Cortex M7 MCU clocked up to 200 MHz, and boards are now available, including some running Linux. But two other companies have licenses Cortex M7, Freescale with its Kinetis KV5x micro-controllers which are yet to be mass-produced, and Atmel which has recently announced their SAM S70 and E70 micro-controllers are now in mass production.

Atmel_SAM_E70_S70_Block_DiagramSAM E70 and S70 have similar features, but E70 offers some extra interface like CAN and Fast Ethernet:

  • ARM Cortex-M7 core running at up to 300MHz (1500 CoreMark)
  • Up to 2MB Flash and 384kByte SRAM
  • Floating point unit (FPU) for high-precision computing and accelerated data processing
  • High-performance internal memory architecture with user configurable Tightly Couples Memories and System memory, and 16kB I and D-cache
  • High Speed USB Host and Device with on-chip high-speed PHY
  • CMOS image sensor interface
  • AES hardware encryption engines, TRNG and SHA-based memory integrity checker
  • Advanced analog front end based on dual 2Msps 12-bit ADCs, including 16-bit average, up to 24 channels, offset error correction and gain control
  • Dual 2Msps, 12-bit DAC and analog comparator
  • Other I/Os – SSC supporting TDM and I2S, up to 8 UARTs, up to 5 SPI and up to 3 I2C
  • 64 to 144-pin package options
  • Extended industrial temperature range: -40°C to 105°C
  • SAM E70 only:
    • Dual Bosch CAN-FD controller
    • 10/100 Ethernet MAC with IEEE1588

SAM E70 MCUs are also pin-to-pin compatible with SAM4E series. Atnel claims their new MCUs are 2.5 times faster than their Cortex M4 MCUs, and 50% than competitor “S” (That would be ST Micro), which is expected since STM32F7 are clocked at 200 MHz, while SAM S70/E70 MCUs go up to 300 MHz.

Atmel actually has four families of Cortex M7 MCUs, but their automotive grade V70 and V71 MCUs are not mass-produced yet.

Atmel_Cortex_M7_MCUHowever since S70, E70, and V70 are all subset of SAM V71, the development platform “SAM V71 Xplained Ultra Evaluation Kit” (Codename: ATSAMV71-XULT) is powered by the top of the line ATSAMV71Q21 micro-controller with 2MB flash, 384KB SRAM and all peripherals available on Cortex M7 microcontrollers.

Atmel_Xplained_SAM_V71_Cortex_M7SAM V71 Xplained Ultra key features and specifications

  • MCU – ATSAMV71Q21 microcontroller
  • Memory – 2 MB SDRAM
  • Storage – 2 MB QSPI Flash + SD Card connector with SDIO support + AT24MAC402 256KB EEPROM with EUI-48 address
  • Connectivity – IEEE 802.3az 10Base-T/100Base-TX Ethernet RMII PHY
  • Audio – Stereo audio codec, external PLL for precise clock generation, microphone & headphone jacks
  • Camera – Camera interface connector
  • USB – USB interface, device and host mode
  • CAN – ATA6561 CAN Transceiver
  • Media Local Bus (MediaLB) Connector
  • Expansion Headers
    • 2x Xplained Pro extension headers
    • 1x Xplained Pro LCD header
    • Arduino due compatible shield connectors
  • Debugging – Coresight 20 connector for 4-bit ETM, External debugger connector, Embedded Debugger
  • Misc – Reset button, power switch button, mechanical user push-buttons, 2x yellow user LEDs
  • Power Supply – 5V via USB or external power input (5-14V)

Software development tools include Atmel Studio, the ARM Keil MDK-ARM and IAR Embedded Workbench, and the MCUs and board support various real-time operating system such as Express Logic ThreadX, FreeRTOS, Keil RTX, NuttX and Segger embOS. Charbax interviewed Atmel a little ago while they were showcasing the Cortex M7 Xplained board at Embedded World.

Atmel SAM S70 MCU starts at $5.34 in 64-pin LQFP package and 512KB on-chip flash for 10k orders, and Atmel SAM V71 Xplained board goes for $136.25. More information is available on SAM S70 and SAM E70 product pages.

Thanks to Nanik for the tip.

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BBC Micro Bit Educational Board Features nRF51822 ARM Cortex M0 MCU

July 7th, 2015 2 comments

The BBC announces its intention to give away 1 million Micro Bit to British schoolchildren a few months ago, but at the time, the specifications were not completely frozen. The broadcaster has now finalized the design which is based on an ARM Cortex M0 micro-controller.Micro_Bit


Micro Bit board specifications:

  • ARM Cortex M0 micro-controller (Nordic Micro nRF51822 Bluetooth SoC)
  • 5x holes for 3V, GND, and 3 GPIOs
  • 2x user buttons, 1x reset button
  • 25x red LED indicator lights in a 5×5 matrix
  • Connectivity – Bluetooth LE
  • Sensors – Compass, magnetometer, accelerometer
  • USB – 1x micro USB port for port and programming
  • Power – 5V via USB or battery port to connect two AAA batteries
  • Dimensions – 4cm x 5cm


On the software side, the BBC has partnered with Microsoft to develop a web based, drag and drop interface for programming called TouchDevelop. Samaug is also involved in the project as they are developing the Android app, and an iOS app is also planned.

The BBC will send 1 million pieces of the board to schools in the UK this autumn, but they also plan to sell the board to the general public, although pricing and availability information is not available yet.

Via Hexus

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