Posts Tagged ‘arm’

HiSilicon Kirin 960 Octa Core Application Processor Features ARM Cortex A73 & A53 Cores, Mali G71 MP8 GPU

October 20th, 2016 1 comment

Following on Kirin 950 processor found in Huawei Mate 8, P9, P9 Max & Honor 8 smartphones, Hisilicon has now unveiled Kirin 960 octa-core processor with four ARM Cortex A73 cores, four Cortex A53 low power cores, a Mali G71 MP8 GPU, and an LTE Cat.12 modem.


The table below from Anandtech compares features and specifications of Kirin 950 against the new Kirin 960 processor.

SoC Kirin 950 Kirin 960
CPU 4x Cortex A72 (2.3 GHz)
4x Cortex A53 (1.8 GHz)
4x Cortex A73 (2.4 GHz)
4x Cortex A53 (1.8 GHz)
or LPDDR4-1333
(hybrid controller)
GPU ARM Mali-T880MP4
@ 900 MHz
ARM Mali-G71MP8
@ 900 MHz
Interconnect ARM CCI-400 ARM CCI-550
1080p H.264
Decode & Encode2160p30 HEVC
2160p30 HEVC & H.264
Decode & Encode2160p60 HEVC
Camera/ISP Dual 14bit ISP
Dual 14bit ISP
Sensor Hub i5 i6
Storage eMMC 5.0 UFS 2.1
Balong Integrated
UE Cat. 6 LTE
UE Cat. 12 LTE
4x CA
4×4 MIMO

ARM claims 30% “sustained” performance improvement between Cortex A72 and Cortex A73,  but the GPU should be where the performance jump is more significant, as ARM promises a 50 percent increase in graphics performance, and a 20 percent improvement in power efficiency with Mali G71 compared the previous generation (Mali-T880). Kirin 960 also integrates twice the GPU cores compared to Kirin 950, and some GPU benchmarks provided by Hisilicon/Huawei confirm the theory with over 100% performance improvement in both Manhattan 1080p offscreen and T-Rex offscreen GFXBench 4.0 benchmarks.

The first smartphone to feature Kirin 960 is likely to be Huawei Mate 9 rumored to come with a 5.9″ 2K display, 6GB RAM, and 256 UFS flash.

Intel Has Started Sampling Altera Stratix 10 ARM Cortex A53 + FPGA SoC

October 12th, 2016 5 comments

Intel bought Altera last year, which means Intel is now in the FPGA business, and the company has recently announced they had started to provide samples of Startix 10 SoC manufactured using Intel 14 nm tri-gate process. The interesting part if that beside FPGA fabric, the SoC also includes four ARM Cortex A53 cores.


Intel / Altera Stratix 10 SoC key features and specifications:

  • Processor – Quad-core ARM Cortex-A53 MP Core up to 1.5 GHz
  • Logic Core Performance –  1 GHz
  • Logic Density Range – 500K LE – 5.5M LE
  • Embedded Memory – 229 Mb
  • Up to 11,520 18 x 19 Multipliers
  • Up to 144 Transceivers up to 30 Gbps data rate (Chip to Chip)
  • Memory Devices Supported – DDR4 SDRAM @ 1,333 MHz,DDR3 SDRAM @ 1066 MHz, LPDDR3 @ 800 MHz, RLDRAM 3 @ 1200 MHz, QDR IV SRAM @ 1066 MHz, QDR II+ SRAM @ 633 MHz, Hybrid Memory Cube
  • Hard Protocol IP – 3 EMACs, PCI Express Gen3 X 8, 10/40G BaseKR- forward error correction (FEC), Interlaken physical coding sublayer (PCS)
  • Security – AES-256/SHA-256 bitsream encryption/authentication, physically unclonable function (PUF), ECDSA 256/384 boot code authentication, multi-factor key infrastructure with layered hierarchy for root of trust, side channel attack protection

Compared to the previous FPGA generation (Stratix V), Intel claims twice the core performance, five times the density, up to 70% lower power consumption, up to 10 TFLOPS single-precision floating point DSP performance, and up to 1 TBps memory bandwidth with integrated High-Bandwidth Memory (HBM2) in-package.

The new FPGA family targets data centers and networking infrastructures, which require high-bandwidth, multiple protocols and modulation schemes support, with a high performance-per-watt ratio.

You’ll find more details on Altera Stratix 10 FPGA product page.

Categories: Altera Cyclone, Hardware Tags: altera, arm, armv8, fpga, intel

GOLE2 Mini PC Comes in Intel and ARM Flavors, Features a SATA Bay and Built-in Camera (Crowdfunding)

October 9th, 2016 10 comments

GOLE1 was an different and interesting product combining tablet and mini PC features into one, but I found the 5″ screen to be rather useless, and the battery did not work exactly well since it would only charge when powered off.  The new GOLE2 mini PC won’t have any of those issues since it does not come with neither a display or a battery, but instead comes into two flavors with a version running Windows 10 on Intel Atom x5-Z8350 Cherry Trail processor, and another running Android based Phoenix OS on Allwinner A64 quad core ARM Cortex A53 processor. The devices also include an HD camera and microphone for video conference, as well as 2.5″ SATA bay implemented through a USB to SATA bridge.

gole2Beside the processor and memory, both GOLE2 models share the most of the same hardware specifications:

  • SoC
    • Intel Atom x5-Z8350 “Cherry Trail” quad core processor @ 1.44 GHz / 1.92 GHz with Intel Gen8 HD graphics (2W SDP) or
    • Allwinner A64 quad core ARM Cortex A53 processor with Mali-400MP2 GPU
  • System Memory –  2GB RAM on ARM / 4 GB RAM on Intel
  • Storage – 32 GB internal storage, 2.5″ SATA slot for SSD/HDD, micro SD slot up to 128 GB
  • Video Output – HDMI 1.4 port
  • Audio I/O – HDMI, 3.5mm headphone jack, built-in microphone, 8 ohm speaker
  • Connectivity – 10/100M Ethernet, 802.11 b/g/n/ac Wi-Fi, and Bluetooth 4.0
  • Camera – 5MP camera with 90 degree wide angle
  • USB – 2x USB 2.0 host ports, 1x USB 3.0 port (Intel only)
  • Misc – Power , and volume buttons
  • Battery – 2600mAh battery good about about 2 hours of typical use
  • Power Supply – 5V/3.0A
  • Dimensions – 151.24 x 57.56 x 142.7 mm (aluminum body)

phoenix-os-mini-pcThe mini PC ships with the power supply, an HDMI cable, and a user’s manual in English, German, and Japanese. The Intel model is available in white and black versions, and ARM model in gold/orange only.

Just like GOLE1, the company has decide to launch GOLE2 on Indiegogo, where you can get GOLE2 Phoenix OS was as low as $69 (Early bird) and up to $99, while GOLE2 Windows 10 starts at $114 (Early bird) up to $144 without a license, so you’d need to add $25 to get a proper Windows 10 license. Shipping is not included and adds $35 for DHL or EMS shipping. Delivery is scheduled for December 2016. If history is any guide, you should be able to purchase GOLE2 for about the same price, if not lower due to cheaper shipping, once it gets sold on Chinese online shops in early 2017.


Linux 4.8 Release – Main Changes, ARM & MIPS Architectures

October 4th, 2016 3 comments

Linus Torvalds has officially released Linux 4.8 last Sunday:

So the last week was really quiet, which maybe means that I could probably just have skipped rc8 after all. Oh well, no real harm done.

This obviously means that the merge window for 4.9 is open, and I appreciate the people who already sent in some pull requests early due to upcoming travel or other reasons. I’ll start pulling things tomorrow, and have even the most eager developers and testers hopefully test the final 4.8 release before the next development kernels start coming 😉

Anyway, there’s a few stragging fixes since rc8 listed below: it’s a mixture of arch fixes (arm, mips, sparc, x86), drivers (networking, nvdimm, gpu) and generic code (some core networking, with a few filesystem, cgroup and and vm things).

All of it pretty small, and there really aren’t that many of them. Go forth and test,

Linux 4.7 introduced support for AMD Radeon RX480 GPUs, parallel directory lookups, the new “schedutil” frequency governor with lower latency, EFI ‘Capsule’ firmware updates, and much more.

linux-4-8-changelogSome notable Linux 4.8 changes include:

  • HDMI-CEC framework
  • Kernel documentation system is now based on Sphinx
  • GPIO subsystem has a new user-space ABI for the management of general-purpose I/O lines; it is based on char devices and replaces the long-deprecated sysfs interface. You can check out tools/gpio/ directory with lsgpio, gpio-hammer, and gpio-event-mon for examples
  • Various file systems improvements for Btrfs, EXT-4 (unified encryption), OrangeFS (better in-kernel caching), Ceph (RADOS namespace support), XFS (Reverse-mapping support), etc…

Some improvements and new features specific to the ARM architecture and corresponding hardware platforms:

  • Allwinner:
    • Allwinner A10/A20 – Display engine clocks (TCON, FE, DE), I2S audio interface (ASoC) driver, added NFC node to DTS
    • Allwinner H3 – Clocks (through sunxi-ng), USB multi-reset lines support
    • AXP2xx driver – External drivebus support, AXP223 USB power supply support, AXP809 PMIC support
    • Broadcom BCM53125 support as it’s used in Lamobo / Banana Pi R1 router board.
    • New boards – Polaroid MID2407PXE03 & inet86dz (Allwinner A23 tablets), Banana Pi M1+, Banana Pi M2+, Allwinner Parrot (Allwinner R16 EVB)
  • Rockchip:
    • Many new peripherals added to RK3399 (eDP, clock controller, etc…)
    • Preparations to use generic DMA mapping code in the Rockchip IOMMU driver
    • Fixes for eMMC controller, SPI controller, eDP controller, and I2C
  • Amlogic
    • AmLogic meson8b clock controller (rewritten)
    • AmLogic gxbb clock controller
    • Reset controller driver for Amlogic Meson
    • New watchdog driver for Amlogic Meson GXBB (S905) SoC
    • Added support for Amlogic Meson RNG in crypto drivers
    • Some Amlogic ARM64 DTS updates
  • Samsung
    • Enable drivers for Exynos7 and Exynos5433 based boards: S2MPS clock driver, SoC: RTC, SPI, watchdog, EHCI, OHCI, DWC3, ADC and PWM, Enable Samsung SoC sound
    • Samsung ARM64 DTS Changes – Adjust the voltage of CPU buck regulator so scaling could work.
    • Samsung DTS changes
      • Add missing async bridge for MFC power domain on Exynos5420. This fixes imprecise abort on s5p-mfc re-bind.
      • Define regulator supplies for MMC nodes on Exynos4412 Odroid boards and for TMU on Exynos542x Peach boards.
      • Thermal cleanups on Odroid XU3-family (Exynos5422).
      • Enable AX88760 USB hub on Origen board (Exynos4412)
      • Disable big.LITTLE switcher so the cpufreq-dt could be enabled.
      • Enable Samsung media platform drivers.
      • Enable some board-specific drivers for boards: Trats2, Universal C210.
      • Enable Virtual Video Test Driver on nulti_v7 and exynos defconfigs. Useful for testing
    • Samsung drivers/soc updates:
      • Move the power domain driver from arm/mach-exynos and prepare for supporting ARMv8.
      • Add COMPILE_TEST.
      • Make SROMC driver explicitly non-module.
      • Endian-friendly fixes.
      • Fix size of allocation for Exynos SROM registers (too much was allocated)
    • Add CEC interface driver present in the Samsung Exynos SoCs
    • Added support for Exynos 5410 Odroid XU board
  • Qualcomm
    • Added MDM9615 support
    • Qualcomm ARM Based Driver Updates:
      • Rework of SCM driver
      • Add file patterns for Qualcomm Maintainers entry
      • Add worker for wcnss_ctrl signaling
      • Fixes for smp2p
      • Update smem_state properties to match documentation
      • Add SCM Peripheral Authentication service
      • Expose SCM PAS command 10 as a reset controller
      • Fix probe order issue in SCM
      • Add missing qcom_scm_is_available() API
    • Qualcomm ARM64 Updates
      •  Enable assorted peripherals on APQ8016 SBC
      • Update reserved memory on MSM8916
      • Add MSM8996 peripheral support
      • Add SCM firmware node on MSM8916
      • Add PMU node on MSM8916
      • Add PSCI cpuidle support on MSM8916
    • Qualcomm Device Tree Changes:
      • Reverse BAM dma node reverts
      • Add BAM remote control options for affected platforms
      • Enable peripherals on APQ8074 dragonboard
      • Enable PMA8084 pwrky
      • Fix PMIC reg entries by removing unnecessary size element
      • Add SCM binding and support for all currently supported boards
      • Add Qualcomm WCNSS binding documentation
      • Rename db600c to SD_600eval and add peripheral nodes
      • Remove gpio key entry from Nexus7
      • Add APQ8060 based dragonboard and associated peripherals
      • Add ARMv7 PMU for IPQ4019
      • Update smem state cells to match documentation
    • ARM64 defconfig: Enable PM8xxx pwrkey support, enable MSM8996 support
    • ARM defconfig: Enable MSM9615 board support, enable MSM8660 pinctrl support
  • Mediatek
    • Added Mediatek MT6755
    • Display subsystem added to MT8173
    • Support for Mediatek generation one IOMMU hardware
    • New drivers for Mediatek MT6323 regulator
    • new encoding codec driver for Mediatek SoC (linux-media): H.264/VP8/V4L2 video encoder drivers for MT8173
  • ARM64 – arm64 architecture has gained support for the kexec mechanism (allowing one kernel to boot directly into another) and kernel probes.
  • Other new ARM hardware or SoCs – NXP i.MX 7Solo, Broadcom BCM23550, Cirrus Logic EP7209 and EP7211 (clps711x platforms), Hisilicon HI3519, Renesas R8A7792, Apalis Tegra K1 board, LG LG1313, Renesas r8a7796, Broadcom BCM2837 (used in Raspberry Pi 3)

MIPS architecture changelog:

  • Fix memory regions reaching top of physical
  • MAAR: Fix address alignment
  • vDSO: Fix Malta EVA mapping to vDSO page structs
  • uprobes: fix incorrect uprobe brk handling, select HAVE_REGS_AND_STACK_ACCESS_API
  • Avoid a BUG warning during PR_SET_FP_MODE prctl
  • SMP: Fix possibility of deadlock when bringing CPUs online
  • R6: Remove compact branch policy Kconfig entries
  • Fix size calc when avoiding IPIs for small icache flushes
  • Fix pre-r6 emulation FPU initialisation
  • Fix delay slot emulation count in debugfs
  • CM: Fix mips_cm_max_vp_width for non-MT kernels on MT systems
  • CPS: Avoid BUG() when offlining pre-r6 CPUs
  • DEC: Avoid gas warnings due to suspicious instruction scheduling by manually expanding assembler macros.
  • FTLB: Fix configuration by moving configuration after probing, clear execution hazard after changing FTLB enable
  • Highmem: Fix detection of unsupported highmem with cache aliases
  • I6400: Don’t touch FTLBP chicken bits
  • Malta: Fix IOCU disable switch read for MIPS64
  • Octeon: Fix probing of devices attached to GPIO lines, fix kernel header to work for VDSO build, fix initialization of platform device probing.

You can find the full list of changes in Linux 4.8 changelog with comments only generated using git log v4.7..v4.8 --stat. A list of changes for Linux 4.8 will also soon be found on

ARM Unveils Cortex-R52 ARMv8-R CPU Core for Safety-Critical Systems

September 20th, 2016 No comments

ARM has introduced their very first ARMv8-R real-time 32-bit CPU core with Cortex-R52 designed for safety-critical applications in the automotive, industrial and health-care markets. It has been designed to address higher workloads with increased performance (up to 35%) compared to Cortex-R5 processor.

Click to Enlarge

Click to Enlarge

The processor should be used in systems capable of fulfilling IEC 61508 SIL 3 and ISO 26262 ASIL D functional safety requirements. ARM explains the new processor address both random errors for example bit flipping from radiation, and systemic errors more related to software or design faults.


The latter can be addresses with the right development processes, including following aforementioned functional safety standards, but random errors require some extra hardware features such as ECC memory, or dual core lock step processors, where instructions are run on two processors simultaneously and results compared.

Normally, the whole software stack must be validated and certified on safety-critical systems, even for part of the code that may not be safety-critical. This is a time-consuming and costly endeavor however, and as software becomes ever more complex becomes an issue. So Cortex R52 cores also implement a Level 2 MPU running monitor or hypervisor software, which can help separating safety code, critical safety code and non-safety code.

arm-processor-real-time-coreCortex-R52 cores would typically be used in conjunction with Cortex-A cores running non-safety code, and offering higher performance, throughput, and more peripherals. Some current processors featuring Cortex-Rxx cores include Xilinx Zynq UltraScale+ MPSoC (Cortex-R5), and Renesas R-Car H3 automotive SoC (Cortex-R7).

You may want to visit ARM Cortex-R52 product page for a few more details.

Orange Pi One Development Board Sells for $3.69 Shipped (Promo)

September 19th, 2016 51 comments

[Update: Sorry the promo is over, and price is back at $13.79]

Last time, we had a promo for Orange Pi PC for $8.57 on GearBest, and it was legit, but quantity limited, so not so easy to get. There’s now another promo from the same parent company, as Orange Pi One is sold for $3.69 including shipping on Everbuying with 289 pieces and about 8 days left.


In case you can’t recall Orange Pi One specs, it’s a development board based on Allwinner H3 quad core Cortex A7 SoC, with 512 MB RAM, micro SD card for storage, 10/100M Ethernet,  a USB ports, and HDMI output. The best Linux OS for the board is probably Armbian. The normal price is around $13 to $14 shipped.

Thanks to Theguyuk for the tip.

Explore M3 Board based on NXP LPC1768 Cortex M3 MCU Comes with Lots of Tutorials (Crowdfunding)

September 12th, 2016 No comments

Explore M3 is an ARM Cortex M3 development board powered by a micro USB port, with plenty of I/Os, Arduino compatible, and the developers have also written many tutorials to help people getting started as fast and easily as possible. A starter kit with cables and sensors is also available with the board.



  • MCU – NXP LPC1768 ARM Cortex M3 @ up to 100MHz with 512KB flash, 64KB RAM,
  • USB – 1x micro USB 2.0 OTG port for programming and power
  • Expansion Headers – 2x 20-pin male headers + 8-pin unpopulated header with 38x GPIOs, 4x UARTs, 2x CAN, 2x SPI, 2x I2C, 6x PWM, 5x ADC, 1x DAC, 2x interrupt pins, I2S audio, and power signal
  • Debugging – JTAG/SWD Debug connector
  • Misc – USB boot and reset buttons
  • Dimensions – 55mm x 25mm

The hardware is somewhat similar to mbed LPC1768 board but with a few more I/Os. The breadboard friendly board can be programmed with the Arduino IDE, but you can also go “bare metal” using ARM-GCC and Ellipse, or other tool chains like Keil or Co-IDE. Alternatively, the board also support FreeRTOS real-time OS. You can find close to 50 tutorials for all three programming options on ExplorerEmbedded Wiki, and some source code is also available on Github.

explore-m3-pinoutExplorer M3 developers are now raising funds via CrowdSupply to help reducing price for mass production. A $19 pledge should get your the board, but for bare metal programming you may want to add $20 for SODA SWD debug adapter, if you don’t already have your own programmer, and the starter kit goes for $49 with various other accessories. Shipping is free, and delivery is planned for mid November.

Rockchip RK1108 Cortex A7 + DSP SoC is Made for Audio & Video Conference and Recording Applications

September 8th, 2016 No comments

Rockchip has introduced RK1108 ARM Cortex A7 SoC with a 600 MHz DSP targeting visual communication, consumer electronics, automotive DVR, and security applications thanks to its 8-channel I2S audio codec and 1440p H.264 video encoder and decoder.

rockchip-rk1108Detailed specifications can be found on the official Rockchip Wiki:

  • CPU – Single-core ARM Cortex-A7 Core processor with NEON and FPU,  32KB/32KB L1 I-Cache/D-Cache, Unified 128KB L2 Cache, and Trustzone
  • Video/Image DSP – Up to 600 MHz, 32KB I-TCM and 32KB I-cache, 128KB D-TCM
  • Memory
    • 12KB internal SRAM
    • DDR3/DDR3L interface – 16 Bits data width, 1 ranks (chip selects), up to 512 MB RAM
    • NAND Flash Interface – 8-bit async NAND flash, 16-bit hardware ECC
    • eMMC Interface – Compatible with standard iNAND interface, eMMC 4.51 standard.
    • SD/MMC Interface – Compatible with SD 3.0, MMC 4.41
  • System Component
    • 2x 64-bit timers with interrupt-based operation
    • 8x PWMs with interrupt-based operation
    • WatchDog timer
  • Video
    • Video decoder of H.264 up to HP level 5.0; [email protected] (2560×1440) max
    • Video encoder for H.264 up to HP level4.2
  • JPEG decoder and encoder up to respectively 8176×8176 and 8192×8192
  • Display
    • 10-bit DAC TV encoder up to 480i/576i (CVBS)
    • HDMI 1.4 up to 1080p60
    • 4-lane MIPI DSI interface up to 720p @ 60fps.
  • Camera interface – Up to 5M pixels, 8-bit BT656 (PAL/NTSC), 16-bit BT601, and 8-/10-/12-bit raw data interfaces
  • Audio
    • Codec – 24-bit DAC with Line-out, up to 96 KHz sampling rate, mono, stereo, and 5.1 audio support.
    • I2S0 with 8 channels – I2S0/I2S1 supports up to 8 channels (8xTX, 8xRX);
    • I2S1/I2S2 (PCM) with 2 channels – Up to 2 channels (2xTX, 2xRX) ; 16- to 32-bit audio resolution; up to 192KHz sample rate
  • Peripherals
    • SDIO 3.0 interface
    • GMAC 10/100M Ethernet Controller
    • 1x SPI Controller, 1x SFC, 3x UART controllers, 4x I2C controllers
    • 3x USB 2.0 host interfaces
    • 1x USB 2.0 OTG interface up to 480Mbps
  • Misc
    • Temperature Sensor (TS-ADC) – 10-bits ADC up to 50KS/s. -40~125C temperature range and 5C temperature resolution
    • SAR-ADC (Successive Approximation Register) – 10-bit ADC up to 1MS/s. 6 single-ended input channels. Current consumption: 0.5mA @ 1MS/s
    • eFuse –  2x 256-bit (32×8) high-density electrical fuses
Rockchip RK1108 Development Board (EVB)

Rockchip RK1108 Development Board (EVB)

There’s no much more information at this stage, and beside the evaluation board shown above, I could not find devices based on Rockchip RK1108 processor yet. Some code has been pushed to GeekboxZone Linux kernel repo in Github.

The company also unveiled Rockchip PX5 octa-core Cortex A53 processor for automotive applications with support for ADAS algorithms, and 4K60 video decoding, but there’s even less information than for RK1108 so far.

Via Rockchip Twitter account.