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Posts Tagged ‘arm’

CubieBoard6 Development Board Powered by Actions Semi S500 Processor Comes with SATA, LiPo Battery Support

March 24th, 2017 17 comments

CubieTech launched Cubieboard with Allwinner A10 processor in 2012, and while they may not be as popular as some other boards like Raspberry Pi, ODROID, or Orange Pi boards in 2017, the company is still around after around 5 years, and their latest board is Cubieboard6 powered by Action Semi S500 quad core Cortex A9 processor with 2GB RAM, 8GB flash, HDMI, wired & wireless connectivity, SATA, battery support and more.

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Cubieboard6 specifications:

  • SoC – Actions Semi S500 quad core ARM Cortex-A9 processor with Imagination PowerVR SGX544 GPU
  • System Memory – 2GB LPDDR3
  • Storage
    • 8GB eMMC flash
    • SATA 3.0 port for 2.5″ HDD/SSD up to 4TB
    • micro SD card slot up to 32GB
  • Video Output  – HDMI 1.4b up to 1080p60
  • Audio I/O – Via HDMI output, 3.5mm audio output (HP) jack, 3.5mm audio input (MIC) jack
  • Connectivity – 10/100M Ethernet, 802.11 b/g/n WiFi, Bluetooth 4.0 LE (AP6212) with u.FL antenna connector
  • USB – 2x USB host ports, 1x mini USB device
  • Expansion – 2x 48-pin headers with I2C, CSI for camera, FM-IN, ADC, CVBS output, Audio output, RGB, LVDS, MIPI DSI, SPI, HSIC, INT GPIO…
  • Misc – IR receiver, RTC with battery, power and ADFU key (to flash firmware), Power LED, 2x User LEDs
  • Power Supply
    • 5V @ 2.5A via power barrel
    • 5V via mini USB input
    • 3.7V Li-Po battery support via 2-pin header
  • Dimensions – 100mm x 60mm x 18mm
  • Temperature Range –  -20℃ ~ 70℃
  • Certifications – FCC, CE & RoHS

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The company provides Android 5.1.1 and Debian Jessie Desktop with 3D graphics acceleration (OpenGL ES 2.0) and hardware video decoding support. Software and hardware files, as well as documentation is available on MEGA outside of China, and on Baidu for people located in China.

Actions Semi S500 does not support SATA, so it’s important to look at the schematics to see how it was implemented, and while many boards are simply limited by their USB 2.0 interface, CubieTech used the USB 3.0 interface for the SATA implementation, which should lead to much better performance than most non-native solutions on the market. It’s disappointing that networking is limited to Fast Ethernet.

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We’ve see both a USB 3.0 switch and USB 3.0 to SATA bridge (JMicron JMS578) in the schematics in order to provide good performance between the processor and the SATA drive, while also allowing to use the board as an external USB 3.0 hard drive from your computer. Actions Semi S500 is not quite a new processor, and if you want to check out what it’s capable you may want to check out my hands-on posts about Roseapple Pi and Allo Sparky.

You’ll find more pictures and a few extra details on the product page. The official price of the board is $69 without shipping, but Cubieboard6 is only sold on a couple of website, including Amazon US for $98, and an Australian website for $115 AUD. Note that the board is sold as part of kit with several accessories namely USB to power jack cable, USB to mini USB cable, a WiFi antenna, a SATA cable, and a heatsink. There’s also an optional case, but I could not find it for sale yet.

ARM DynamIQ Improves on big.LITTLE Technology, Supports Up to 8 Heterogeneous Cores in a Single Cluster

March 21st, 2017 13 comments

ARM unveiled big.LITTLE technology in 2011 which consisted of clusters of low power cores such as Cortex A7 or A53, and high performance cores such as Cortex A15 or A72, with the system assigning tasks to the best processor for the job in order to  optimize battery life. big.LITTLE supports up to 4 cores per cluster, and you can mix different types of cores within a single cluster. ARM DynamIQ changes all that as up to 8 cores are supported within one cluster, and you can mix low power and high performance cores within a given cluster.

ARM DynamIQ multicore microarchitecture will be available for all new ARM Cortex-A processors starting this year, and targets automotive, networking, server, and primary compute devices. ARM claims it’s especially advantageous for artificial intelligence due to better performance, and autonomous driving due to increased safety, and it allows for much faster response from accelerators. Based on the slide below showing the evolution of multi-core implementation with ARM SoC, the company might as well as called it ARM’s Just Do What You WantTM multi-core technology, especially as they explain that any configuration is possible such as 1+7 (1x big and 7x LITTLE CPUs), 2+4, 1+3 etc…
One advantage of using multiple heterogeneous cores within a single cluster is that it’s less “expensive” to migrate tasks from a LITTLE processor to a big processor, with increased efficiency as processors share the same memory (and cache?), and most big.LITTLE implementations going forward are likely to use a single cluster design, unless you need more than 8 cores.

You may find more details on DynamIQ technology page, ARM’s community related blog post, and the presentation slides.

Categories: Processors Tags: arm, big little, dynamiq

MACOM X-Gene 3 Server-on-Chip is Equipped with 32 64-bit ARM Cores Clocked at 3.0 GHz

March 11th, 2017 9 comments

MACOM, having recently completed the acquisition of AppliedMicro, has now announced sampling of X-Gene 3 Server-on-a-Chip (SoC) with 16-nanometer FinFET process technology. X-Gene 3 features 32-core ARMv8 cores clocked at up to 3.0 GHz, 8 DDR4 channels, 42 PCIe Gen 3 lanes, SATA 3.0 and USB 3.0.

X-Gene 3 Block Diagram – Click to Enlarge

X-Gene 3 SoC key features and specifications

  • CPU – 32x 64-bit ARMv8 cores @ up to 3.0 GHZ (base freq.) / 3.3 GHz (turbo freq.)
  • Cache – 32MB L3 cache
  • Memory IF – 8x DDR4-2667 channels with ECC and RAS supporting up to 16DIMMs for up to 1TB RAM
  • Storage – SATA 3.0 interfaces
  • 42x PCIe Gen 3 lanes with 8x controllers
  • USB 3.0 interfaces
  • Max. TDP – 125 Watts (Expected)
  • Process – 16nm FinFET TSMC

X-Gene 3 is said to offer 4 to 6 better performance compared to X-Gene 2, and match “comparable x86 processors in CPU throughput, per-thread performance and power efficiency, while offering advantages in memory bandwidth and total cost of ownership”.

A white paper by the Linley group has some more insights about the performance:

The company expects the chip to deliver a SPECint_rate2006 (peak) score of at least 500 when running at its peak speed of 3.3GHz and DDR4-2667 and with some additional hardware and compiler tuning. This score is well ahead of that of any other ARM processor and similar to that of mainstream Xeon E5 processors.

In addition, the processor should achieve a single-thread SPEC_int2006 (peak) score of 24. Other CPU tests such as CoreMark and Dhrystone deliver similarly impressive results, outscoring leading ARM cores such as Cortex-A72 and custom designs from Cavium, Qualcomm, and Samsung. With eight DDR4 channels, X-Gene 3 also posts excellent scores on memory tests. For example, the processor scores 67.1GB/s on Stream Copy using DDR4-2133 and could exceed 80GB/s when it uses DDR4-2667.

They also compared X-Gene 3 SoC directly to Xeon E5 processor in the table below using numbers provided by vendors, or estimates, not independent benchmarks.

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MACOM’s new SoC appears to have the edge when it comes to memory bandwidth, however, they note that X-Gene 3 lags Xeon E5 in floating-point performance, X-Gene 3 will still do well on integer-only workloads such as deep learning used for voice services (e.g. Alexa), image classification, and other tasks.

MACOM is now shipping X-Gene 3 to selected partners. Some publicly available documents for APM883xxx-X3 (codename for X-Gene 3) should eventually be available on APM website.

Via Hexus, and thanks to Tadej for the tip.

$6 LicheePi Zero ARM Board Runs Linux 4.10, Supports Lots of Add-On Boards (Crowdfunding)

March 10th, 2017 81 comments

We’ve already covered LicheePi One board powered by Allwinner A13 processor, but it was not for sale out of China, and the developers are now back with LicheePi Zero board/module, slightly bigger than an SD card, featuring Allwinner V3s processor, and offered for as low as $6, or $8 with WiFi via an Indiegogo campaign.

LicheePi Zero specifications:

  • SoC – Allwinner V3s ARM Cortex A7 processor @ up to 1.2 GHz with an ARM Mali-400 GPU, 512Mbit (64MB) DDR2 on-chip
  • Storage – micro SD card slot, SPI flash (not 100% clear if it will be populated when shipped to backers)
  • Display – FPC40 RGB Connector with support for 800×480 RGB LCD
  • Audio – Audio codec
  • USB – micro USB OTG port
  • Expansion
    • 2x 15 headers with 2.54mm pitch, breadboard friendly with GPIOs, 2x UART, 1x SPI, 2x I2C,ADC, 1x PWM
    • 2x  30 half-holes with 1.27mm pitch with OTG USB,MIPI CSI,EPHY,RGB LCD, more GPIOs
    • RGB connector can take add-on boards for GPIO, LVDS, HDMI, VGA, etc…
  • Misc – RGB LED
  • Power Supply – 5V via micro USB port, or 5V/GND header
  • Dimensions – 44.6×25.5mm

Pinout Diagram

Most development board come with SDK using older version of Linux, but LicheePi Zero supports the latest Linux 4.10 kernel, as well as buildroot, Debian, and Raspbian Jessie with Pixel (experimental). The source code and hardware documentation can be found on Github.

Another selling point of this tiny board is the number of add-boards, with a WiFi board that be either plugged into the micro SDcard slot, or soldered along some of the 2.54mm pitch header, several converter using the RGB interface for VGA, LVDS, HDMI, DVP camera) or even some extra GPIOs.

The developer also provides a baseboard for LicheePi Zero module giving access to a 3.5mm audio jack, a built-in microphone, and Ethernet, as well as I/O ports for even more add-ons such as cameras, OLED or TFT displays, speakers, LoRa modules, and so on.

The modularity and options of Lichee Pi Zero is well summarized in the diagram below.

To get started easier, the developers also worked on some projects or bundles like a portable Linux handheld computer, a mini DIY laptop, VGA or HDMI computer bundles, “LoRa Netgate”, wireless speakers, etc… You can watch the demo of some of those, and more details about the board and modules in the video below.

While LicheePi Zero and ZeroW models are respectively $6 and $8 per unit, you can’t buy one only at price, as the minimum order is two, so $12 for Zero, and $16 for ZeroW, except for the developer edition (shipped ASAP) that’s $12 for one ZeroW. ZeroW mini laptop DIY suit rewards with a LicheePi Zero, a micro SD wifi card, an OTG adapter, a 5″ 800×480 LCD, a wireless keyboard, a LiPo battery, and other accessories as shown at the start of the video above is just $39, while the LoRa Netgate suite with 2 A.I Thinker LoRa modules and a custom protocol (not LoRaWAN) goes for $40. There are many other rewards that you can checked in the Indiegogo page. Shipping is not included by only adds $5, and delivery is planned for May to June 2017 depending on perks. You can ask your question on on Indiegogo, as well as iLichee Forums.

Thanks to Freire for the tip.

System76 Starling Pro ARM Server Powered by 2 Cavium ThunderX 64-bit Processors Sells for $6400 and Up

March 3rd, 2017 11 comments

64-bit ARM servers are starting to show up more and more for sale, and after servers such as Softiron Overdrive 1000, Avantek H270-T70, and Gigabyte MP30-AR0, System76, a company selling only Ubuntu powered computers and servers, has launched Startling Pro ARM server equipped with two Cavium ThunderX_CP 48-core processors, and a choice of two operating systems: Ubuntu 16.04.2 LTS 64-bit or Ubuntu 16.10 64-bit.

System76 Starling Pro ARM “stap1” server specifications:

  • Processor – 2× Cavium ThunderX_CP 48 core 64-bit ARMv8 processor @ up to 2.5 GHz (96 cores in total)
  • System Memory – Up to 1024 GB quad-channel registered ECC DDR4 @ 2400MHz
  • Storage – Up to 4x 3.5″ drives, 32 TB in total
  • Video Output – VGA port
  • Virtualization – ARM Virtualization Host Extensions
  • Networking – 3x 40-Gigabit QSFP+ (Quad Small Form-factor Pluggable+), 4x 10 Gigabit SFP+, 1x Gigabit Ethernet (RJ45)
  • Expansion – 1x PCI Express x16 (Gen3 x8)
  • USB –  4x USB 3.0 (2x front/ 2x back)
  • Serial – 1x COM port
  • Misc – Power on/off button, reset button, ID switch button, LEDs (Power, ID, HHD Activity, System status, LAN Activity, ID)
  • Power Supply – 2x 650 Watts with redundancy
  • Dimensions – 43.0 × 4.4 × 62.5 cm
  • Weight – 13 kg (based weight, varies on configuration)

Cavium has four versions of their ThunderX processor optimize for compute, storage, secure compute, and network, and ThunderX_CP model is optimized for Compute workloads such as cloud web servers, content delivery, web caching, search and social media.

Click to Enlarge

You’ll find more details on System76 Starling Pro product page, and if you click on Design + Buy button at the top of that page, you’ll be able to built your server with a combination of memory, storage, rail kit, accessories, and support (Ubuntu Advantage) options. Price starts at $6,399 with 16GB + 16 GB memory for the two processors, and a 250 GB SSD, but you can go up to $27,528 by maxing out memory to 1TB (512GB per processor with 8 64GB RAM modules each) and 16TB of SSD storage (4x 4GB).

Via Olof Johansson

Xiaomi Introduces Surge S1 ARM SoC, Xiaomi Mi 5c Smartphone

February 28th, 2017 5 comments

Xiaomi may be skipping Mobile World Congress 2017, but they’ve still announced their first in-house Surge S1 octa-core SoC, and Xiaomi Mi 5c powered by the processor right at the same time as the even takes place.

Surge S1 processor specifications:

  • CPU – Octa-core 64-bit chipset with 4x Cortex A53 cores @ up to 2.2GHz, 4x Cortex A53 cores @ up to 1.4GHz
  • GPU – ARM Mali-T860 quad-core GPU with AFBC + ASTC image compression technology
  • 32-bit high performance DSP for voice processing
  • 14-bit dual ISP; enhanced image processing capabilities with Surge ISP algorithm improving camera light sensitivity by 150%, and dual noise reduction algorithm reducing noise and preserving image detail in low light
  • Upgradable baseband; programmable modem, OTA upgradable
  • VoLTE high quality call and video support
  • Security – Chip-level security; TEE architecture, strict compliance with safety regulations
  • 28nm High Performance Computing (HPC) process

The specifications and Antutu score (64,817) makes it clear it’s  an application processor for mid range smartphones. And since Xiaomi is a phone – and other consumer devices – manufacturer it makes sense for them to announce the processor at the same time as the first Surge S1 smartphone: Xiaomi Mi 5c.

Xiaomi Mi 5c smartphone key specifications:

  • SoC – Surge S1 octa-core 64-bit processor
  • System Memory – 3GB dual channel LPDDR3
  • Storage – 64GB eMMC 5.0 flash
  • Display – 5.15” ultra-bright display
  • Camera – 12MP camera
  • Misc – Front fingerprint scanner
  • Battery – 2860mAh battery for “full day battery life”; 9V/2A fast charging
  • Dimensions – 144.38 x 69.68 x 7.09mm
  • Weight – 132 grams

The phone runs Android 7.1 with MIUI, and will start selling for 1,499 RMB ($218) on March 3, 2017 in China.

More details, including lots of picture, about the new processor and Mi 5c smartphone can be found in Miui forums (in English), as well as Xiaomi Mi 5c product page. (in Chinese).

Via Liliputing

Linux 4.10 Release – Main Changes, ARM & MIPS Architectures

February 20th, 2017 3 comments

Linus Torvalds has just released Linux 4.10:

So there it is, the final 4.10 release. It’s been quiet since rc8, but we did end up fixing several small issues, so the extra week was all good.

On the whole, 4.10 didn’t end up as small as it initially looked. After the huge release that was 4.9, I expected things to be pretty quiet, but it ended up very much a fairly average release by modern kernel standards. So we have about 13,000 commits (not counting merges – that would be another 1200+ commits if you count those). The work is all over, obviously – the shortlog below is just the changes in the last week, since rc8.

Go out and verify that it’s all good, and I’ll obviously start pulling stuff for 4.11 on Monday. Linus

Linux 4.9 added Greybus staging support, improved security thanks to virtually mapped kernel stacks, and memory protection keys, included various file systems improvements, and many more changes.

Some newsworthy changes for Linux 4.10 include:

  • Virtual GPU support – Intel GVT-g for KVM (KVMGT) is a full GPU virtualization solution with mediated pass-through, starting from 4th generation Intel Core processors with Intel Graphics. Unlike direct pass-through alternatives, the mediated device framework allows KVMGT to offer a complete virtualized GPU with full GPU features to each one of the virtualized guests, with part of performance critical resources directly assigned, while still having performance close to native.
  • New ‘perf c2c’ tool, for cacheline contention analysis – perf c2c (for “cache to cache”) is a new tool designed to analyse and track down performance problems caused by false sharing on NUMA systems. The tool is based on x86’s load latency and precise store facility events provided by Intel CPUs. Visit C2C – False Sharing Detection in Linux Perf for more details about the tool.
  • Improved writeback management – Linux 4.10 release adds a mechanism that throttles back buffered writeback, which makes more difficult for heavy writers to monopolize the I/O requests queue, and thus provides a smoother experience in Linux desktops and shells than what people was used to. The algorithm for when to throttle can monitor the latencies of requests, and shrinks or grows the request queue depth accordingly, which means that it’s auto-tunable, and generally, a user would not have to touch the settings. Read Toward less-annoying background writeback for more details about this improvement.
  • FAILFAST support –  This release also adds “failfast” support. RAID disk with failed IOs are marked as broken quickly, and avoided in the future, which can improve latency.
  • Faster Initial WiFi Connection – Linux 4.10 adds support for using drivers with Fast Initial Link Setup as defined in IEEE 802.11ai. It enables a wireless LAN client to achieve a secure link setup within 100ms. This release covers only the FILS authentication/association functionality from IEEE 802.11ai, i.e., the other changes like scanning optimizations are not included.

Some notable ARM architecture improvements and new features:

  • Allwinner:
    • Allwinner A23 – Audio codec driver
    • Allwinner A31/A31s – Display Driver (first pipeline), audio codec support
    • Allwinner A64 – clock driver
    • Allwinner A80 – External SDIO WiFi
    • Allwinner H3 – Audio codec driver, SPI
    • New boards support: NextThingCo CHIP Pro, Pine A64, NanoPi M1
  • Rockchip:
    • Initial support for Rockchip PX5 & PX3 automotive platforms
    • Added Rockchip RK1108 evaluation board
    • Added support for Rikomagic MK808 Android TV stick based on Rockchip RK3066
    • Update Rockchip PCI driver to support for max-link-speed
    • Rockchip rk3399,rk3066 PLL clock optimizations
  • Amlogic
    • Support for the pre-release “SCPI” firmware protocol shipped by Amlogic in their GXBB SoC
    • Initial support for Amlogic S905D, and S912 (GXM) SoCs
    • Added support for Nexbox A1 and A95X Android TV boxes
    • Cleanup for the Amlogic Meson PWM driver
    • New Amlogic Meson Graphic Controller GXBB (S905)/GXL (S905X/S905D)/GXM (S912) SoCs (meson)
    • Resets for 2nd USB PHY
    • Initial support for the SD/eMMC controller in the Amlogic S905/GX* family of SoCs
    • Updated DTS to enable support for USB, I2C, SPI, maibox/MHU, PWM, ethernet MAC & PHY, secure monitor, IR, and watchdog.
  • Samsung
    • Device Tree for Samsung Exynos5433 mobile phone platform, including an (almost) fully supported phone reference board
    • Added support for TOPEET itop/elite board based on exynos4412
    • DeviceTree  updates:
      • Add Performance Monitor Unit to Exynos7.
      • Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
      • Cleanups and fixes for recently added TM2 and TM2E boards.
      • Enable ADC on Odroid boards
      • Remove unused Exynos4415 DTSI
  • Qualcomm
    • Add support for Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810) mobile phone SoCs
    • Added support for Huawei Nexus 6P (Angler) and LG Nexus 5X (Bullhead) smartphones
    • Support for Qualcomm MDM9615 LTE baseband
    • Support for WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
    • Other device tree changes:
      • Added SDHC xo clk and 1.8V DDR support
      • Add EBI2 support to MSM8660
      • Add SMSC ethernet support to APQ8060
      • Add support for display, pstore, iommu, and hdmi to APQ8064
      • Add SDHCI node to MSM8974 Hammerhead
      • Add Hexagon SMD/PIL nodes
      • Add DB820c PMIC pins
      • Fixup APQ8016 voltage ranges
      • Add various MSM8996 nodes to support SMD/SMEM/SMP2P
  • Mediatek
    • Added clock for Mediatek MT2701 SoCs
    • New Mediatek drivers: mtk-mdp and mtk-vcodec (VP8/VP9/H.264) for MT8173
    • Updated the Mediatek IOMMU driver to use the new struct device->iommu_fwspec member
  • Other new ARM hardware platforms and SoCs:
    • Hisilicon – Hip07 server platform and D05 board
    • NXP – LS1046A Communication processor, i.MX 6ULL SoC, UDOO Neo board, Boundary Devices Nitrogen6_SOM2 (i.MX6), Engicam i.CoreM6, Grinn i.MX6UL liteSOM/liteBoard,  Toradex Colibri iMX6 module
    • Nvidia – Early support for the Nvidia Tegra Tegra186 SoC, NVIDIA P2771 board, and NVIDIA P3310 processor module
    • Marvell – Globalscale Marvell ESPRESSOBin community board based on Armada 3700, Turris Omnia open source hardware router based on Armada 385
    • Renesas “R-Car Starter Kit Pro” (M3ULCB) low-cost automotive board, Renesas RZ/G (r8a7743 and r8a7745) application processors
    • Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices, Cloud Engines PogoPlug v3 based on OX820
    • Broadcom – Various wireless devices: Netgear R8500 router, Tenda AC9 router, TP-LINK Archer C9 V1, Luxul XAP-1510 Access point
    • STMicro  – stm32f746 Cortex-M7 based microcontroller
    • Texas Instruments – DRA71x automotive processors, AM571x-IDK industrial board based on TI AM5718
    • Altera – Macnica Sodia development platform for Altera socfpga (Cyclone V)
    • Xilinx – MicroZed board based on Xilinx Zynq FPGA platforms

That’s a long list of changes and new boards and devices… Linux 4.10 only brings few MIPS changes however:

  • KVM fixes: fix host kernel crashes when receiving a signal with 64-bit userspace,  flush instruction cache on all vcpus after generating entry code (both for stable)
  • uprobes: Fix uprobes on MIPS, allow for a cache flush after ixol breakpoint creation
  • RTC updates:  Remove obsolete code and probe the jz4740-rtc driver from devicetree for jz4740, qi_lb60
  • microblaze/irqchip: Moved intc driver to irqchip. The Xilinx AXI Interrupt Controller IP block is used by the MIPS based xilfpga platform and a few PowerPC based platforms.
  • crypto: poly1305 – Use unaligned access where required, which speeds up performance on small MIPS routers.
  • MIPS: Wire up new pkey_{mprotect,alloc,free} syscalls

You can also read Linux 4.10 changelog with comments only, generated using git log v4.9..v4.10 --stat, in order to get a full list of changes. Alternatively, you could also read Linux 4.9 changelog on kernelnewbies.org.

EU funded AXIOM Board is Powered by Xilinx Zynq UltraScale+ FPGA + ARM SoC

February 17th, 2017 9 comments

Back in 2015, Xilinx unveiled Zynq Ultrascale+ MPSoC combining ARM Cortex A53 & Cortex R5 cores, a Mali-400MP2 GPU, and UltraScale FPGA, and the company recently launched ZCU102 Evaluation Kit based on the SoC, which sells for just under $3,000. But if you are based in the European Union, you’ll be glad to learn about 4 millions Euros of your taxes have been spent to design a board based on the same MPSoC family as part of the AXIOM project, which was developed in collaboration with European universities and companies with the “aim of researching new software/hardware architectures for Cyber-Physical Systems (CPS) to meet the expectations” in terms of computational power, energy efficiency, scalability through modularity, easy programmability, and leverage of the best existing standards at minimal costs.

AXIOM (Agile, eXtensible, fast I/O Module) board’s key specifications:

  • SoC – Xilinx Zynq Ultrascale+ ZU9EG MPSoC with four ARM Cortex A53 cores @ 1.2GHz, two Cortex R5 “real-time” cores @ 500MHz, a Mali-400MP GPU @ 600 MHz, 600K System Logic Cells;
  • System Memory – 32 GB of swappable SO-DIMM RAM  (up to 32GB) for the Processing System, plus a soldered 1 GB Programmable Logic.
  • Storage – 8 GB eMMC flash (PCN layout supports up to 32GB), and a micro SD card reader.
  • Display – miniDP connector, single channel 24-bit LVDS interface, touch panel connector
  • Connectivity – Gigabit Ethernet port (RJ45)
  • USB – 4x USB Type C ports, 2x USB Type A ports
  • Expansion
    • Arduino UNO headers
    • 12x GTH transceivers @ 12.5 Gbps  (8 on USB Type C connectors + 4 on HS connector)

There’s also mention of an Axiom Link interface that would allow to interconnect multiple AXIOM boards in order to arrange small clusters.

Since it’s a public project I would have expected it to be open source. While there are some deliverables available for download, they appear to be outdated with “the technical specification of AXIOM board” PDF mentioning only AXIOM-15 and AXIOM-35 boards based on the previous Xilinx Zynq-7000 series SoCs. We can also find links to a Wiki, as well as git and svn repository, but all those are in a private area that requires a login, and as far as I could tell, it’s not possible to register. So maybe the EU commission wants to protect its investment, or we just need to be a little more patient. [Update: This Download page  seems to have more public info available]

Click to Enlarge

The AXIOM Board is said to combine features required for High-Performance Computing, Embedded Computing and Cyber-Physical Systems, with typical applications including real-time data analysis of a huge amount of data, machine learning, neural networks, server farms, bitcoin miners, and so on.

It’s unclear when/if the board will be available for sale, and at what price.

Via Board DB and Single Board Computers G+ community.