ARM Technology Conference (TechCon) 2013 will take place on October 29 – 31, 2013, in Santa Clara, and the detailed schedule for the event has just been made available. In the previous years, the conference was divided into Chip Designs day (1 day), and the other 2 days were reserved for Software & System Design, but this year it does not appear to be the case. Whether you’ll be able to attend the event or not, it’s worth having a look at what will be discussed there in order to have a better understanding of what will be the key ARM developments in the near future in terms of hardware and software.
There will be around 90 sessions categorized into 15 tracks:
- Accelerating Hardware Development – This track explores the resources, tools, and techniques that designers can employ to quickly bring hardware to market. Topics include multicore design, ARM IP, chip buses, analog integration, simulation, FPGA prototyping, design synthesis, debugging and certification.
- Accelerating Software Development – Topics include open-source software, RTOSes, Android, Java, libraries, CMSIS, software development tools, development boards, hardware simulation, debug tools, optimization and analysis tools, test tools and certification.
- Accelerating System Hardware Development – This track explores the tools and techniques for getting system hardware development rapidly launched and landed. Topics include single board computers (SBCs), development boards, RF modules, analog front ends, FPGAs, ESL tools, hardware simulation and novel techniques for rapidly assembling a functional design.
- Applying New Technologies to New Opportunities – This track explores new chip design technologies and new applications and their impact on one another. Topics include 14nm and beyond, graphics and multimedia, servers and enterprise-class processing, gateways, high speed interfaces, ultra-low power, energy harvesting, machine vision, advanced networking, medical instrumentation, automotive systems and voice recognition.
- Building a Foundation for Safety and Security – This track explores the chip-level and software foundations for system safety and security, including things such as as multi-core and redundant architectures, TrustZone system security technology, trusted execution environments, encryption, tamper detection and hardware/software security partitioning, as well as the hardware elements for safety-related systems such as healthcare and vision processing in advanced driver assist in automobiles.
- Creating the Next Gen Mobile Platform – This track explores the kinds of features and system requirements mobile devices will need to provide, and the techniques and resources needed to bring those designs to market. Topics include multicore design, multimedia and graphics, GPU computing, haptics, networking, security, high speed and wireless interfaces, GUI design and development, operating systems and power management.
- Empowering System Security – This track explores the requirements, tools, and techniques for providing security in system designs at both software and hardware levels. Topics include encryption, trusted execution environments (TEE), TrustZone system security architecture, biometrics, tamper detection, remote management, application whitelisting and blacklisting, software certificates, network attack vulnerabilities and key protection.
- Enhancing the User Experience – This track explores the tools and techniques for enhancing a consumer’s experience of your device, from high-end through resource constrained. Topics include touchscreens, haptics, multimedia, gesture recognition, GPU computing, accelerometers, sensor fusion, voice recognition, voice synthesis and GUI design and development tools.
- Kickstarting ARM Embedded Development – This track provides you with the information and insights needed to ease your path and begin development. Topics include ARM architectures, new device releases, development kits, development tools, software IP, libraries, 8- to 32-bit migration, code reuse, CMSIS and more.
- Marrying Software and Hardware in Multicore Design – This track explores the interaction between hardware design and software structure as well as the techniques for ensuring an optimal working relationship between the two. Topics include big.LITTLE processing, graphics processing, redundant computing, distributed computing operating systems, software partitioning, multi-core debugging and software optimization.
- Maximizing Chip Energy Efficiency – This track explores the processes, structures, and approaches that will help keep device power minimized without sacrificing performance. Topics include semiconductor processes, clocking and power management, big.LITTLE and other multicore architectures, sleep modes, smart peripherals, dynamic clocking, analog integration, RF integration and other design techniques for reducing device power requirements.
- Next-Generation Networking – Rise of Software Defined Networking – This track explores advanced and high-performance networking architectures, approaches, and implementations, including such topics as software defined networking (SDN), network function virtualization (NFV), high speed interfaces, wireless, security and carrier-class platforms.
- Optimizing System Software Blocks – This track explores options in system software and the tools and techniques for optimizing software performance and resource requirements. Topics include Android, Linux, OSes, RTOSes, GUI design, libraries, drivers, development tools, debugging tools, certification and software test tools.
- Stacking Up for High Performance Design – This track explores multicore architecture and design, looking at criteria such as core selection and integration, clock and power management, and shared memory architectures as well as other approaches to increasing the processor resources available on chip in the light of their performance and power implications. Topics include such things as hardware accelerators, graphics processors, big.LITTLE processing, clocking and power management, high-speed interfaces and SoC design.
- Taming the IoT Frontier – This track seeks to explore a wide range of techniques and technologies that will help system developers quickly stake their claim in the IoT frontier. Topics include RF modules, sensors, networking, gateways, WiFi, Bluetooth, Zigbee, battery-powered design, energy harvesting, analog interfaces, cloud services, and security.
I’ve used the schedule builder to select some of the tracks that I find interesting during this 3-day event:
Tuesday – 29th of October
This class discusses multicore from a more traditional embedded viewpoint.
According to Cisco, the Internet of Things (IoT) is expected to connect more than one trillion objects by 2020. Through extreme interconnectivity, devices and objects are morphing into connected experiences that will have a profound impact on everything from cities to healthcare to households. This live demonstration shows how anyone can build, connect, operate, and capitalize on the IoT opportunity. The combination of ARM mbed and the LogMeIn Xively platform accelerates time to market, as developers can rapidly progress from prototyping to volume deployment. Attendees will leave with an action plan for deploying their own IoT-enabled products.
Multicore ARM platforms are becoming the norm in embedded applications and smartphones. However, most developers do not understand the underlying hardware architecture and what that means to their software-development approach. This presentation leads attendees through the issues, such as process migration and caching control, that can increase application performance an order of magnitude or more. We discuss techniques to avoid multicore race conditions, common scheduling issues, and how to bind user threads and integrated services routers to specific processor cores in Linux and Android to guarantee the maximum performance and temporal correctness of applications and kernel code.
This session introduces both a development environment for people who are starting to use BeagleBone or BeagleBone-like ARM boards and the whole ecosystem behind OpenEmbedded. It goes through such tools and techniques as generating images, generating package feeds, customizing images, and adding your own software to images. Developers can generate their own SDKs and use them outside of the Angstrom Linux distribution that’s shipped with BeagleBone so they can write applications. The loop is closed by showing how applications are knotted into Angstrom to become part of images. Angstrom also maintains feeds for BeagleBone, which means application developers can utilize it without rebuilding the platform software.
- 15:30 – 16:20 – Server Solutions from ARM by Ian Forsyth, Senior Product Marketing Manager, High Performance Application Processors, ARM, and Aniket Saha | Product Manager, ARM
The server landscape is rapidly shifting, with workload profiles bifurcating into compute-intensive and scale-intensive. ARM designed its latest Cortex-A50 line of 64-bit processors for the needs of this evolving server workload in the enterprise data center. ARM servers can deliver high performance at a higher efficiency than similar technology based on x86-class processors. This paper details ARM-based server solutions and ecosystem developments.
Wednesday – 30th of October
SmartMesh IP is the latest generation of low-power wireless mesh solutions by the Dust Networks Product group at Linear Technology. It combines the ease of use of IPv6 and 6LoWPAN with the wired-like reliability of IEEE802.15.4e Time Synchronized Channel Hopping. It runs on the custom-built Eterna chip, which combines an ARM Cortex-M3 MCU, with an ultra low-power IEEE802.15.4 wireless radio. This gives a SmartMesh IP mote years of battery life. This session starts by discussing the challenges of building a reliable low-power wireless solution and how these were overcome in the development of SmartMesh IP. We then highlight how customers are integrating these networks, either by driving the mote with an external micro-controller over a serial port or by developing custom firmware directly on the SmartMesh IP device. Through a number of hands-on demonstrations, we present the ecosystem available to simplify integration.
GPU computing on the ARM Mali-T600 series of GPUs offers a host of benefits: it accelerates data-parallel computation while reducing system work load; reduces platform energy consumption while increasing system throughput; and enhances your system’s value by consolidating functionality while reducing programmer effort. In this talk, we show how ARM Mali-T600 processors deliver such benefits on shipping devices. By analyzing ecosystem partners’ use cases, we highlight trends in GPU computing: computational photography, computer vision, and image processing.
The Internet of Things (IoT) is a huge opportunity, as well as a huge design problem. Your key to success is to avoid trying to do everything yourself. We explore the barriers to growth and the practical steps to breaking them down, with insights from early companies in the field as well as ARM’s own engineers. Among the several key points: Today, online products are delivered vertically integrated: one vendor delivers devices, gateway, cloud services, analytics, and user-experience aspects. Increasingly, commercial necessity is forcing providers to think open and embrace a horizontal ecosystem. Different link layers such as ZigBee and WirelessHART are here for a while, but between them and the application is a layer of great commonality from application to application, ripe for standardization. The talk includes practical tips for designing devices and services for the IoT that take advantage of interoperability, lower cost, and better user experience, including easy pairing, pub-sub, and preparing for IPv6 in an IPv4 world.
As industry projections for entry-level smartphones soar, it is ever more important to achieve the required performance within ever tighter power, cost, and timescale constraints. This presentation describes how to build an extremely efficient processing subsystem, based on the very latest, lowest-power ARM Cortex-A class processors, Mali graphics and video processors, and CoreLink PD-System IP. Key factors explored are power management, cost/benefit of GPU coherency, optimal sharing of memory bandwidth, and minimizing area and IP costs.
Now that the RTX full-featured real-time operating system is under a BSD license, it really is free. RTX, part of the CMSIS-RTOS standard, has found applications in thousands of products. Created and maintained by Keil, it includes all source code. RTX is not crippled or limited in any way. Ports are provided for Keil MDK, GCC, and IAR.
This seminar looks at the overall features of RTX and shows how easy it is to implement in any project. Included are a live demonstration of the two kernel-awareness windows that are part of Keil MDK and CMSIS-RTOS and a discussion of implementation details.
Thursday – 31st of October
Understanding the compilation process is crucial to generating the tightest code from your source code. Compiler technology has not yet run it course, and new cutting-edge optimizations have made enormous savings in execution and code size. This talk surveys a few of my favorite optimizations: some are old but highly effective, others are virtually unknown outside the close community of compiler developers. All of them, in my opinion, are fascinating.
The mbed online environment (SDK, online tools, active community of developers, and a large selection of reusable code) has been widely adopted by developers as the rapid prototyping environment of choice for ARM-powered microcontrollers. These tools combined with mbed-enabled hardware are great for prototyping designs, but what about taking those next steps to production? This session presents options for starting with mbed as a prototyping environment and moving to full production with the use of Freescale development hardware, the open-source mbed SDK and HDK, and the rich ARM ecosystem of hardware and software tools.
You can make your C code better uickly, cheaply, and easily. Simple techniques can yield surprising improvements in system performance, code size, and power consumption. This session looks at how software applications can make most efficient use of the underlying architecture to deliver significant improvements in performance, code size, and power consumption. All you need is a little inside knowledge about the ARM architecture. You will learn tricks that you can use the day you get back to your office.
ARM processors are increasingly used in automotive applications such as In-Vehicle Infotainment (IVI), Advanced Driver Assistance Systems (ADAS), powertrain, chassis and body control. Moreover, there are emerging opportunities in Vehicle-to-Vehicle and Vehicle-to-Infrastructure (V2V, V2I) applications which further extend the scope and sophistication of computation systems in vehicles of the future. These developments are driving the next generation of automobile electronics and ARM is enabling use of its technology throughout the automotive industry. This presentation will introduce the technology behind some of these applications in more detail and describe where and how ARM processors are used in automotive electronics and associated infrastructure applications. Today’s automotive designs are challenged by the cost and complexity of so much advanced hardware and software. However, ARM technology will deliver solutions to these challenges, such as processors capable of enabling.
In the embedded developer space, we are hearing more about open-source low-cost development platforms such as mbed, Arduino, Raspberry Pi, and BeagleBoard that provide powerful enablers to quickly develop proof-of-concepts demos. As these products move from proof of concept to product development, continued use of open source has obligations. These obligations and risks apply to the developer and the end-users.
This year’s topics are very much a continuation of last year’s, with sessions dealing with ARM servers, the Internet of things, software and power optimization, multicore handling, etc…
If you would like to attend ARM TechCon 2013, you can register online. An alternative is to pay on-site (Regular), but it will cost you, or your company.
Ends August 2
Ends September 6
Ends October 25
|All Access Pass
The best discount ends tomorrow (2nd of August 2013). Professional working for academia or/and the government can get discount by contacting Linda Kuehn at [email protected].