Archive

Posts Tagged ‘intel’

$50 Intel Edison Board for Wearables Features an SoC with a Dual Core Atom Processor, and a Quark MCU

September 10th, 2014 7 comments

Intel announced the Edison board for wearables applications last January at CES 2014. When it first came out, it looked like an SD card, but the board look has now drastically changed. Nevertheless, the important point is that Intel Edison is now available, together with various development kits, and runs Linux (Yocto built), as well as an RTOS.

Intel_Edison_ModuleWith the official release, we’ve also got the full specifications:

  • SoC – Dual-core, dual-threaded Intel Atom (Silvermont) processor (22nm) processor @ 500 MHz and a 32-bit Intel Quark micro-controller @ 100 MHz. Includes 1GB LPDDR3 PoP memory
  • System Memory – 1 GB LPDDR3 (PoP memory) – 2 channel 32bits @ 800MT/sec
  • Storage – 4 GB eMMC (v4.51 spec) + micro SD card connector
  • Connectivity -  Dual band 802.11 a/b/g/n Wi-Fi (Broadcom 43340) with either an on-board antenna or external antenna, and Bluetooth 4.0
  • USB – 1x micro USB connector
  • I/Os:
    • 2x UART  (1 full flow control, 1 Rx/Tx)
    • 2x I2C, 1x SPI with 2 chip selects
    • 1x I2S
    • 12x GPIO including 4 capable of PWM output
  • Module connector – 70-pin connector (Hirose DF40 series – 1.5, 2.0, or 3.0 mm stack height)
  • Power Supply – Input: 3.3 to 4.5 V; Output: 100mA @ 3.3V and 100 mA @ 1.8V
  • Power consumption – Standby (No radio): 13 mW;  Standby (Bluetooth 4.0): 21.5 mW (BLE in Q4 2014);  Standby (Wi-Fi): 35 mW.
  • Dimensions – 35.5 × 25.0 × 3.9 mm
  • Temperature Range – 0 to 40°C

The company will provide Yocto 1.6 Linux for the two cores of the Atom processor, and the Quark MCU will run an unnamed RTOS. Development tools for the Atom cores includes the Arduino IDE, Eclipse with support for C, C++ and Python programming languages, and Intel XDK for Node.JS and HTML5 development. An SDK and IDE will be available for the Quark MCU. Intel IoT Analytics Platform is the cloud solution adopted for the board, and will be free for limited and non-commercial use.

Intel Edison Arduino (Click to Enlarge)

Intel Edison Board for Arduino (Click to Enlarge)

Edison is basically a module, so it might be useful to have a baseboard, and Intel has come up with two:

  • Intel Edison Board for Arduino – Board with Bluetooth and Wi-Fi, and headers compatible with Arduino UNO expect it only supports 4 PWM instead of 6.
  • Intel Edison Breakout Board – Minimal board with the following key features:
    • Exposes native 1.8 V I/O of the Edison module.
    • 0.1″ grid I/O array of through-hole solder points.
    • USB OTG with USB Micro Type-AB connector
    • USB OTG power switch.
    • Battery charger.
    • USB to device UART bridge with USB micro Type-B connector.
    • DC power supply jack (7 to 15 VDC input).

Documentation including a product brief, hardware guides for Edison board for Arduino and the Breakout board, the Arduino IDE, and the instructions to get the Yocto BSP can be downloaded on Intel’s Edison Board page.

Intel Edison is available for backorder on Sparkfun for $49.95, and Edison for Arduino and Edison Breakout Board kits are listed Maker Shed for respectively $107 and $75, but currently out of stock. There’s also a Starter Pack on Sparkun for $114.95. Shipping is expected in 6 to 8 weeks.

Thanks to David and Freire.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Intel Reference Design Program for Android Promises Devices with Firmware Updates Tracking AOSP for 2 Years

September 10th, 2014 8 comments

If you’ve ever bought a low cost Chinese smartphone or tablet, you must know you can’t really expect firmware updates, especially with a different Android version. For example, if you’ve purchased an Android 4.1 phone or tablet a couple of years ago, more likely than not, it’s still stuck to the same version. Intel intends to change all that by launching the Intel Reference Design Program for Android.

Intel_Reference_Design_for_AndroidYes, Intel has provided reference designs in the past, but this program goes further, especially with regards to Android support, and firmware updates.

This is the way it all works:

  1. Manufacturers can choose a set of pre-qualified components to build their Android device.
  2. Intel will provide a single Android image that works with the drivers to support all components.
  3. Intel will take care of GMS (Google Mobile Service), and CTS (pre-)certification for their customers.
  4. Intel has committed to provide updates within 2 weeks of an AOSP update, for 2-year post-device launch.

So if you buy a new tablet part of Intel Reference Design Program for Android, you won’t have to worry about firmware upgrades, and you should get an image based on the latest AOSP release on your device within 2 weeks of a release.

Usually “reference design” refers to a single hardware design that manufacturers can copy, but in this case, I understand Intel solution will allow for more flexibility in the design, as they’ll support several touchscreen panels, displays, sensors, etc…, and it will be up to the OEM/ODM to select the ones they want in their design.

Details of the program do not seem to be available online, and they’ll probably need to find a way to indicate which Intel tablets are compliant with the program, so that consumers know which devices are actually supported.

Via Liliputing

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Intel Unveils Broadwell-Y Core M Processors with 4.5W TDP: 5Y70m 5Y10 and 5Y10a

September 7th, 2014 5 comments

ARM still have an edge in terms of power efficiency, but Intel has historically had an edge when it comes to process technology, and the company has announced their first 14-nm processors with three Broadwell Core M SoCs. The new process will also help with power efficiency, as all processors have 4.5W TDP, and Intel claims a Core M laptop will deliver twice the compute performance, and seven times more graphics processing power compared to a 2010 laptop powered by a 18W Core i5 processor, while doubling the battery life. Compared to more recent 4th generation Intel Core “Haswell” CPU, the new chips are said to offer up to 50 percent faster CPU performance and 40 percent graphics on a performance-per-watt basis.

Intel_Core_M_Die_Map

The company reveals three Core-M processors: 5Y70, 5Y10, and 5Y10a, all dual core / quad thread processor with base frequencies between 800 and 1,100 MHz, and turbo frequencies between 2 and 2.6 GHz, as well as an an Intel HD 5300 GPU clocked at 800 or 850 MHz depending on the model. The differences between the three processors are listed in the table below (Source: Anandtech)

Intel Core M Specifications
Core M-5Y70 Core M-5Y10a Core M-5Y10
Cores / Threads 2 / 4 2 / 4 2 / 4
Base Frequency / MHz 1100 800 800
Turbo Frequency / MHz 2600 2000 2000
Processor Graphics HD 5300 HD 5300 HD 5300
IGP Base Frequency / MHz 100 100 100
IGP Turbo Frequency / MHz 850 800 800
L3 Cache 4 MB 4 MB 4 MB
TDP 4.5 W 4.5 W 4.5 W
LPDDR3/DDR3L Support 1600 MHz 1600 MHz 1600 MHz
Intel vPro Yes No No
Intel TXT Yes No No
Intel VT-d/VT-x Yes Yes Yes
Intel AES-NI Yes Yes Yes

5Y10 and 5Y10a are very similar (all specs are identical in the table above), but Anandtech reports one of Intel slides indicates that 5Y10 supports “4W Config Down TDP” (cTDP Down). The GPU will support DirectX 11.2, OpenGL 4.2, and OpenCL 2.0, support UHD resolution, and Intel Quick Sync Video, which should allow up to 1.7 hours extra battery life with a 35Whr battery compared to previous generations. If you want more technical information, you may want to visit Intel Core M page where you’ll find a product brief, and two datasheets.

Intel Core M processors will be found in thin (<9 mm), fanless 2-in-1 tablet/nodtebook hybrids and laptops that will be available later this year. Five companies have announced products with the latest low power chips by Intel: Acer (Aspire Switch 12), ASUS (Zenbook UX305), Dell (Latitude 13 7000 Series), HP (ENVY x2), and Lenovo (ThinkPad Helix). Since all three Core M SoCs have a price of $281 (1k order), they will only be found in high-end laptops or tablets, and all products aforementioned sells for around $1,000 or more. You can get a run-down of four of the devices on Liliputing.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Embedded Linux Conference Europe 2014 Schedule – IoT, ARM vs x86, Optimization, Power Management, Debugging…

August 21st, 2014 2 comments

The Embedded Linux Conference Europe (ELC 2014), CloudOpen, and LinuxCon Europe will jointly take place at the Congress Centre Düsseldorf, in Germany on October 13 – 15, 2014. The 3-day events will consists of keynotes, presentations, and tutorials. Each day will open with two or three keynotes by speakers including  Jim Zemlin (Executive Director, Linux Foundation), and Jono Bacon (XPRIZE), followed by presentation and tutorials. There will be 45 presentations for ELCE, 58 for LinuxCon, and 47 for CloudOpen, I’ll make a virtual schedule with a few sessions part of the Embedded Linux Conference Europe “track”.

ELCE_2014

Monday, October 13

When faced with a performance problem, the initial steps towards a solution include identifying the sections of code responsible and the precise reasons they are time-consuming. To this end, the ‘perf’ profiling tools provide valuable insight into the characteristics of a program. The presentation will show, using real-world examples, how the ‘perf’ tools can be used to pinpoint the parts of a program in need of optimization.

It’s not uncommon to produce embedded Linux based devices that end up with long and inconvenient boot times – yet eliminating boot time delays can be difficult and time consuming. Furthermore once a minimal boot time has been achieved it’s often just as difficult to maintain it through subsequent software development.

In this presentation, Andrew unfolds 12 keys lessons learned in his experience of boot time reduction. These lessons provide an insight into the common causes of boot time delays, why they are present and how they can be overcome. In describing these lessons Andrew will also take you on a journey that indicates why file system benchmarks should probably be ignored (with respect to boot time reduction) and a journey that illustrates that the Linux kernel is rarely the worst offender for boot delays.

With the introduction of Bluetooth Smart (aka Low Energy), the ubiquity of Bluetooth is more and more present. Millions of devices support Bluetooth Low Energy and with Bluetooth 4.1 specification, they are ready for the Internet of Things. This presentation will give an overview of Bluetooth Low Energy, and its usage for the Internet of Things. It will also introduce 6loWPAN over Bluetooth and show the possibilities this opens for Linux.

With experience developing community based open hardware for both the ARM based PandaBoard project and the x86 based MinnowBoard project, this presentation will provide a detailed comparison of the pros and cons of each platform with highlights of what each platform can learn from the other. Not only limited to the hardware aspect of the platforms, but also discuss community, software, corporate and general embedded aspects.

For almost as long as there have been deployments of Linux, there has been someone wondering “how can I get the device started quicker?” and “how do I configure some redundancy, easily, in case something goes wrong?”. And for the longest time, the answer has been “hack this and this and that” or “hire these consultants, they have done it before”. In this presentation, Tom will show what you need to turn on and the prep work required for, getting a lot of those items out of the box in U-Boot, what the hardware (and/or ROM) needs to do, and the what works is left going forward.

Got a question, comment, gripe, praise, or other communication for the Yocto Project and/or OpenEmbedded? Or maybe you’d just like to learn more about these projects and their influence on the world of embedded Linux? Feel free to join us for an informal BoF.

Tuesday, October 14

While user experiences are increasingly moving to 3D, rendering of 2D content remains at the core of how we interact with computer applications today. Skia is an open-source project maintained by Google whose goal is to bring the best 2D graphics library to a variety of targets, from mobile to desktop and embedded. Skia is used in highly popular projects like Mozilla Firefox, the Chromium browser and Android.

This talk will introduce Skia to developers and users, giving an overview of its design, architecture and features. It will also discuss briefly how hardware acceleration improves performance of Skia in the context of new devices, form-factors and the industry shift to mobile; with focus set on Linux and Android platforms.

The 4.4 KitKat release includes the results of “Project Svelte”: a set of tweaks to the operating system to make it run more easily on devices with around 512 MB RAM. This is especially important for people working with Android Wearables and “Embedded Android”, that is, implementing Android on devices at the lower end of the Android ecosystem. A large part of the problem is knowing how much RAM is really being used. Android offers a variety of tools for the purpose: procrank, procmem, meminfo and procstats, which Chris covers in the first part of the talk. In the second part, he takes a real-world example and show the practical steps you can take to optimize memory use including tuning the size of the Dalvik heap, enabling KSM (Kernel samepage merging) and swap to zRAM.

Android has relied from its early days on the Linux kernel for sandboxing the processes it runs. Yet, the permission model presented to app developers is significantly different from the Unix permission model. What’s the relationship between those two models? How is Android’s app security framework tied to the Linux kernel’s security model? More recently, Android has started using SELinux and has been extended by SEAndroid to support similar functionality. How is SELinux used by Android and what is SEAndroid about? Furthermore, how does Android provide support for multiple users?

This talk will explore Android’s security model in great detail and explain how the functionality found in the kernel is used to isolate user processes and the SE enhancements are leveraged by Android. As we’ll see, there are quite a few moving parts in Android’s security model.

Since last year, Free Electrons has been working on supporting the SoCs from Allwinner, a Chinese SoC vendor, in the mainline kernel. These SoCs are cheap, wide-spread, backed by a strong community and, until last year, only supported by an out-of-tree kernel. Through this talk, Maxime will share the status of this effort: the status a year ago, what solutions were in place, where we are currently, and what to expect from the future. He will also focus on the community around these SoCs, the work that is done there, etc.

Enlightenment Foundation Library is a set of libraries designed to use the full potential of any hardware to do great UI. It has been designed with the embedded devices in mind, but it is a desktop class toolkit. Being done in C, it is providing a stable API/ABI, high efficiency, low memory and low battery usage for all kind of Linux devices. Enabling development of modern UI adapted to any hardware that run Linux. These are the reason why Samsung uses it in its Tizen devices. This talk, after a short overview of what this libraries cover, will focus on this year improvement, and where it is heading. It will also be an opportunity to learn about project around EFL that will help people develop product with it. And it would also be a good opportunity to see where EFL are used with some real use case.

Wednesday, October 15

A major issue the community faces is the lack of power measurement (PM) instrumentation, coupled with poor integration: development boards not designed for it, expensive high-precision lab equipment not accessible to hobbyists (plus limited Linux support), limited low-cost solutions (precision, sampling rate) to monitor high-performance SoC (System On Chips) platforms (e.g. smartphones, tablets, IoT, …). After a brief introduction to the problematic (PM techniques, sense resistor / ADC selection, …) and a comparative study of existing solutions, this presentation will focus on a new upcoming initiative to close these gaps and bring a full-blown multi-channel but low-cost power (and temperature) measurement equipment to the community, including the definition of an open standard PM connector. After having covered motivations, challenges, key decisions, a live demo will close the talk.

In 2013, at the Embedded Linux Conference in Europe in Edinburgh, there was a race between a dog and a blimp. It was said that despite the dogs win, that the blimp had participated in the miracle of flight. In 2014, John wants to show that the brains of that dog can be transplanted and that it too, can participate in the miracle of flight. The talk is mainly targeting taking an off the shelf embedded platform, Minnowboard Max, and it’s use in UAVs, specifically quad-copters. With the ability to do real time computer vision, as well as various GPIO capabilities he will explore the directions that significantly more autonomous UAVs can take with Linux and embedded platforms using, mostly, off the shelf components.

There have been many presentations on what a device tree looks like and how to create a device tree. This talk instead examines how the Linux kernel uses a device tree. Topics include the kernel device tree framework, device creation, resource allocation, driver binding, and connecting objects. Troubleshooting will consider initialization, allocation, and binding ordering; kernel configuration; and driver problems.

Providing real-time capabilities to a general purpose operating system is an outstanding technical problem, and Linux Preempt-RT has been developed for 10 years for this goal. In this presentation, Jim proposes a lightweight open source para-virtualization layer, called “rtmux”, using resource-multiplexing techniques to provide a highly deterministic RT environment for Linux/ARM. Typically, less than 500 lines modification against Linux kernel are required to enable rtmux accompanied by POSIX/PSE51 compatible runtime.

During the last 2.5 years, a team of engineers at Free Electrons has been involved in mainlining the support for several ARM processors from Marvell, converting the not-so-great vendor-specific BSP into mainline quality code progressively merged upstream. This effort of several hundreds working days, has led to the integration of hundreds of patches in the kernel. Through this talk, Thomas will share some lessons learned regarding this mainlining effort, which could be useful to other engineers involved in ARM SoC support, as well as detail the steps Free Electrons engineers have gone through, the mistakes made and how they’ve been solved, as well as their overall experience on this project.

To make your own schedule matching your interests, you can check out the events’ program.

To attend the conference, you can register online.

The fees are listed as follows:

  • All-access Registration Fee – $600 until August 22 (tomorrow), $750 until October 2, and $850 afterwards
  • Attendee Networking Pass Registration – No access to conference sessions. $250 until August 22, $300 afterwards.
  • Student Registration Fee – $200 (valid student id required).
  • Registration Discount Scholar – $300. For active open source community members who can’t be sponsored by their company. .

Fees are significantly higher than last year, because there are only all-in-one (ELCE, CloudOpen and LinuxCon )options, and you can’t simply register to one single event.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

XBMC / Kodi 14 Ported to Tizen 3.0 Wayland

August 17th, 2014 4 comments

XBMC, soon to become Kodi with version 14, is now supported in Linux, Windows, Mac OS X, Android, and iOS. But Kodi 14 may soon support Tizen, as Phil C., a Tizen developer, ported the alpha version of Kodi 14 to Tizen 3.0, and showcased it on an Intel “Bay Trail” NUC powered by Intel Atom E3815 single core processor.

XBMC_Kodi_Tizen_3.0

Intel 3815 NUC is officially supported by Tizen and an image is available for download, so most of the work was to build Kodi 14 Alpha, install required packages, and configure some scripts. The video below shows XBMC/Kodi 14 UI running on Tizen 3.0, and a video played from YouTube, and after about 3 minutes, he explains how to modify the BIOS to have the system boot and work properly for the rest of the video.

If you happen to own an Intel E3815 NUC, but it could also work on a regular PC with Tizen installed, you can try this image by yourself by following the instructions below:

    1. Download tizen-xbmc-0.0.20140621rzr.img.xz
    2. Extract it and dump it to a USB flash drive (4GB or more) from a Linux terminal:
      xz -d *.xz
      sudo dd if=*.img of=/dev/sdX bs=64k
      sudo sync

      where X is the letter for your flash drive. You can check with lsblk.
      It can also be done from Windows with USBWriter or Win32DiskImager.

    3. Connect the USB flash drive to your target machine, and go to the BIOS to enable USB boot to start the image.

For faster performance, you may also consider copying the USB flash drive files to Intel NUC’s eMMC in /usr/local/ directory.

Via Tizen Experts

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Sharks Cove Intel Atom Bay Trail-T Development Board for Windows and Android is Now Available for $299

July 30th, 2014 No comments

When Intel announced their Sharks Cove development board, they did not provide that much information, except for the fact that it aimed at Windows development, it would be easy to buy for hobbyist, and provided a picture of the board. The board has now been launched, is available for pre-order for $299, and technical details have been published.

Intel_Sharks_CoveIntel Sharks Cove specifications:

  • Soc – Intel ATOM Processor Z3735G, 2M Cache, 4 Core, @ 1.33GHz (Burst frequency: 1.88GHz) with Intel HD Graphics
  • System Memory – 1GB 1×32 DDR3L-RS-1333
  • Storage – 16GB EMMC 4.5, micro SD Card slot, 2MP SPI NOR
  • Video Output / Display – HDMI connector and MIPI Display Connector
  • Audio – Realtek ALC5640 audio codec, 3.5mm stereo headphone jack, header for speaker, and on-board digital mic
  • Connectivity – None. But Ethernet or WiFi can be added through USB.
  • USB – 1x USB 2.0 type A connector, 1x micro USB type A/B for debugging, 1x micro USB type A/B for power
  • Debugging – micro USB, SPI debug programming header, LED display
  • Expansion headers:
    • 12x 10-pin header connectors for god knows what various I/Os (GPIO, I2C, USB, Touch, UART, SDIO…)
    • 1x 20-pin header for sensors
    • 2x 60-pin MIPI connector for display and camera
    • 5x 4-pin headers for power
  • Misc – Power, Vol -/+, rotation, and home screen buttons. DIP swtiches to disable/enable features
  • Power – 5V/2.5A via power barrel or micro USB port
  • Dimensions – 4″ x 6″ (10.16 x 15.24 cm) type 3 board with 4 stand-offs

The board also features Intel UEFI BIOS, and although it won’t ship pre-loaded with an image, Microsoft provides either Windows Embedded 8.1 Industry Pro Evaluation (180-day free trial, aka evaluation version) or Windows Embedded 8.1 Industry Pro with Update (x86)  (Requires an MSDN subscription, aka full version). The board can also support Android, but details haven’t been provided yet.

Sharks Cove Block Diagram (Click to Enlarge)

Sharks Cove Block Diagram (Click to Enlarge)

As you can see from the picture, hardware features and price, it is not a typical low cost development board. It targets  “hardware developers enabling devices for x86 based tablets” and “Developers of new products and market segments for Atom”.

You can read the full specs (PDF – 36 pages), and/or the getting started guide (Windows 8.1) for more information. The official website is Sharkscove.org.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Intel Announces Galileo Gen 2 Development Board Based on Quark SoC

July 16th, 2014 3 comments

As many of us are waiting for our Intel Galileo board promised by Microsoft, and right after the Raspberry Pi foundation announced the Raspberry Pi Model B+, Intel has introduced a new version of the Galileo board which they simply call Galileo Gen 2. The development board is still powered by Intel Quark single core SoC (Pentium class) and with the same key features as the original Galileo Board, but with some tweaks based on the feedback from the community.

Intel Galileo vs Intel Galileo Gen 2 (Click to Enlarge)

Intel Galileo vs Intel Galileo Gen 2 (Click to Enlarge)

Intel Galileo Gen 2 specifications (Changes in Bold):

  • SoC- Intel Quark SoC X1000 single core, single-thread application processor @ 400 MHz, with 12KB embedded SRAM
  • System Memory – 256MB DDR3, 5
  • Storage – 8MB NOR fklash, 8KB EEPROM, and micro SD card slot (up to 32GB)
  • Connectivity – 10/100M Ethernet
  • USB – 1x USB 2.0 host port, 1x micro USB 2.0 device port used for programming
  • Debugging / Programming
    • 10-pin JTAG
    • 6-pin 3.3V USB TTL UART header (replaces 3.5mm jack RS-232 console) for better compatibility with existing debug boards.
    • 6-pin ICSP
  • Expansion
    • full-sized mini-PCI Express slot
    • Arduino Uno R3 headers that support most Arduino shields:
      • 20x digital I/O (12x fully native speed)
      • 6x analog inputs
      • 6x PWMs with 12-bit resolution
      • 1x SPI master
      • 2x UARTs (1 shared with console UART)
      • 1x I2C master
  • Power
    • 7 to 15V via power barrel (instead of just 5V)
    • Optional 12V PoE support
  • Dimensions – 123.8 mm (L) × 72.0 mm (W)

Another improvement is that console UART1 can be redirected to Arduino headers in sketches, which can eliminate the need for soft-serial. The board is still programmable with the Arduino IDE in Windows, Mac OS or Linux operating systems, and  supports Yocto 1.4 Poky Linux release. The company also claims the board is open source hardware with schematics, Cadence Allegro board files, and bill of materials (BOM) available for download (soon).

The board will be available in August, for $60 according to MakerFlux. You can find more information, and download some documentation such as schematics (PDF), a getting started guide, and product brief on Intel Galileo Gen 2 page.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter