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Posts Tagged ‘intel’

Intel Announces Galileo Gen 2 Development Board Based on Quark SoC

July 16th, 2014 3 comments

As many of us are waiting for our Intel Galileo board promised by Microsoft, and right after the Raspberry Pi foundation announced the Raspberry Pi Model B+, Intel has introduced a new version of the Galileo board which they simply call Galileo Gen 2. The development board is still powered by Intel Quark single core SoC (Pentium class) and with the same key features as the original Galileo Board, but with some tweaks based on the feedback from the community.

Intel Galileo vs Intel Galileo Gen 2 (Click to Enlarge)

Intel Galileo vs Intel Galileo Gen 2 (Click to Enlarge)

Intel Galileo Gen 2 specifications (Changes in Bold):

  • SoC- Intel Quark SoC X1000 single core, single-thread application processor @ 400 MHz, with 12KB embedded SRAM
  • System Memory – 256MB DDR3, 5
  • Storage – 8MB NOR fklash, 8KB EEPROM, and micro SD card slot (up to 32GB)
  • Connectivity – 10/100M Ethernet
  • USB – 1x USB 2.0 host port, 1x micro USB 2.0 device port used for programming
  • Debugging / Programming
    • 10-pin JTAG
    • 6-pin 3.3V USB TTL UART header (replaces 3.5mm jack RS-232 console) for better compatibility with existing debug boards.
    • 6-pin ICSP
  • Expansion
    • full-sized mini-PCI Express slot
    • Arduino Uno R3 headers that support most Arduino shields:
      • 20x digital I/O (12x fully native speed)
      • 6x analog inputs
      • 6x PWMs with 12-bit resolution
      • 1x SPI master
      • 2x UARTs (1 shared with console UART)
      • 1x I2C master
  • Power
    • 7 to 15V via power barrel (instead of just 5V)
    • Optional 12V PoE support
  • Dimensions – 123.8 mm (L) × 72.0 mm (W)

Another improvement is that console UART1 can be redirected to Arduino headers in sketches, which can eliminate the need for soft-serial. The board is still programmable with the Arduino IDE in Windows, Mac OS or Linux operating systems, and  supports Yocto 1.4 Poky Linux release. The company also claims the board is open source hardware with schematics, Cadence Allegro board files, and bill of materials (BOM) available for download (soon).

The board will be available in August, for $60 according to MakerFlux. You can find more information, and download some documentation such as schematics (PDF), a getting started guide, and product brief on Intel Galileo Gen 2 page.

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Microsoft is Giving Away Intel Galileo Arduino Compatible Boards to Developers

July 7th, 2014 21 comments

Microsoft has already launched several initiatives to reach the maker movement and app developers with .NET Gadgeteer supported by platform like Bambino 200, as well as Intel Shark Cove development board for Windows development. The company has now launched a website called windowsondevices.com where they currently have a signup page for developers to send a kit based on Intel Galileo, an Arduino compatible board powered by Intel Quark processor.

Intel_Galileo_Windows_EmbeddedThere’s currently very little information on the software and documentation part of the development kit, but there are links to Visual Studio Express, Windows Embedded’s Internet of Things page, and a link to Maker Faire, so it gives what the kit will be for.

Apparently they’ll send the kit to selected candidate whether “you are an experienced Windows developer looking to jump into the Internet of Things or you are new to Windows development and want to build the next big thing”.

The initial form is pretty simple. They’ll ask for minimal personal details, whether you have Windows programming experience or not, the programming languages you are familiar with (C, C++, JavaScript, C#, Python…), and if you’ve ever used a Raspberry Pi, Beaglebone Black, Spark IO or Arduino. You’ll then receive another email to fill your address, and some informations about your expected project. Click OK, and you’ll soon receive an email reading:

<insert_name_here> ,

Thank you for signing up for the Windows Developer Program for IoT. We’ll let you know when your kit has shipped.

Thank you,
Microsoft IoT Team.

So I’m not sure there’s even a thorough selection process…

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Advantech UTX-3115 Rugged Fanless Computer Powered by Intel Atom E3826 SoC Supports Intel Intelligent Systems Framework

June 20th, 2014 No comments

Advantech UTX-3115 is a rugged low power fanless computer powered by Intel Atom “Bay Trail-I” E3826 dual core processor and lots of various ports that can be used as a digital signage, for machine or factory automation, & “smart IoT gateway”, and that happens to be supported by Intel’s Intelligent Systems Framework (ISF).
Advantech_UTX-3115
Before checking out Intel ISF, let’s go Advantech UTX-3115 hardware specifications:

  • SoC – Intel Atom E3826 dual core processor @ 1.46 GHz with 1MB L2 cache and Intel HD graphics.
  • System Memory – 2 x 204-pin SO-DIMM DDR3 1333/1066MHz, up to 16GB
  • Storage – 2.5″ bay for HDD or SSD storage
  • Video Output
    • 1x HDMI up to 1080p60
    • 1x micro HDMI up to 1080p60
    • 1x VGA up to 2560 x 1600 @ 60Hz
    • Dual channel LVDS up to 1920 x 1200 @ 60Hz (shared with micro HDMI)
  • Connectivity – Dual Gigabit LAN (LAN1: Intel I210AT, LAN2: Realtek RTL8111G), optional Wi-Fi module
  • USB – 1x USB 3.0 port, 1x USB 2.0 host port, 1x micro USB 2.0
  • Serial Ports – 1x RS-232 with 5v/12v, 1x RS-422/485
  • Expansion slot
    • 1x Half size Mini PCIe expansion slot for Wi-Fi module (shared with SIM card)
    • 1x Full size Mini PCIe expansion slot for mSATA storage
  • Power – 12V/3A
  • Dimensions – 138.5(W) x 35.98(H) x 116.4(D) mm
  • Operating Temperature Range – -20 ~ 60° C
  • Relative Humidity – 95% @ 40° C (non-condensing)

This computer supports Windows 7/8, as well as some embedded operating systems, and ships with a 36W power adapter, a CD with drivers and documentation, and extra documentations for CCC and RoHS. Power cables, and VESA or DIN-Rail wall mounts are also available as options.

Intel’s Intelligent Systems Framework appears to be comprised both of software packages for things, Intel calls them “Intelligent Systems“, and cloud based solutions to manage them securely over the network. You can learn a bit more by watching this 24-minute presentation below focusing on generalities rather than specificities. The session is divided into four parts, first with an IoT overview and its challenges (big data processing, costs, security), followed by Intel ISF overview, the IoT gateway stack (Intelligent Device Platform) provided by Wind River for ISF, and finally an overview of their UTX-3115 rugged computer.

Advantech UTX-3115 has been mass-produced since March 2014, but the company has not disclosed pricing. You can get more details on Advantech UTX-3115 product page.

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Development Board with Intel Technology Developed by Rockchip

June 19th, 2014 2 comments

Just a quick post to show an interesting, yet unavailable development board. A few weeks ago, Intel and Rockchip announced a collaboration to design Intel Atom Sofia x86 SoC for mobile devices. Apparently, they did not waste any time, and have already done some nice work together, as Chen Feng, VP at Rockchip, posted the picture of the development board on his weibo account with a short description that Google’s translate as:

You can now showed up, Intel inside, the world’s most highly integrated 6321 smartphones and tablet communications solutions, dual-core WCDMA SOC, integrated WIFI BT GPS PMU, all two chips

Intel_Atom_Sofia_Rockchip_Development_BoardIt’s not entirely clear if it’s directly related to the announced Intel Atom “Sofia” using 3G (WCDMA) however. The 6321 is a dual core processor, but Rockchip and Intel only announced working on quad core processors, so this may be a separate product for example an ARM SoC with an Intel XMM modem, or an intermediate steps before working on the Intel Sofia SoCs which are scheduled for H1 2015. Maybe those of who have a better understanding of Chinese could shed some light based on articles published on pbhz or mydrivers.

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Linux 3.15 Released

June 11th, 2014 2 comments

Linus Torvalds announced the release of Linux Kernel 3.15 last Sunday:

So I ended up doing an rc8 because I was a bit worried about some last-minute dcache fixes, but it turns out that nobody seemed to even notice those. We did have other issues during the week, though, so it was just as well. The futex fixes and cleanups may stand out, but as usual there’s various other random fixes since rc8 in there too: mainly drivers (drm, networking, sound, usb etc), networking, scheduling and perf tooling.

But it’s all been fairly small and quiet, which *may* of course be due to the fact that last week was also the first week of the merge window for 3.16. That might have distracted some developers. I’m not entirely convinced I liked the overlap, but it seemed to work ok, and unless people scream really loudly (“Please don’t _ever_ do that again”) and give good reasons for doing so, I might end up doing that overlapping merge window in the future too if it ends up helping out with some particular timing issue.

That said, I also don’t think it was such a wonderful experience that I’d want to necessarily do the overlap every time, without a good specific reason for doing so. It was kind of nice being productive during the last week or rc (which is usually quite boring and dead), but I think it might be a distraction when people should be worrying about the stability of the rc.

Of course, maybe the overlap ends up meaning that we get less noise during the last week of stabilization, and it actually helps. It could go either way. I’d be interested to hear what people thought, although I _suspect_ most people don’t feel strongly either way.

Anyway, with 3.15 released, my “master” branch has already merged the work in my “next” branch on my local machine, and I’ll be decommissioning the “next” branch once I push that all out. After that, any future merge window work will happen on “master”, and we’ll be back to the normal single-branch model for my tree.

Kernel 3.14 brought a file systems (btrfs) and networking improvements, zram was considered stable, etc. Linux 3.15 main changes include:

  • Faster resume from power suspend in systems with hard disks - Resuming a system from suspend used to take a long time in systems with traditional hard disks, because the system blocks the resume process until the hard disk finish powering up. In this release, commands are sent to the hard disk asynchronously, so the entire resuming process isn’t paused by the hard disk. The end result is that systems with hard disks will resume several seconds faster with this Linux release. For more details, read this blog post.
  • Improved working set size detection –  When there is not enough room for all memory in RAM, the Linux kernel is in charge of deciding which memory must be kept in RAM, and which must be sent to swap or discarded. In this release, Linux does more advanced tracking of how memory gets used and can balance better the size of the lists, which makes Linux perform better in certain workloads, adapt better to workload size changes, and creates a foundation to build improved policies in the future. Read LWN article Better active/inactive list balancing for details.
  • EFI 64 bit kernels can be booted from 32 bit firmware - Most modern x86 CPUs are 64bit, yet many systems ship with a 32 bit EFI implementation. This didn’t allow to boot a Linux 64 bit EFI kernel from these 32 bit EFI systems. This limitation has been removed, a 64-bit kernel can be booted on 32-bit firmware that runs on 64 bit CPUs.
  • New file locking scheme: file private locks - Due to some unfortunate history, POSIX locks have very strange and unhelpful semantics: they are dropped whenever the process closes any file descriptor associated with the inode, and locks taken between threads within the same process won’t conflict with one another, which renders them useless for synchronization between threads. This release adds a new type of lock that attempts to address these issues. These locks will conflict with classic POSIX read/write locks, but have semantics that are more like BSD locks with respect to inheritance and behavior on close.Read LWN article File-private POSIX locks to get more information.
  • Faster erasing and zeroing of parts of a file –  This release adds two new fallocate(2) mode flags: FALLOC_FL_COLLAPSE_RANGE which allows to remove a range of a file without leaving holes, improving the performance of these operations that previously needed to be done with workarounds, and  FALLOC_FL_ZERO_RANGE which allows to set a range of a file to zero, much faster than it would take to do it manually. Only XFS and Ext4 have added support for these new flags in this release, and other filesystems will follow in the future. You can read Finding the proper scope of a file collapse operation for details
  • File cross-renaming support – Cross-rename, a variant of rename which exchanges the two files, has been added. This allows use cases which were not possible before, for instance atomically replacing a directory tree with a symlink. It also allows overlayfs and friends to operate on whiteouts atomically. More information can be found in LWN article Exchanging two files.
  • zram: LZ4 compression support, improved performance - Zram memory compression mechanism added support for the LZ4 compression algorithm, which is better than the current available LZO in some cases, as well as come performance improvements to concurrent compression of multiple compression streams, and the ability to switch the compression algorithm in /sys/block/zram0/comp_algorithm.
  • Intel AVX-512 vector instructions support - AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture proposed by Intel, and scheduled to be supported in 2015 with Intel’s Knights Landing processor. Read the documentation on Intel website for more information about AVX-512.
  • FUSE: improved write performance - FUSE can now use cached writeback support to fuse, which improves write throughput.

Starting with Linux 3.15 release, I’ll also point out some of the improvements and new features brought to the ARM architecture:

  • AllWinner – It’s now possible to boot a usable headless Linux OS using the mainline kernel on AllWinner A1x/A2X. Support have been added to LinkSprite pcDuino, Inet 97f, and A10-OLinuXino-LIME. You can read details about AllWinner changes here.
  • Device tree support added for various OMAP, Atmel, Broadcom, Marvell, Texas Instruments Keystone & Sitara, and Freescale i.MX based hardware platforms
  • Various perf modifications for ARM64, Cortex A12, and Qualcomm krait.
  • Rockchip – Added SMP support
  • SATA driver added for Applied Micro X-Gene and Exynos 5250

Further details on Linux 3.15 are available on Kernelnewbies.org. For more details about ARM changes, you can read the ARM architecture and drivers sections.

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Intel Atom Z3580 MooreField SoC Shown to Outperform Qualcomm Snapdragon 801 in Graphics Benchmark

June 6th, 2014 No comments

This is not exactly an independent benchmark, as Intel provided the results showing an Intel Atom Z3580 SoC with PowerVR G6430  @ 533 MHz outperform a Snapdragon 801 with Adreno 330 GPU @ 578 MHz (Galaxy S5) in FutureMark’s 3DMark benchmark by 20997 to 18144, or a little over 15%.  We’ve seen several CPU benchmarks before where Intel often has a edge over ARM based solution, but the previous generation with Intel Graphics was a bit weak on the graphics side, and this test seems to confirm, the new Intel smartphone SoC should provide very good graphics performance.

Intel_MooreField_Snapdragon_801

It appears Atom Z3580 might have also outperformed Snapdragon 805 with Adreno 420, as Anandtech reported an overall score of 19,698 in 3Dmarks with Qualcomm Snpadragon S805 mobile development platform (MDP), and noticed it was not the most GPU intensive test there is. So it’s still possible the higher score found on Intel’s smartphone reference design may be highly CPU bound, and more graphics benchmark are needed to really get a grasp on the upcoming Intel Moorefield 3D graphics performance.

Part of the setup at Intel’s booth at Computer 2014, was also an Intel Z3480 SoC (Merrifield) with a PowerVR G6400 GPU @ 533 MHz getting 16,407 points in the same benchmark.

Actual products based on Intel Merrifield and Moorefild SoC are expected to start shipping later this month. You can find more details and benchmarks results, released by Intel, for CPU and GPU on an earlier post about Intel Atom Z3460 & Z3480 (Merrifield) and Z3560 & Z3580 (Moorefield) Mobile SoCs.

Via Liliputing and Mobile Geeks

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Intel Showcases Tablet / 2-in-1 Reference Design based on 14nm “Broadwell” Core M SoC

June 4th, 2014 3 comments

Intel has unveiled a thin tablet reference design at Computex 2014, in Taiwan, which is based on their upcoming “Broadwell” Core M processor manufactured using 14nm process technology, which will be the most power efficient Intel Core processor to date.
Intel_Broadwell_Tablet_Reference_DesignIntel fanless mobile PC reference design features a 7.2mm thick, 12.5″ tablet that weights 670 grams. You can also connect it to a media dock providing additional cooling allowing more performance, as well as a keyboard dock. Intel expects 2-in-1 products (tablet + laptop) based on Intel Core M to be available later this year.

Intel_Broadwell_Reference_Design_Keyboard

Tablet Reference Design with Keyboard Dock – Source: Ultranetbooks News

 

 

Tablet Reference Design + Media Dock (Bottom Left) - Source: Engadget

Tablet Reference Design + Media Dock (Bottom Left) – Source: Engadget

Intel claims 60% lower power dissipation, 20 to 40% better performance, and 10 to 45% low SoC power, and half the package footprint compared to third generation “Haswell” Core processors, which will allow fanless and thin designs. Currently Mobile Haswell Core processors have a maximum TDP of 11.5W to 47W, so in theory, at best, Broadwell SoCs might achieve as low as 4.6 W Max TDP.

Via Liliputing

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