Archive

Posts Tagged ‘mips’

UyeSee WM201 Wi-Fi Music Streamer Features Actions Semi AM8253 SoC

December 15th, 2014 7 comments

EZCast dongles are wireless display dongle supporting Miracast, DLNA, Airplay, and EZCast protocol, and are all based on Actions Semiconductor AM8251 MIPS processor. The company has now designed AM8253 SoC specially for audio applications using these standards, and found in upcoming products such as UyeSee WM201 Wi-Fi music streamer.

 

UyeSee_WM201UyeSee WM201 specifications and features:

  • SoC – Actions Semi AM8253 32-bit RISC processor @ 600 MHz with built-in 24-bit 96 KHz DAC
  • System Memory – 64 MB DDR3
  • Storage –  128MB for firmware, and micro SD card for audio files
  • Connectivity – 802.11 b/g/n Wi-Fi (150 Max). WPA, WPA2, and WPA2 Mixed security
  • Audio Ports – 3.5mm audio jack, optical S/PDIF
  • Wireless Audio Standard – Airplay, DLNA, Qplay and Ezcast
  • Audio Format – MP3, AAC, WAV, FLAC, APE, OGG, WMA, DTS, AC3 (Dolby Digital), ra, AIF, AIFF, M4A(ALAC), MKA, MIDI,, TTA
  • USB – 1x USB host port, 1x micro USB port for power
  • Misc – Reset button, power LED
  • Power Supply – 5V/0.5A (via micro USB port)
  • Dimensions – 82 x 82 x 24 mm

This wireless audio streamer comes with a USB cable, an audio cable (for 3.5mm jack), and a user’s manual. The functionality should be similar to SoundMate M2, except that EZMusic app for Microsoft Windows, Mac, Android, and iOS will be provided instead of controlling the device via a web interface. It should also be possible to use it with Linux using a DLNA client (TBC).. You can also play music from a micro SD card, or a USB mass storage device.

Actions Semi AM8253 Block Diagram

Actions Semi AM8253 Block Diagram

There’s no mention of the architecture for the RISC processor, but it should probably be MIPS like for AM8251. The blank rectangles in the block diagram, are probably because they used an old block diagram with GPU and VPU used in AM8251, which is not needed in AM8253 audio processor. There’s also no mention of any operating systems, but it’s probably a Linux based device.

The product should eventually be listed on Uyesee audio streaming page yet, and a dedicated website should be launched on www.ezmusic.cn soon (site is down for now).

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Linux 3.18 Released

December 10th, 2014 2 comments

Linus Torvalds released Linux Kernel 3.18 last Sunday:

It’s been a quiet week, and the patch from rc7 is tiny, so 3.18 is out.

I’d love to say that we’ve figured out the problem that plagues 3.17 for a couple of people, but we haven’t. At the same time, there’s absolutely no point in having everybody else twiddling their thumbs when a couple of people are actively trying to bisect an older issue, so holding up the release just didn’t make sense. Especially since that would just have then held things up entirely over the holiday break.

So the merge window for 3.19 is open, and DaveJ will hopefully get his bisection done (or at least narrow things down sufficiently that we have that “Ahaa” moment) over the next week. But in solidarity with Dave (and to make my life easier too ;) let’s try to avoid introducing any _new_ nasty issues, ok?

Linus

Linux 3.17 added support for Xbox One controllers, USB device sharing over IP, more secure random numbers, several modifications for perf and more.

Some of the changes made to Linux 3.18 include:

  • Performance improvements for the networking stack thanks to bulk network packet transmission, which “allows a relatively small system to drive a high-speed interface at full wire speed, even when small packets are being transmitted.”
  • Faster suspend and resume by replacing a 100ms polling loop with proper completion notification. This will mostly be noticeable on systems with a large number of cores. Git pull.
  • Berkeley Packet Filter bpf() system call. “The hooks to use this code (in tracing and packet filtering, for example) will take a little longer, but the core support for a “universal virtual machine” in the kernel is now present.”
  • Nouveau drivers for Nvidia GPUs now supports basic DisplayPort audio
  • Several filesystems improvements, notably for BTRFS and F2FS
  • Audio hardware. Codecs: Cirrus Logic CS35L32, Everest ES8328 and Freescale ES8328; others: Generic Freescale sound cards, Analog Devices SSM4567 audio amplifier

New features and improvements specific to the ARM architecture include:

  • Allwinner
    • Allwinner A31/A23 –  RTC  & Watchdog
    • Allwinner A23 – MMC, pinctrl, DMA and I2C
    • New boards: Olimex A20-OLinuXino-Lime, Merrii Hummingbird A20, and HSG H702 tablet board.
  • Rockchip
    • Added new clock-type for the cpuclk
    • Ethernet: Added support for Rockchip SoC layer device tree bindings for arc-emac driver, and emac nodes to the rk3188 device tree.
    • Added driver for Rockchip Successive Approximation Register (SAR) ADC.
    • RK808 PMIC: Added regulator driver, clkout driver, and mfd driver.
  • Amlogic – Added MesonX support, only Meson6 for now (Amlogic AML8726-MX). DTS for Geniatech ATV1200 media player
  • Added basic support for BCM63138 DSL SoC, Texas Instruments AM57xx family, Atmel SAMA5D4, Qualcomm IPQ8064, Renesas r8a7794 SoC,
  • New Device tree files for various board and products: Gateworks GW5520, SAMA5D4ek board,  i.MX1 Armadeus APF9828, i.MX1 ADS board, Technexion Thunder support (TAO3530 SOM based, Sony Xperia Z1, IFC6540 board, CM-QS600 SoM,  etc…

I could find a few changes for MIPS architecture in Linux 3.18 too:

  • SEAD3: Nuke PIC32 I2C driver.
  • Loongson: Make platform serial setup always built-in
  • Netlogic: handle modular USB case & AHCI builds
  • tlbex: Fix potential HTW race on TLBL/M/S handlers
  • cpu-probe: Set the FTLB probability bit on supported cores
  • fix EVA & non-SMP non-FPU FP context signal handling
  • Etc.. You can find a few more changes @ http://lwn.net/Articles/623825/

A more thorough changelog for Linux 3.18 will soon be published on Kernelnewbies.org. Remember to also check ARM architecture and drivers sections, for more details about changes related to ARM platforms.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

MIPS Creator CI20 Development Board is Now Available for $65

December 5th, 2014 3 comments

When Imagination Technologies first announced their developer program for MIPS Creator CI20 board, they did not disclose the price, but based on the specifications I estimated that a decent price would be $70 o $80. The company has now announced broad availability of the board, which can be pre-ordered for just $65 or 50 GBP depending on the continent you live in, with shipping scheduled for the end of January 2015.

MIPS_CI20_Development_BoardThis development board is based on Ingenic JZ4780 dual core MIPS processor with 1GB DDR3, 8GB flash,  and features an HDMI output up to 1080p, Audio in and out, a Fast Ethernet RJ45 port, a Wireless module with Bluetooth 4.0 and Wi-Fi, an IR receiver, and expansion headers.

Several projects have already been ported by developers who got their free board a few months, ago including XBMC/Kodi, several games such as Spiral Episode 1, and beside Android 4.4 and Debian 7 officially supported by Imagination, operating systems have also been ported to MIPS Creator CI20 with NetBSD, Express Logic ThreadX RTOS, and Haiku inspired from the defunct BeOS.

XBMC 13.2 on MIPS Creator CI20

XBMC 13.2 on MIPS Creator CI20

XBMC 13.2 is not based on the Android version, but based on Debian, as the last blog update posted at the end of October, mentions the OpenGL ES user interface runs smoothly (30 fps @ 1080p resolution), but FFmpeg/Libav were crashing at the time, so video could not be played. Hopefully this is fixed. At least that means that 2D/3D graphics acceleration is working in Linux.

Hardware and software documentation, as well as Debian 7, Android 4.4, and other distributions images and source code are available on MIPS Creator CI20 Wiki. You can also go directly to MIPS github account to get the source code for Linux, U-Boot, mplayer, and others.

If you live in North America, you can pre-order the board for $65, and people living in the European Union or the United Kingdom can purchase it for 50 GBP on the UK store. If you feel lucky, three boards will be given away on a Rafflecopter draw embedded on Imagination Technologies blog post.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Ingenic Unveils Newton2 Platform for Wearables with M200 Dual Core SoC

November 13th, 2014 5 comments

Ingenic Newton is a development platform for wearables powered by Ingenic JZ4775, an application processor mostly used in tablets. Many companies are now making SoCs speficially designed for wearables with a powerful application core, and a low power core serving as a sensor hub, an Ingenic M200 SoC found in the new Ingenic Newton2 platform, uses the sample principle by combinging a MIPS XBurst processor @ 1.2GHz with a low power MIPS XBurst core @ 300MHz combined with low power GPU and VPU.

Inegnic Newton2 Board (Click to Enlarge)

Inegnic Newton2 Board (Click to Enlarge)

Ingenic Newton2 specifications:

  • SoC – Ingenic M200 dual core processor with MIPS XBurst @ 1.2 GHz, MIPS XBurst @ 300 MHz, 2D/3D GPU, and VPU supporting H.264, VP8, MPEG-1/2/4, VC-1, and RV9 up to 720p30
  • System Memory – 512 MB LPPDR2 (Samsung eMCP)
  • Storage – 4GB eMMC (Samsung eMCP)
  • Connectivity – 802.11 b/g/n Wi-Fi + Bluetooth 4.1 (Broadcom BCM43438) + connector for GPS
  • Sensors – Gyroscope, accelerometer, magnetometer (IvenSense MPU-9250)
  • Expansion Headers –  24-pin display connector, MIPI CSI / I2C camera connector, DMIC and AOHPL/R audio connector, GPS and sensors header including UART, I2C, and GPIO pins. touch connector, 14-pin button connector, and 4-pin Wi-Fi and 2.4 GHz BT connector.
  • Power Supply – Li-on battery: 3.7~4.2V or Micro USB: 5.0V;  Ricoh RC5T619 PMIC; Standby power consumption: < 3 mW
  • Dimensions – 15 x 30 x 2.4 mm
Newton2 Block Diagram

Newton2 Board Block Diagram

Compared to the original Newton board, Newton2 is about 50% smllaer, and consumes much less power resulting in improved battery life. Target applications include smartwatches, augmented reality headsets, smart glasses, smart cameras, wearable healthcare monitors, activity trackers, smart clothing, etc… The platform runs Android 4.4 + Linux 3.10, but there’s no mention of Android Wear support.

Ingenic_M200_SoC_Block_Diagram

 Key features of Ingenic M200 as listed on Anandtech:
Package BGA270, 7.7mm x 8.9mm x 0.76mm, 0.4mm pitch
CPU XBurst1-HP core, 1.2 GHz
XBurst1-LP core, 300 MHz
GPU 2D/3D acceleration with OpenGL ES 2.0/1.1. OpenVG 1.1
VPU Video encoder up to 720p @ 30fps: H.264, VP8
Video decoder up to 720p @ 30fps: H.264, VP8, MPEG-1/2/4, VC-1, RV9
ISP HDR, video and image stabilization, crop and rescale, auto exposure + gain + white balance + focus control, edge sharpening, noise reduction, color correction, contrast enhancement, gamma correction
Memory DDR2, DDR3, LPDDR, LPDDR2 up to 667 Mbps
64-bit ECC NAND flash support Toggle 1.0 and ONFI2.0
Display LCD controller with OSD: TFT, SLCD and MIPI-DSI (2-lanes)
E-Ink controller
Camera MIPI-CSI2 (2-lanes), DVP
Audio Audio CODEC with 24-bit ADC/DAC, stereo line-in, MIC in, and headphone interface
Low power DMIC controller
AC97/I2S/SPDIF interface for external audio codec
One PCM interface, supports both master and slave modes
Voice trigger engine to wake system by programmable specific voice
ADC 3 channels 12-bit SAR
Interfaces USB 2.0 OTG x 1
MMC/SD/SDIO controller x 2
Full-duplex UART port x 5
Synchronous serial interface x 2
Two-wire SMB serial interface x 4
Software Android 4.4

Ingenic M200, or another Ingenic SoC for wearables (M150), is said to be used in GEAK Watch 2, which can deliver 2-week of battery life. The crowdfunding campaign for the watch is still on-going.

Pricing and availability have not been disclosed for Ingenic Newton2, and if history is any guide, the board will be reserved to corporate customers, just like Ingenic Newton was. More details may be found on Ingenic Newton2 ad M200 SoC product page.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

PowerVR SDK v3.4 Supports WebGL, 64-Bit Android 5.0 Lollipop, and MIPS Linux

October 21st, 2014 2 comments

Imagination Technolgies has just released PowerVR SDK v3.4  including the latest compilers for PowerVR Series6 and Series6XT GPUs to PVRShaderEditor, several performance optimization, a new WebGL SDK, 64-bit support for Android 5.0 Lollipop, and Linux support for MIPS based processors.

PowerVR_SDKThe company has revamped the user interfaces of their tools, and made the following key changes:

  • PVRTrace, a tool to capture and analyze OpenGL ES and EGL API calls, now supports OpenGL ES 3.1, compressed trace files, and they’ve reduce the software memory usage
  • PVRTune, a performance analysis tool, now features new counters, and  “significant” performance optimizations.
  • PVRShaderEditor, a light-weight shader editing too, adds the latest compilers for PowerVR Series6 (FP32 and FP16) and Series6XT GPUs, as well as GLSL disassembler output.
  • PVRTexTool, a utility for compressing textures, adds plugin support for Autodesk 3DSMax and Maya (2015 versions), and improves ETC decompression by up to 20% faster per surface.

Imagination also claims to have improved documentation with a new SDK Browser, part of the SDK,  with installation instructions, examples, source code, documents, etc… More details are available on the release notes page.

PowerVR SDK is available for Windows, Mac OS X & Linux (32-/64-bit).

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Linux 3.17 Released

October 9th, 2014 5 comments

Linus Torvalds announced the release of Linux Kernel 3.17 on Sunday:

So the past week was fairly calm, and so I have no qualms about releasing 3.17 on the normal schedule (as opposed to the optimistic “maybe I can release it one week early” schedule that was not to be).

However, I now have travel coming up – something I hoped to avoid when I was hoping for releasing early. Which means that while 3.17 is out, I’m not going to be merging stuff very actively next week, and the week after that is LinuxCon EU…

What that means is that depending on how you want to see it, the 3.18 merge window will either be three weeks, or alternatively just have a rather slow start. I don’t mind getting pull requests starting now (in fact, I have a couple already pending in my inbox), but I likely won’t start processing them for a week.

Anyway, back to 3.17. Nothing major happened during the last week, as you can see from the appended shortlog. Mostly drivers (i915, nouveau, ethernet, scsi, sound) and some networking fixes. With some misc noise all over.

Go out and test,

Linus

Kernel 3.16 added Nouveau drivers for GK20A GPU (Tegra K1), ARM64/EFI boot, improved support for Xen, KVM, EFI, NFS, as well as various changed to networking, and more…  Some noticeable changes for Linux 3.17:

  • Gamepads – Added Microsoft Xbox One controller support, improvements to Sony SIXAXIS support
  • Toshiba “Active Protection Sensor” support which stops your harddrive from spinning when the accelerator detects your laptop is in free fall…
  • “Cross-thread filter setting” for secure computing facility:
        int seccomp(unsigned int operation, unsigned int flag, const char *args);
    

    See manpage for details.

  • Enhanced AMD Radeon R9 290 support
  • Miscellaneous Nouveau driver improvements, including Kepler GPU fixes

New features and improvements specific to the ARM architecture include:

  • AllWinner
    • A10/A20 – IR driver
    • A31 – PIO/R_PIO external interrupts, DMAengine, GMAC
    • A23: Timers, UARTs, initial bringup, Basic clocks,  PIO/R_PIO drivers
    • New boards: ba10-tvbox; Merrii A31 Hummingbird; pcDuino V3
  • Rockchip
    • Enabled RK3288 SoC support
    • Added RK3xxx I2S controller, RK3288 clock controller, RK3066 and RK3188 clock driver.
    • Added RK3288 evaluation boards
  • Added basic support for Mediatek MT6589 SoCs
  • NEON implementation of crypto algorithms (SHA1; SHA512).
  • Marvell Kirkwood now fully “device tree-ified”, mach-kirkwood directory deleted
  • Added APM X-Gene SoC ethernet driver support.
  • Various changes for Broadcom BCM7xxx STB SoCs, Fresscale i.MX, Samsung Exynos & S5PV210, Nvidia Tegra, Renesas SH and TI AM43xx SoCs.
  • ARM64 / ARMv8 – Added 48-bit adress space, CONFIG_CC_STACKPROTECTOR (GCC’s -fstack-protector), audit support, and context tracking

I’ve also been asked about MIPS changes last time, so here it is:

  • Add Loongson-3B support
  • Add NUMA support for Loongson-3
  • BCM47XX: Detect more then 128 MiB of RAM (HIGHMEM)
  • BCM47XX: add Microsoft MN-700 and Asus WL500G
  • Support CPU topology files in sysfs
  • kernel: cpu-probe: Add support for the HardWare Table Walker
  • perf: Add hardware events for P5600

Further details on Linux 3.17 changes will soon be available on Kernelnewbies.org. For more details about ARM changes, remember to also check ARM architecture and drivers sections.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

Imagination Technologies Unveils MIPS I6400 64-Bit Warrior Core

September 3rd, 2014 1 comment

Imagination technologies has just announced their MIPS I6400 64-bit core for applications including embedded, mobile, digital consumer, advanced communications, networking and storage. MIPS I-class I6400 CPU family features a 64-bit architecture, hardware virtualization, multi-threading, multi-core and multi-cluster coherent processing, and MIPS32 code will run on MIPS64.

MIPS I6400 Block Diagram (Click to Enlarge)

MIPS I6400 Block Diagram (Click to Enlarge)

The key features of these MIPS64 cores are listed as follows:

  • Efficient, scalable 64-bit performance – The company claims MIPS I6400 achieves over 50% higher CoreMark performance and 30% higher DMIPS compared to “leading competitors in its class”.
  • Hardware multi-threading – Supports up to four hardware threads per core, and  simultaneous multi-threading (SMT) technology leads to higher utilization and CPU efficiency. Preliminary benchmarking shows that adding a second thread leads to performance increases of 40-50% on benchmarks such as SPECint and EEMBC’s CoreMark, with less than a 10% cluster area increase.
  • Hardware virtualization – Includes support for up to 15 secure/non-secure guests.
  • Next-generation security – The solution scales to support secure content delivery, secure payments, identity protection and more across multiple applications and content sources.
  • Power management – With PowerGearing for MIPS, the I6400 has the ability to provide a dedicated clock and voltage level to each core in a heterogeneous cluster, while maintaining coherency across CPUs so that sleeping cores only need to wake when needed.
  • FPU with single and double precision capabilities.
  • 128-bit SIMD – The I6400 features 128-bit SIMD support, built on MIPS SIMD architecture which adheres to true RISC philosophy, with instructions defined to be easily supported within high-level languages such as C or OpenCL. The SIMD in the I6400 supports a wide variety of integer (8, 16, 32 and 64-bit) and floating point (32, 64-bit) data types suitable for various computationally-intensive use cases.
  • Next-generation multicore coherency – Supports multicore configurations of up to six cores per cluster where multiple cores on a single cluster can have different synthesis targets, and operate at different clock frequencies and voltages. The Coherency Manager fabric implements hardware pre-fetching, wider buses and lower latencies compared to previous generations.
  • Scalable, multi-cluster coherency – I6400 cores are designed to be delivered in diverse combinations of threads, cores and clusters, supporting multi-cluster fabric configurations up to 64 clusters.
MIPS_I6400_vs_ARMv8

Expected Performance of MIPS I6400 vs the Competition (ARMv8 or Intel Atom?)

The chart above shows better performance of MIPS I6400 with two threads compared to “competing 64-bit CPU”, which could either be ARM Cortex-53 / Cortex A57, or Intel Atom “Bay Trail” processors, so it’s difficult to get an idea of the actual performance compared to the competition. What’s clear is that multiple threads should improve performance in some benchmarks, and application such as web browsers.

MIPS Release 6 architecture also introduces new instructions that are said to accelerate performance for several workloads commonly found in Android, including JIT compilation, Javascript, web browsing, PIC (Position-Independent Code) for Android.

MIPS I6400 will be optimized for 32-bit and 64-bit operating systems including Android L which will support MIPS64. The company will provides software, tools and applications for the new cores, which will be supported by prpl open source foundation. MIPS64 r6 architecture is already supported in QEMU, and source code available on Prpl foundation’s github account.

MIPS I6400 license is already being used by “leading partners”, with general availability scheduled for December 2014, which probably means MIPS I6400 based SoCs should become available sometimes in H2 2015, or early 2016. You can also read Imagination’s blog post for a few more details.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter

MIPS Creator CI20 Development Board Formally Announced, Free to Selected Developers

August 28th, 2014 9 comments

Earlier this month, I discovered MIPS Creator CI20 development board based on Ingenic JZ4780 dual core MIPS processor thanks to one of my reader.  Imagination Technologies has now launched the board, which will run Debian 7 first, soon support Android 4.4 and others Linux distributions, and the company places their MIPS board as a competitor to the popular ARM based boards such as the Raspberry Pi and BeagleBone Black. This is the first board part of Prpl initiative for open source Linux and Android software for the MIPS architecture.

MIPS_CI20_Development_BoardAs a reminder, I’ll list the hardware specifications again:

  • SoC – Ingenic JZ4780 dual core MIPS32 processor @ 1.2 GHz with Imagination PowerVR SGX540 GPU. 32kI + 32kD per core, 512K shared L2.
  • System Memory – 1GB DDR3
  • Storage – 8GB NOR flash, 1x SD card slot, 1x SD card slot via expansion
  • Video Output – HDMI up to 1080p
  • Audio I/O – HDMI, Audio In and Out via 3.5mm jack
  • Video Playback – Up to 1080p60
  • Connectivity – 10/100M Ethernet, Wi-Fi + Bt 4.0 module (IW8103)
  • USB – 1x USB OTG, 1x USB 2.0 Host.
  • Expansions Headers – Access to 23x GPIOs, 2x SPI, 1x I2S, 7x ADC on header, including 5-wire touch and battery monitoring function, 1x UART, Transport Stream I/F.
  • Debugging – UART, and 14-pin MIPS EJTAG header
  • Misc – IR receiver, power LED, and button
  • Power Supply – 5V via 4mm/1.7mm barrel connector
  • Dimensions – 90x95mm

One thing I did not mention the last time are the multimedia capabilities of the Ingenic SoC, as it can handle codec such as MPEG-4, H.264, VP8, MPEG-2, and RV9 thanks to the video hardware, “making it ideal for HTPC enthusiasts” according to Imagination. The Linux source code  (3.0.8 and 3.16 kernel) is currently available on github and Imagination plans to up-streamed support to mainline. Graphics support includes Xorg-compliant OpenGL 2.1 and OpenGL ES 1.1/2.0 drivers, which means Linux distributions available for the board should have 3D GPU acceleration. The complete documentation is available on eLinux.

MIPS_Creator_CI20_vs_Raspberry_Pi_vs_BeagleBone_BlackBased on the comparison table above, MIPS Creator CI20 are significantly higher than Raspberry Pi, and even BeagleBone Black, and the board size is about double, so it’s unlikely it will compete on price with either, unless it’s sponsored. Its specs are more akin to the Cubietruck (except for 2GB RAM, SATA support, GbE…) which sells for $89, so something between $70 to $80 could be expected.

With regards to availability there are good and bad news. The bad news is that you can’t buy it right now, and they haven’t announced the price yet. The good news is that if you are involved in an open source project, you may be able to get it for free by requesting one. Eventually MIPS Creator CI20 should sell via Imagination Technologies e-Store.

Digg This
Reddit This
Stumble Now!
Buzz This
Vote on DZone
Share on Facebook
Bookmark this on Delicious
Kick It on DotNetKicks.com
Share on LinkedIn
Bookmark this on Technorati
Post on Twitter