Cortus Introduces APS23 and APS25 32-Bit Cores for Micro-controllers

ARM and MIPS are not the only games in town with it comes to 32-bit cores for micro-controllers. I’ve already written about Beyond Semiconductor, and mentioned Andes used in some Wi-Fi SoC, and today I’ve come across another IP company called Cortus. which just introduced APS23 and APS25 cores based on their latest Cortus V2 instruction set. which offers a smaller code footprint compared to there V1 ISA.

Cortus APS25 Block Diagram
Cortus APS25 Block Diagram

APS23 can achieve 1.44 Coremarks/MHz, 2.83 DMIPS/MHz, and can run up to 200 MHz when manufactured with 90nm process, whereas APS25 is a bit more powerful with 2.09 Coremarks/MHz, 2.36 DMIPS/MHz, and can run up to 344 MHz. Minimal power consumption is 11.6 and 19.3 uW/Mhz for APS23 and APS25 respectively.

Key features of both cores include:

Excellent Code Density
3 stage pipeline 5-7 Stage Pipeline
Sequential Multiplier High Performance Integer Multiply
Optional Parallel Multiplier (Gives 2.62 Coremakes/MHz) Integer Divider
Full Peripheral Set Dual & Multi-Core Capable
AXI Lite Bus Co-Processor Interface
0.054 mm2 silicon area (min.) AXI4 buses
Optional Caches
0.099 mm2 silicon are (min.)

Peripherals avalable with the cores includes counters, timers with capture and PWM, UART, GPIO, SPI, I2C, Watchdog, USB 2.0 Device & OTG, Ethernet 10/100 MAC, and AHB-Lite Bridge (master and slave).

APS23 are expected to be part of touchscreen controllers, smart meters, Bluetooth LE chips, smart sensor controllers, automotive applications, etc,, whereas the more powerful and feature rich APS25 cores should find their ways into embedded control systems, encryption/decryption chips, wireless and wireline communication as well as sensor fusion and machine vision applications.

The company provide a complete development environment including C and C++ toolchains, and an IDE based on Eclipse. An instruction set simulator, Cortus on-chip debugging hardware, and an Ethernet connected JTAG (EtherTag) can be used for debugging. RTOSs such as FreeRTOS, Micrium μC/OSII have already been ported to APS processors.

Further details can be found on Cortus APS23 and APS25 product pages. In case you wonder where Cortus cores are currently used, the company claims over 35 licenses, and their press releases mention touch screen solutions (IMAGIS), CMOS image sensors (Pyxalis), WiFi SoCs (Newport Media), smart card chips, etc… Microsemi (previously Actel) has also selected APS core for mixed signal SoC for industrial applications.


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7 years ago

Someone really should do a “kickstarter” to do a SoC with those sources, synthesizing a 90nm design should not be too big thing these days.

And of course keep everything FLOSS and open hardware.

Oh well, never happening, everyone has seen all those previous attempts that failed miserably. 🙁

7 years ago

Hold on… ARM, MIPS, _and_ Microchip? Wasn’t Microchip always using MIPS core for their PIC32? And if I’m not mistaken Microchip even recently migrated from old(er) MIPS4k to newfangled MIPS microAptiv.