$3.5 RV-Debugger Plus UART & JTAG debug board comes with BL702 Zigbee & BLE RISC-V SoC

USB to UART debug boards are a necessity for anyone playing with single board computers, at least when using bleeding-edge bootloader or Linux kernel where the target board may not always boot, or when troubleshooting booting problems.

Those are often based on FDTI or WCH chips, but Sipeed RV-Debugger Plus features Bouffalo Lab BL702 Zigbee & Bluetooth LE RISC-V SoC instead and offers both UART and JTAG interfaces. So let’s have a look at both the board and SoC.

Sipeed RV-Debugger Plus

Sipeed RV-Debugger Plus

USB to TLL debug boards are meant to be simple and that’s the case for Sipeed latest BL702 board as it comes with a 12-pin connector with Tx/Rx for UART, 8 signals for JTAG, plus 5V, 3.3V, and GND power signals. We can also see pads for Tx/Rx/CTS, a boot button, a crystal oscillator, and a USB-C port to connect to the host computer.

What I don’t see is an antenna to use of Zigbee and/or Bluetooth LE connectivity, so I asked on the Twitter thread where Sipeed showcased the prototype, and that’s the company answer:

There is the antenna pad upon the osc. it is reserved, as there is no much space for RF clearance.

So it may not be the best board to play with Zigbee/BLE. Sipeed says it will soon be sold for around $3 on Aliexpress and Seeed Studio.

Bouffalo BL702 Zigbee/BLE SoC

BL702It’s not the first time we mention the BL702 microcontroller as we shortly listed it in our post about Bouffalo Lab’s BL602/BL604 RISC-V WiFi & BLE SoC last October. But we have a good opportunity to look at the chip in more detail today.

BL702, BL704, and BL706 key features and specifications:

  • MCU Core – 32-bit RISC-V Core with FPU up to 144 MHz
  • Memory – 132KB RAM
  • Storage – 192KB ROM, 1Kbit eFuse
  • External Memory/Storage – Support for XIP pSRAM and QSPI flash
  • Connectivity
    • Ethernet RMII interface
    • Bluetooth 5.0 Low Energy up to 2 Mbps, Long Range 500/125Kbps
    • Zigbee 3.0 / IEEE 802.15.4
    • Support Wi-Fi/Bluetooth/Zigbee coexistence
    • 2.4 GHz RF transceiver with integrated RF balun, PA/LNA
  • USB – 1x USB 2.0 FS device interface
  • Other I/Os
    • SPI master/slave, 2x UART (Support ISO 17987), I2C master
    • Audio – I2S master/slave
    • 5x PWM channels
    • Quadrature decoder
    • Key-Scan interface
    • 12-bit general ADC, 10-bit general DAC
    • PIR (Passive Infra-Red) detection
    • 15 (BL702) or 23 (BL704) or 31 (BL706) GPIOs
    • IR remote control interface
  • Security
    • Secure boot, secure debug
    • XIP QSPI On-The-Fly AES Decryption (OTFAD)
    • AES 128/192/256, MD5, SHA-1/224/256
    • TRNG (True Random Number Generator)
    • PKA (Public Key Accelerator)
  • Clocks – Support XTAL 32MHz, XTAL 32/32.768KHz; Internal RC 32KHz & 32MHz oscillator; internal system PLL & audio PLL
  • Debugging – JTAG
  • Power Modes – Off; Hibernate (RTC/GPIO wakeup); Power Down Sleep (Flexible retention); Active
  • Package Type
    • QFN32 (BL702)
    • QFN40 (BL704)
    • QFN48 (BL706)

The only difference between BL702 and its larger siblings, BL704 and BL706, only seems to be the number of GPIOs. The chips are designed for low-power IoT applications, BLE devices, Zigbee devices,  Smart Home applications, and remote controls.

Availability and documentation

RV-Debugger Plus board is available on Aliexpress for $3.49 plus shipping. You’ll find the documentation and source code (C SDK) on Github. The board can be used as a JTAG+UART board or a dual UART board although support for the latter is on a TODO list. More information about the BL720 chip itself could eventually surface on the product page on Bouffalo Lab website.

[Update: The post was initially published on May 28, 2021, and updated on June 21 as the board became available on Aliexpress, and source code and documentation released]

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15 Replies to “$3.5 RV-Debugger Plus UART & JTAG debug board comes with BL702 Zigbee & BLE RISC-V SoC”

  1. It would be interesting to know if the chip can use 802.15.4 for other protocols than Zigbee (e.g. 6LoWPAN).

    1. Yes, I would like to know too. I can’t see Bouffalo Lab catching up to Espressif without a commitment to being more hacker friendly. I wish companies understood how being documented and fully open makes it so that some people somewhere comes up with a killer use case and then everyone will want to get hold of the chip to replicate the use. Espressif only became Espressif because the ESP8266 was groundbreakingly inexpensive.

      Come on Bouffalo Lab, get that herd to trample Espressif!

      1. Catching Espressif’s level of openness isn’t terribly difficult. English doc, as is often the case for $1 chips, can be trailing, but they’re really trying and if you raise an issue in their GitHub repo, it may get answered by an actual developer.

        BL70x docs were released a few months ago. BL60x has been shipping in quantity for over six months now and the SDK for it was in our hands before the developer boards left China. https://github.com/bouffalolab/bl_iot_sdk . The provided code and examples look to be “enough”. The elephant (bouffalo?) in the room is the radio stack which is not open in either of the Bouffalo or Espressive lines.

        Pine64 has a fork for their Pinenut board and drove a lot of traffic to it at launch offering free hardware for help getting infrastructure up and getting the radio stack reverse engineered. That latter bit seems to have stalled out, but I’m not close to that. Pine was able to drive that because they a good, open radio stack for PinePhone and PineBook. See https://github.com/pine64/bl_iot_sdk

        It looks like 60x is their “IoT” line with 70x being “MCU”.

        Maintenance isn’t awesome with all these shallow copies of the code floating around, but at least nobody’s standing int he way.

        1. Hardware is getting less of a constraint for embedded devices (and debugging) on <$5-$10 tools (cheaper devices with OS and >USB3.x will be replaced with (wireless) easy JTAG connections, if there’s no need for timing critical real-time accesses).

          Now we are at ~$3.5/device.
          This might become a difficulty for known companies (on debugging tools) without improved service/drivers/software tools and alternative products to offer?
          On customer side this improves situation for suitable debugging tools (and Linux (platform independent?) sdk’s).

  2. Gotta love the trend that these new wireless mcus are so cheap and capable they are used for other applications. I see a place for a chip antenna and matching circuit that is not populated.

  3. This looks great, for what it’s worth and the price, I don’t think the firmware will be open source due to some copyright reasons.

  4. From my understanding, Longan Nano was already being able to run rv-link firmware and acts like a jtag debugger to another longan nano.

    So my bet is that it’s all based on gd32fv mcu and with bonus rf module ! Running the firmware available on chinese github equivalent.

  5. For those following this development, the source has been released:
    https://github.com/sipeed/RV-Debugger-BL702 There you go, Neko.

    The device is using the BL702 to implement the device interface of the part of  FTDI’s Multi-Protocol Synchronous Serial Engine (MPSSE) that’s used by OpenOCD.

    I haven’t seen the hardware shipping yet, but at that price, having one semi-permanently attached to each project is easy. Edit: 27 minutes ago, Sipeed JUST posted their availability: https://twitter.com/SipeedIO/status/1406813367860224004

    The JTAG pinout is, of course, incompatible with everything else, including Sipeed’s own products. See P2 at https://github.com/sipeed/RV-Debugger-BL702/blob/e7d35cac6783a52c80115208bf99e75836c4d811/hardware/BL702_USB2JTAG_3610_sch.pdf

    It will be interesting to see if the board has enough headroom to move the dividing line so that the GDB server is running inside this device,bit-banging JTAG out the GPIO lines, and providing a pseudo-serial interface to the host with a GDB debugging protocol. That may not work for the people needing to do gate-level debugging with JTAG, but for most of the software devs (/me raises hand) that would be nifty. It looks like a reasonable starting place for that project might be https://github.com/blacksphere/blackmagic as it seems to be doing this.

    Netmonk, it isn’t a GD32VF Gigadevice SoC; it’s a BouffaloLabs BL702 SoC. Different parts from different companies. BL702 is licensed RISC-V core from SiFive with their own I/O hung around it, just like Gigadevices licensed the Andes core. China has more than one company in it…

    1. That would be the correct English version, but their website is bouffalolab dot com.

  6. Can this be used with devices that has SWD (Serial Wire Debug) interface with pins for SWCLK (SWD IO) and SWDCLK (SWD Clock)?

    Looking for for a cheap programmer that support much of the same MCU types as J-Link BASE / EDU (SEGGER J-Link debug probes).

    https://wiki.segger.com/SWD

  7. I wonder why hasn’t anyone thought of JTAG over wireless before? Maybe even BLE mesh for factory’s JTAG stations?

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