PhaseLatch Mini is a low-cost STM32-based SDR digitizer for the previously released Phase Loom (tuner aboard), built in a Blue Pill–style form factor for HF, FM, and VHF experimentation.
The board uses two 12-bit ADCs that sample I and Q at the same time, combine both readings into a 32-bit data word, and send the data over USB at about 210,000 I/Q sample pairs per second using just the standard USB CDC interface. It includes SMA inputs, a built-in ~100 kHz low-pass filter network, USB-C connectivity, ferrite-filtered power, and dedicated 8 MHz/32.768 kHz crystals for stable timing. Other features of the board include dynamic timer tuning, circular DMA, ISR-driven packet chaining, and a lock-free USB feed path to maintain high-rate streaming.
PhaseLatch Mini specifications:
- Microcontroller – ST STM32F103C8 Arm Cortex-M3 @ 72 MHz
- USB Interface – USB-C 2.0 (Full-Speed) port; CDC class; RAW vendor class planned
- ADC subsystem
- Dual simultaneous ADC mode (12-bit)
- 32-bit output word containing interleaved I (lower 12 bits) + Q (upper 12 bits)
- 210.5k I/Q pairs per second (≈500+ KiB/s USB payload)
- DMA circular mode with half/full callbacks
- Analog Front End
- Inputs – 2× SMA edge connectors
- Filtering – On-board passive ~100 kHz low-pass filter per channel, Multi-stage LC network (10 µH inductors + shunt capacitors)
- Noise reduction with a ferrite bead and decoupling and bulk caps throughout the analog path
- Misc
- 4-layer, compact Blue-Pill-style footprint
- 5.1 kΩ USB-C CC resistors for orientation detection
- Power Supply
- 5V from USB Type-C port
- On-board 3.3 V regulator (MIC5504-3.3)
- Dimensions – 60.2 mm x 20.8 mm (without SMA connectors)
PhaseLatch Mini includes various Python-based host utilities that interface with the STM32F103’s CDC data streaming engine for live monitoring, raw capture, GQRX/GNU Radio integration, and throughput diagnostics. Tools like host_test.py, host_iq_live.py, and host_iq_fifo.py support continuous streaming, real-time IQ visualization, FIFO bridging, and bulk-data capture with drop-resilient handling. The firmware exposes ASCII control commands (START/STOP/A/F) over USB-CDC, while the host scripts decode ADC/DMA counters, track packet chaining efficiency, and measure effective sample rate. Optional PyUSB-based paths are available for future RAW vendor-class endpoints. More information is available on AndersBNielsen PhaseLatchMini GitHub.
Compared to other SDR platforms we’ve covered, like the HackRF Pro with its wide 100 kHz–6 GHz RX/TX coverage and 20 MSPS 8-bit I/Q, and SignalSDR Pro or low-cost receivers like the RTL-SDR Blog V4 and the modular DeepRad, which rely on 8-bit RTL2832U front-ends, the PhaseLatch Mini is a little different. It replaces multi-GHz tuning and high-speed transceive capability in favor of clean, synchronized 12-bit dual-ADC I/Q capture, a proper analog low-pass front-end, and reliable ~210 k I/Q pair/s USB streaming. This makes it better than a dongle-grade receiver in signal quality and I/Q fidelity, while remaining far simpler and more affordable than wideband SDR transceivers like HackRF Pro.
The PhaseLatch Mini is listed on Nielsen’s store for 199.00 DKK, which converts to about $30.69 USD. The PhaseLoom is available for 300.00 DKK, or roughly $46.27 USD. Some additional information is available on Nielsen’s blog.
Via Hackster.io
Debashis Das is a technical content writer and embedded engineer with over five years of experience in the industry. With expertise in Embedded C, PCB Design, and SEO optimization, he effectively blends difficult technical topics with clear communication
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