VEGA AS2161 “DHRUV64” – A 1GHz dual-core 64-bit RISC-V microprocessor designed in India

The Government of India has been investing to spur up its semiconductor design and manufacturing industry at least since 2018/2019 with the SHAKTI and AJIT microprocessors. In 2022, they decided to focus on the RISC-V architecture with the VEGA processor family, starting with the THEJAS32 (VEGA ET1031) and THEJAS64 (VEGA AS1061) microprocessors, and the former was eventually found in the ARIES v3.0 Arduino UNO-inspired development board.

Things continue to progress nicely, albeit slowly, and the government has now announced the launch of the DHRUV64 (VEGA AS2161) dual-core 64-bit RISC-V MPU clocked at 1 GHz and supporting Linux, which it describes as “a fully indigenous microprocessor developed by the Centre for Development of Advanced Computing (C-DAC) under the Microprocessor Development Programme (MDP)”.

VEGA AS2161 (DHRUV64) specifications highlights:

• Architecture – RISC-V 64G (RV64IMAFD) Instruction Set
• 13-16 stage out-of-order pipeline implementation.
• Advanced branch predictor – BTB, BHT, RAS.
• Harvard architecture, separate Instruction and Data memories.
• User, Supervisor, and Machine-mode privilege levels.
• Fully-featured memory subsystem with Linux support: Memory Management Unit (MMU), Page-based virtual memory, Configurable L1 and L2 caches.
• High-performance multi-core Interconnect.
• High-performance IEEE 754-2008 compliant floating-point unit.
• AXI4- / ACE compliant external interface.
• Platform Level Interrupt Controller (up to 127x IRQs, low interrupt latency)
• Vectored interrupt support
• Advanced Integrated Debug Controller – JTAG-compliant interface, HW/SW breakpoints support
• Debug extension allowing Eclipse debugging via a GDB >> openOCD >> JTAG connection

Besides Linux, we’re told that ports of Zephyr OS and FreeRTOS are also available or being worked on. The specs focus on the CPU IP itself, but the chip photo above implies there’s also a complete SoC with I/Os.

The press release highlights that it is the third chip fabricated under the Digital India RISC-V (DIR-V) programme:

The first chip, THEJAS32, fabricated at the Silterra facility in Malaysia.
The second chip, THEJAS64, manufactured domestically at Semiconductor Lab (SCL) Mohali.

It’s important to distinguish between designing and manufacturing a processor, since those are different stages in a country’s progress in its semiconductor sector. For example, we previously covered a 28nm Elvees SKIF “Scythian” SoC designed in Russia, but manufactured in another country, since it will take several years before Russia builds 28nm facilities.

If we look at the roadmap for India’s chip development (unchanged since 2022), we can see that the THEJAS64 was manufactured on a 180nm process, and this was done in an Indian manufacturing plant. The government’s press release does not explicitly say where the DHRUV64 is manufactured, but it’s very likely not in India, although a 28nm facility is scheduled to be up and running by the end of December 2026. The next phases will be the “design, implementation, and fabrication of DHANUSH64 and DHANUSH64+ System-on-a-Chip (SoC) variants” for which work has already started.

The chip targets 5G infrastructure, automotive systems, consumer electronics, industrial automation, and the Internet of Things (IoT). A few more details can be found on the product page for the VEGA AS2161 microprocessor.

Via TechPowerUp and thanks to TLS for the tip

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