Cadence Tensilica HiFi iQ DSP to power next-generation Voice AI and Audio applications

Cadence Tensilica HiFi iQ DSP IP is the sixth generation of the company’s HiFi DSP family found in countless SoCs with audio features, and is based on a new architecture designed for next-generation voice AI and immersive audio applications.

Compared to the Tensilica HiFi 5s DSP, the HiFi iQ DSP offers twice the compute performance, 8x higher AI performance, and more than 25% energy savings for most workloads, while delivering over 40% performance uplift on several audio codecs. The company claims it can act as an all-in-one AI processor for voice AI applications running popular SLMs and LLMs on the DSP itself.

Tensilica HiFi iQ DSP block diagram
Block diagram

Tensilica HiFi iQ DSP key specifications:

  • Load Units – 2
  • VLIW Slots – 5
  • Vector operations (SIMD) – 256-bit
  • Accumulator Width – 80-bit
  • Fixed Point MACs
  • MACs for AI – Up to 128 16×8, up to 256 16×4
  • Optional instructions for AI (improved from HiFi 5s)
  • Optional Vector Floating Point – FP8 (conversion), BF16 (conversion), FP16, FP32, FP64
  • Complex Floating Point with ADDSUB
  • Auto-vectorization improved from HiFi 5s for easy programming; it removes the need for manual optimization to speed up firmware development and time to market

Cadence states that the Tensilica HiFi iQ DSP can support advanced audio codecs such as Dolby MS12, Eclipsa Audio, Opus HD, and Audio Vivid with higher efficiency thanks to architectural enhancements and increased computational capability.

The new DSP also enables signal processing algorithms for keyword spotting (KWS), active noise cancellation (ANC), beamforming, and automatic speech recognition (ASR) for Natural Language Processor (NLP) functions. Furthermore, multi-stream and multi-channel audio playback facilitates rendering of 3D spatial zones and sound bubbles. The HiFi iQ DSP will also be suitable for SoCs designed for safety-critical applications compliant with ISO 26262 functional safety (FUSA) certification. Support for cache-coherent multicore configurations is also in the works.

 

Tensilica HiFi DSP applications

The new Tensilica DSP is compatible with the Cadence NeuroWeave Software Development Kit (SDK), TensorFlow Lite for Micro (TFLM), LiteRT, and ExecuTorch environments for AI model execution. The company also highlights software libraries, compilers, codec packages, and frameworks from partners and OEMs.

Cadence Tensilica audio DSP SoC design flow
Design flow for SoCs with Tensilica DSP

The Tensilica HiFi iQ DSP will be available to lead customers and partners in Q1 2026, and general availability is expected sometime in Q2 2025.  More details can be found on the product page and the press release. You can also check out the table below to see how the new HiFi iQ DSP compares to previous generation Tensilica HiFi DSPs.

FeaturesHiFi 1sHiFi 3zHiFi 4HiFi 5sHiFi iQ
VLIW Slots23455
SIMD64-bit64-bit64-bit128-bit256-bit
Fixed-Point MACs32x32124816
32x1624Up to 81632
16x164Up to 8Up to 81664
MACs for AI (optional)16x88--32Up to 128
8x88--32Up to 256
Accumulator64-bit64-bit64/72-bit64/72-bit80-bit
Instructions for AILimited; included--Yes; optionalYes++; optional (improved from HiFi 5s)
Vector Floating Point (Optional)FP8----16/32 (conversion)
BF16----16/32 (conversion)
FP16---8/1616/32
FP322224/88/16
FP641 (scalar)1 (scalar)1 (scalar)1 (scalar)4/8
Complex Floating Point (w/ ADDSUB)YesYesYesYesYes++ (improved)
Auto-vectorization supportYes--YesYes++ (improved from HiFi 5s)
ITU Intrinsic SupportYesYesYesYesYes
Circular Buffer Support11233
Bitstream VLE/VLD SupportVLDYesYesYesYes
User-defined instructions (TIE)YesYesYesYesYes

Thanks to TLS for the tip.

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