NXP S32N79 octa-core Arm Cortex-A78E/12-core Cortex-R52 "Super-Integration Processor" targets Software-Defined Vehicles (SDV)

NXP recently introduced the S32N79 “Super-Integration” automotive processor, part of the S32N7 series, equipped with up to eight Arm Cortex-A78E application cores and twelve Arm Cortex-R52 cores for real-time processing.

Building on the earlier 5 nm S32N55 16-core Cortex-R52 + 2x Lockstep Cortex-M7 automotive processor, the S32N79 automotive processor is still designed for software-defined vehicles (SDV), but its Cortex-A78E applications cores further enable features such as ADAS sensor fusion and data AI services, as well as improved vehicle gateway/processing functions.

NXP S32N79 key features and specifications:

CPU
- Up to 8x split-lock Arm Cortex-A78AE cores operating at up to 1.8 GHz
  Up to 12x split-lock Arm Cortex-R52 cores operating at up to 1.4 GHz
- RISC-V-based accelerator for networking, math, and data-intensive workloads
AI accelerator – eIQ Neutron neural processing unit (NPU) for vehicle core NeuroNetwork offload
Memory
- Up to 2x LPDDR4X/5/5X DRAM interfaces
- Up to 36 MB platform SRAM
Storage
- 2x channel NVM interface supporting serial, quad, and octal NOR memory
- UFS 3.1 interface
- eMMC 5.1 NAND flash and SD Card/SDIO flash support
Communication and Networking
- Independent communication subsystem manages low-speed communication interfaces
- CAN Hub virtualizes CAN I/O and allows applications to share CAN I/O pins, allows CAN frames to be routed to multiple CAN controllers, and offloads CAN-to-CAN routing from the host core
- Multiple CAN FD, CAN XL, LIN, and FlexRay interfaces
- Integrated 10 Mbps to 10 Gbps Time-Sensitive Networking (TSN) Ethernet switch
- Per-port In-line encryption with MACsec acceleration
- PCI Express Gen 4 (Root Complex)
- PCle engine with support for multiple services, including Non-Transparent-Bridge (NTB)
Application Integration
- Full on-chip hardware isolation and virtualization for isolated, mixed-criticality applications
- Core-to-pin virtual hardware isolation technology supports freedom from interference
Functional Safety
- Arm Cortex-M7-based independent system manager for functional safety across all SOC partitions
- Hardware provides freedom from interference and virtualized Quality of Service (QoS) mechanisms for shared resources
- Keeps fault impact at the integrated ECU level with local reactions
- Runtime operating mode, safe stop, and reset, all controlled individually for each integrated ECU, reducing the number of faults that lead to SoC reset
- ISO 26262 for ASIL-D functional safety
Security
- Integrated HSE2 security engine enables postquantum hardware root-of-trust, fast secure boot, secure debug, secure update, real-time, high-speed message signing, authentication and encryption for secure communications, and more
- Secure boot, security services, and key management
- Public key infrastructure and side-channel attack resistance
- Cybersecurity processes certified to ISO/SAE 21434, UN R155; targeted for SESIP Level 2 certification
- Up to 2x asymmetric crypto accelerators support secure communications and secure OTA updates
- Up to 2x symmetric accelerator in-vehicle communications
Low-Power Modes
- Up to 5x power modes supporting always-ON, ultra-low-power, and AI-enabled low-power operation capabilities
- Suspend to RAM support
- Periodic wake support
Package – FBGA1312
Temperature Range – -40°C to 105°C; AEC-Q100 Grade 2
Process – TSMC 5nm

On the software side, NXP lists QNX OS for Safety, QNX Hypervisor, QNX RTOS, and QNX SDP (Software Development Platform), as well as development tools by Synopsis and Lauterbach. I~~t’s likely the Cortex-A78E application core will run Android or Linux operating systems, possibly simultaneously using the hypervisor, and the Cortex-R52 cores QNX RTOS and/or QNX OS for safety~~. [Update: QNX is running on the Cortex-A78E cores, see comments section]. I’d assume the Cortex-M7 cores used for system control and safety run some bare metal code without RTOS.

NXP explains that “vehicle super-integration processors” are found in automotive central compute applications:

Central compute is the centralized consolidation of vehicle control, management and services processing in a software-defined vehicle (SDV) architecture. Central compute can include a central vehicle controller, which focuses on real-time applications and a central vehicle computer, which addresses applications processing.

The NXP S32N79 is like an all-in-one automotive processor, similar to the Black Sesame Technologies Wudang C1200 “cross-domain” automotive SoCs we covered last week. Automotive SoCs are now incredibly powerful, and it’s only getting started with the upcoming Renesas R-Car X5H to feature up to 32x Armv9 Cortex-A720AE cores.

NXP S32N family February 2026 — NXP S32N family (as of February 2026)

The first customer of the S32N7 series will be Bosch. The company integrated the Cortex-A78E/R52 SoC into its vehicle integration platform, and reference designs, safety frameworks, hardware integration, and an expert enablement program were co-developed with NXP.

The S32N7 series was just introduced at CES 2026, and the S32N79 is still at the preproduction stage. If history is any guide, an industrial-grade processor from NXP may take years to launch after the initial announcement, and it might even take longer for automotive chips, so I would be surprised to find it in any commercially available cars or vehicles before 2028 or 2029. Pricing is obviously not available, but considering the recently announced STMicroelectronics Stellar P3E quad-core Arm Cortex-R52+ automotive MCU goes for $82.65 per unit in 500 pieces orders, I’d expect the S32N79 SoC to sell for several hundred dollars. More details may be found on the product page and the CES 2026 press release.

Thanks to “Name” for the tip.

Jean-Luc Aufranc (CNXSoft)

Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time later in 2011.