STM32U3B5/C5 ultra-low-power MCU features 640 KB RAM, 2 MB Flash, and HSP accelerator to run AI without batteries

STMicroelectronics has added two members to the STM32U3 ultra-low-power Arm Cortex-M33 microcontroller family: the STM32U3B5 and STM32U3C5 MCUs get more resources with up to 640 KB SRAM and 2 MB flash, as well as an HSP (hardware signal processor) accelerator to run AI/ML workloads without batteries, just using energy harvesting.

The new chips are still clocked at up to 96 MHz, benefit from a near-threshold design (down to 0.65 V), allowing a power consumption of just 117 Coremark/mW in active mode, and can operate up to 105°C ambient temperature. They come with one additional group of interfaces, bringing the total to four SPI and I2C, two I3C and CAN-FD, and five UARTs, as well as five more 16-bit timers, for a total of 10. The STM32U3C5 also includes a cryptocore to accelerate encryption and decryption operations, and supports the CCB (Coupling and Chaining Bridge) hardware security feature, both of which are missing in the STM32U3B5.

ST STM32U3B5/C5 key features and specifications:

• MCU Core
  • 32-bit Arm Cortex-M33 CPU @ 96 MHz with TrustZone and FPU
  • Performance
    • 1.5 DMIPS/MHz (Dhrystone 2.1)
    • 395.4 CoreMark (4.12 CoreMark/MHz)
• ART Accelerator with DSP instructions
• Mathematical coprocessor – Hardware signal processor (HSP) for digital signal and artificial intelligence processing
• Memory/Storage
  • 640 KB SRAM, including 384 KB with hardware parity check
  • 2 MB dual-bank flash with ECC
  • OCTOSPI external memory interface supporting SRAM, PSRAM, NOR, NAND, and FRAM memories
  • SDMMC interface
• Peripherals
  • Up to 114x GPIOs with interrupt capability, most 5 V-tolerant, and up to 14x I/Os with independent supply down to 1.08 V
  • USB 2.0 full-speed controller
  • Audio
    • 1x SAI serial audio interface
    • Audio digital filter with sound-activity detection
  • 4x I2C FM+(1 Mbit/s), SMBus/PMBus
  • 3x I3C (SDR), with support of I2C FM+ mode
  • 3x USARTs and 2x UARTs (SPI, ISO 7816, LIN, IrDA, modem), 1x LPUART
  • 4x SPIs (7x SPIs when including 1x with OCTOSPI + 2x with USART)
  • 2x CAN FD controllers
  • 12-channel GPDMA controller, functional in Sleep and Stop modes (up to Stop 2)
  • Up to 24x capacitive sensing channels with support for touch key, linear, and rotary touch sensors
  • Analog
    • 2x 12-bit ADC 2.5 Msps with hardware oversampling
    • 12-bit DAC module with 2x D/A converters, low-power sample and hold, autonomous in Stop 1 mode
    • 2x operational amplifiers with built-in PGA
    • 2x ultralow-power comparators
  • Up to 17x timers and 2x watchdogs
    • 2x 16-bit advanced motor‑control
    • 3x 32‑bit and 4x 16‑bit general purpose
    • 2x 16‑bit basic
    • 4x low‑power 16‑bit timers (available in Stop mode)
    • 2x watchdogs
    • 2x SysTick timer
    • RTC with hardware calendar, alarms, and calibration
  • CRC calculation unit
• Security and cryptography
  • Arm TrustZone and securable I/Os, memories, and peripherals
  • Flexible life cycle scheme with RDP and password protected debug
  • Root of trust due to unique boot entry and secure hide protection area (HDP)
  • Secure firmware installation (SFI) from embedded root secure services (RSS)
  • Secure data storage with hardware unique key (HUK)
  • Secure firmware upgrade
  • Support of Trusted firmware for Cortex-M (TF-M)
  • 2x AES coprocessors, including one with side channel attack resistance (SCA) (SAES)
  • Public key accelerator, SCA resistant
  • Key hardware protection
  • Attestation keys
  • HASH hardware accelerator
  • True random number generator (TRNG), NIST SP800-90B compliant
  • 96-bit unique ID
  • 512-byte OTP (one-time programmable)
  • Antitamper protection
• Clocks
  • 4 to 50 MHz crystal oscillator
  • 32.768 kHz crystal oscillator for RTC (LSE)
  • Internal 16 MHz factory-trimmed RC (±1 %)
  • Internal low-power RC with frequency 32 kHz or 250 Hz (±5 %)
  • 2x internal multispeed 3 MHz to 96 MHz oscillators
  • Internal 48 MHz with clock recovery
  • Accurate MSI in PLL-mode and up to 96 MHz with 32.768 kHz, 16 MHz, or 32 MHz crystal oscillator
• Debugging – Serial-wire debug (SWD), JTAG, Embedded Trace Macrocell (ETM)
• Supply Voltage – 1.71V to 3.6V
• Power management – Embedded regulator (LDO) and SMPS step-down converter supporting switch on-the-fly and voltage scaling
• Power Consumption
  • 1.6 μA Stop 3 mode with 8-Kbyte SRAM
  • 3.15 μA Stop 3 mode with full SRAM
  • 3.5 μA Stop 2 mode with 8-Kbyte SRAM
  • 5.7 μA Stop 2 mode with full SRAM
  • 12 μA/MHz Run mode @ 3.3 V (While(1) SMPS step-down converter mode)
  • 15.5 μA/MHz Run mode @ 3.3 V/48 MHz (CoreMark SMPS step-down converter mode)
  • 20 μA/MHz Run mode @ 3.3 V/96 MHz (CoreMark SMPS step-down converter mode)
• Packages  – All ECOPACK2 compliant (RoHS+)
  • UFQFPN48 – 7 x 7 mm 
  • LQFP48  – 7 × 7 mm
  • LQFP64 – 10 × 10 mm
  • WLCSP72  – 3.67 x 3.58 mm
  • WLCSP99 – 3.67 x 3.58 mm
  • LQFP100 – 14 × 14 mm
  • WLCSP126 – 3.67 x 3.58 mm
  • UFBGA132  – 7 × 7 mm
  • LQFP144 – 20 × 20 mm
• Temperature Range – -40°C to +105°C

Changes between the earlier STM32U375 and STM32U385, and the new STM32U3B5 and STM32U3C5 are highlighted in bold. The company reports a slightly higher power consumption and improved CoreMark benchmark for the new STM32U5 under the same conditions. The updated interface numbers add one interface, and none of the packages are common between the U375/U385 and U3B5/U3C5 families, except the LQF48 package.

ST explains the benefits of the new HSP accelerator in a blog post, and it notably delivers 13x better performance than a traditional Cortex-M33, 9x better power efficiency than an STM32U5, 3x better performance than a Cortex-M55 with MVE, and up to 9x better performance than a Cortex-M33 using TensorFlow Lite for MCU for keyword spotting, image classification, or a visual wake word algorithm.

Software development tools include the STM32CubeMX initialization code generator, the STM32CubeU3 MCU package, and the STM32 AI SW ecosystem.  The company also mentions a batteryless demo using a Nucleo board with the STM32U3C5 and a camera powered by photovoltaic modules, and running a person detection algorithm leveraging the new HSP will be demonstrated at Embedded World 2026. This must be the STM32 Nucleo-144 development board (NUCLEO-U3C5ZI-Q) with STM32U3C5ZI MCU, SMPS, and support for Arduino and ST morpho connectivity.

The entry-level STM32U3B5CG MCU with 48-pin packages sells for $2.9298 per unit for 10K orders, while the high-end 144-pin STM32U3C5ZI goes for $4.6829 per unit for 10K orders. The NUCLEO-U3C5ZI-Q development board is supposed to be available for $30 on Future Electronics, but the link does not work for me right now. More details about the STM32U3B5/C5 microcontrollers can be found on the product page and the ST blog.

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