Upcoming ESP32-S31 dual-core RISC-V MCU offers Gigabit Ethernet, WiFi, Bluetooth, and 802.15.4 connectivity

It looks like Espressif Systems has a new powerful wireless microcontroller in the works, with the ESP32-S31 sharing some features of the ESP32-P4 and ESP32-S3 microcontrollers.

The ESP32-S31 is a dual-core RISC-V MCU with one high-performance core with FPU and SIMD instructions, and one low-power RISC-V core, featuring 62 GPIOs, a Gigabit Ethernet MAC, WiFi, Bluetooth, and 802.15.4 (Thread/Zigbee/Matter) wireless connectivity, and more.

ESP32-S31

ESP32-S31 preliminary specifications:

  • MCU subsystem
    • RISC-V HP (High-performance) RV32IMAFCP CPU @ 320 MHz with FPU, SIMD, etc. 
    • RISC-V LP (Low-power) MCU core
  • Memory & Storage I/F
    • 512 KB SRAM
    • 32 KB RTC SRAM
    • Support for external octal PSRAM and flash up to 64MB @ 250 MHz
  • GPU – 2D Pixel Processing Accelerator (PPA) and
  • VPU – (M)JPEG codec support
  • Peripherals
    • Display I/F – 8-bit to 24-bit Parallel LCD interface
    • Camera I/F – 8-bit/16-bit DVP camera interface
    • Audio – 2x I2S
    • Networking
      • Gigabit Ethernet
      • 2.4 GHz WiFi 6 (802.11ax)
      • Bluetooth 5.4 with support for LE Audio, direction finding, Bluetooth Mesh 1.1, and Classic (BR/EDR)
      • 802.15.4 for Zigbee, Thread, and Matter
    • USB – USB 2.0 OTG (High Speed)
    • Up to 62x GPIOs
    • 4x MCPWM (Motor Control PWM)
    • 4x UART, 2x I2C, 2x SPI
    • ADC
    • 14-channel touch sensor
    • System timer (2 counters, 3 alarms)
    • Low-power core peripherals – Analog input, UART, IC, SPI
  • Security
    • eFuse with key-purpose field
    • Flash and PSRAM encryption (XTS-AES-128/256)
    • Physical Memory Protection (PMP) with 128-byte granularity
    • AES, SHA, RSA, ECC
    • RAM-based PUF (Physically Unclonable Functions)
    • Secure boot
    • Digital signature peripheral
    • Protections against side-channel attacks and power glitch manipulation.
    • Trusted Execution Environment (TEE) with Access Permission Management (APM) for software isolation for secure multi-application deployment. 
  • Misc – 40 MHz XTAL support

ESP32S31 peripherals

I put the specs above together from the ESP32 forum, as well as the esp32s31.peripherals.ld and soc_caps.h files in the ESP-IDF framework source code. They likely have some mistakes and omissions, so correct me in the comments if I missed something important.

There’s only one high-performance RISC-V core against two for the ESP32-P4, and the ESP32-S31 apparently lacks H.264 VPU, MIPI DSI, and MIPI CSI interfaces, so its multimedia capabilities are more limited. It’s still probably the most powerful wireless SoC from Espressif Systems so far, and it also comes with 62 GPIOs, more than any other ESP32 microcontroller, as well as Gigabit Ethernet.

ESP32-S31 soc caps.h

Thanks to Loic for the tip.

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