Broadcom has recently introduced two complementary chips for 50G Passive Optical Network (PON) gateways: the BCM68850 gateway SoC and the BCM55050 Optical Network Unit (ONU) SoC. The devices target fiber-to-the-home (FTTH) infrastructure, such as home gateways, ONTs/ONUs, and multi-gigabit CPE, to deliver ultra-fast, low-latency connectivity for AI workloads, UHD streaming, and more.
The BCM68850 is a 50G ITU-PON gateway SoC with a multicore Arm CPU, integrated NPU for edge AI, and Wi-Fi 8 support, for high-speed routing, Ethernet switching, VoIP, and AI-driven functions. It also supports multiple PON standards along with LPDDR4/5 memory, PCIe, USB, and various security features. The BCM55050, on the other hand, is an ONU/ONT SoC with a dual-core processor and 50G network processor, supporting multiple PON standards, high-speed interfaces, hardware acceleration, and QoS. Together, they are designed for end-to-end 50G fiber deployments with high throughput, low latency, and scalable broadband infrastructure.
Broadcom BCM68850 50G ITU-PON Gateway SoC
The BCM68850 is a single-chip gateway SoC designed to handle small packet WAN-to-LAN routing, L3/L4 packet processing, and tri-band concurrent Wi-Fi 8 wireless networking.
Broadcom BCM68850 specifications:
- Processor – Quad-core Brahma53 (B53) Armv8 CPU
- Network Processor – DI-XRDP with flexible classification and filtering, paired with a dual-issue runner packet processor for line-speed offload of wired and wireless data paths
- AI – Broadcom Neural Engine (BNE) supporting convolutional neural networks for anomaly detection, voice recognition, and cybersecurity analysis
- Memory I/F – Integrated LPDDR4, LPDDR5, and LPDDR5x controller and PHY
- Storage I/F – Support for flexible NAND flash and eMMC
- Networking
- PON – Integrated Fiber WAN interfaces with 50G ITU-PON, ITU XGS-PON, XG-PON, NG-PON2, 50G HSP PON, 25G EPON, 10G EPON, and Active Ethernet up to 50Gbps
- Wireless – Native processing for tri-band concurrent Wi-Fi 8 wireless networking
- Ethernet – Integrated 50Gbps, 25Gbps, and 10Gbps Ethernet interfaces (SLAN) with connection support for an external 10GbE PHY
- Physical Layer (Transceivers) – Glueless interface to standard SFF transceivers, onboard BOSA, SFP, SFP+, XFP, and SFP56
- USB – 1x integrated USB 3.0 controller
- Other I/Os – Serial Port Interface (SPI), I2C, and Pulse Code Modulation (PCM) highway
- Expansion – Multiple multi-lane PCIe ports, including dual PCIe 3.0 interfaces
- Security – Dedicated security processor (SMC) for secure boot and Post-Quantum Cryptography (PQC) support
- Power – Centralized power management architecture
- Package – BGA (speculative; from part number stamped on the chip BCM68850KFSBG)
The SoC is primarily designed for residential FTTH (fiber to the home), multi-gigabit fiber CPE, and 50G PON Wi-Fi 8 Ethernet gateways.
Broadcom BCM55050 50G PON ONU SoC
For the ONU side, Broadcom has the BCM55050 SoC, a 50G PON chip that combines a dual-core processor, a high-speed 50G network engine, and built-in AI support for edge tasks.
Broadcom BCM55050 specifications:
- Processor – Dual-core Brahma53 (B53) application processor running at 1 GHz, featuring 32 KB I/D caches and a 1 MB L2 shared cache.
- Network Processor – XRDP Network Processor (Dual Issue Runner Data Path) for 50 Gbps Layer 2 packet processing, hardware acceleration, real-time load balancing, classification, and dynamic power reduction
- AI Engine – Integrated AI/ML Neural Processing Unit (NPU)
- Memory I/F – 32-bit wide interface supporting 2133 MHz LPDDR4, with documentation also noting LPDDR5 and DDR3 controller compatibility
- Storage I/F – Flexible flash memory support, including NAND and SPI interfaces, alongside One-Time Programmable (OTP) memory
- Networking
- PON – Integrated Fiber WAN interfaces supporting 50G ITU PON, NGPON2, XGS-PON, 10GEPON, XGPON, GPON, and EPON
- Ethernet – Integrated LAN ports with Ethernet MAC that support 100Gbps, 25Gbps, 10Gbps, and 2.5Gbps throughputs, with two RGMII interfaces, four HSGMII interfaces, two 10Gbps XFI interfaces, and two 25Gbps SerDes interfaces
- Physical Layer (Transceivers) – Internal SerDes circuitry enabling a glueless interface directly to optical transceivers
- SGMII/HSGMII serial interfaces include support for the G999.1 (G.int) standard.
- Other I/O – PCM, I2C, GPIO, MDIO, and 2x UART interfaces
- Expansion – 1x PCIe Gen 2 (single lane)
- Security – Unrivaled QoS management and hardware security, featuring Secure Boot enforced by a dedicated Security Management Controller (SMC)
- Dimensions / Package – 25 mm x 25 mm FCBGA
- Temperature Range – -40°C to 85°C (Industrial ambient temperature, requiring a heat sink)
Because the processors run independently, the chip can handle both normal ONU tasks and high-speed network traffic simultaneously.
As of 2026, the fastest residential fiber plans typically max out at 8-10 Gbps, such as Google Fiber’s 8 Gig tier. No ISP is currently offering 50 Gbps connections to a single standard home. Broadcom’s angle here is about “network headroom,” handling massive multi-gigabit micro-bursts of data instantly to clear the shared fiber channel faster, thereby minimizing latency for latency-critical applications like AI synchronization and ultra-HD telepresence.
While writing, I came across proprietary and highly specific terms that are worth highlighting, which include:
- Brahma53 (B53) – This is Broadcom’s custom-designed ARMv8-based processor core.
- DI-XRDP / XRDP – This stands for Dual Issue Runner Data Path. It’s Broadcom’s proprietary hardware-accelerated network processing unit (NPU) architecture designed specifically for line-speed packet processing without bottlenecking the main CPU.
- BNE (Broadcom Neural Engine) – This isn’t a generic NPU; it’s Broadcom’s specific ML/AI inference engine designed for edge connectivity tasks (like fault localization and anomaly detection).
- G999.1 (G.int) – An ITU-T standard that defines the interface between the MAC and the PHY in high-speed PON systems.
- Glueless Interface – This means the chip’s internal SerDes (Serializer/Deserializer) can connect directly to standard optical transceivers (like SFP56) without needing any intermediate “glue logic” chips on the PCB. This lowers the BOM cost and saves physical board space.
Previously, we have written about Qualcomm’s Dragonwing Wi-Fi 8 networking platforms, such as the FiberPro A8 Elite, which supports up to 10G PON and supports various wireless features, including 5G FWA and high Wi-Fi speeds, as well as the Broadcom BCM67142, BCM67192, and BCM68565 chips for low-cost WiFi 8 10 Gbps fiber access points. In comparison, Broadcom’s BCM68850 and BCM55050 push fiber performance further with 50G PON for higher capacity. Both platforms also compete in Edge AI, using built-in NPUs to handle tasks like traffic routing, optimization, and detection with low latency.
Broadcom BCM68850 and BCM55050 50G PON SoCs are sampling to early access customers and partners. As usual for enterprise networking chips, you will need to contact a local Broadcom sales representative for exact pricing and sample requests. Some additional information can be found on the Broadcom website and in the press release.
Debashis Das is a technical content writer and embedded engineer with over five years of experience in the industry. With expertise in Embedded C, PCB Design, and SEO optimization, he effectively blends difficult technical topics with clear communication
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