Amlogic A311Y3 octa-core Edge AI SoC features Cortex-A78/A55 cores, 8 TOPS NPU, LPDDR5 support

Amlogic has introduced the A311Y3 Edge AI SoC, which seems to be an upgrade over earlier designs such as the A311D and A311D2 used in boards like the Khadas VIM3 and Khadas VIM4.

Although not listed on the official Amlogic website, documentation from vendors such as Shenzhen Tomato Technology indicates that the A311Y3 SoC is built around a 6nm process node and features a newer CPU architecture based on Arm Cortex-A78/A55 cores. The SoC integrates an NPU with up to 8 TOPS of compute performance and supports LPDDR5/LPDDR5X memory, which can be used in both processing and Edge AI, compared to earlier A311-series chips.

Amlogic A311Y3 Octa-Core Edge AI SoC

Amlogic A311Y3 specifications

  • CPU
    • 2x Arm Cortex-A78 cores (64KB L1 I-cache, 64KB L1 D-cache, 256KB L2 cache)
    • 6x Arm Cortex-A55 cores (32KB L1 I-cache, 32KB L1 D-cache, 128KB L2 cache) with a shared 2MB L3 cache
    • Neon and Crypto extensions included
  • Co-processors – RISC-V core for system control processing; Built-in RISC-V core for Always-on power management and Sensor Hub
  • GPU
    • ARM Mali-G625 MC1 GPU with OpenGL ES 3.2, Vulkan 1.4, and OpenCL 3.0
    • 2.5D graphics processor (VICP + GE2D) bitblt engine supporting up to 16 image compositions and 4096 x 4096 output resolution
  • VPU (Video Engine – AVE-10)
    • Decode – up to 4K @ 120 fps (AV1, H.265, VP9, AVS3, etc.)
    • Encode
      • H.265 / H.264 up to 4K @ 60fps
      • MJPEG up to 4K @ 30fps
      • Multi-stream decoding (e.g., 2×4K@60 or 4×1080p@60)
    • 9th Gen Advanced Amlogic TruLife Image Engine with inline AI-SR (AI Super Resolution), Dolby Vision (Optional), HDR10, HDR10+, HLG, and Vivid HDR
  • NPU
    • 8 TOPS Amlogic Deep Learning Accelerator (ADLA) supporting INT4, INT8, INT16, FP8, FP16, and BF16 precision
    • Works with TensorFlow, TensorFlow Lite, ONNX, PyTorch, Darknet, MxNet, and Caffe
  • Memory – Up to 16GB LPDDR5/LPDDR5X (up to 6400 Mbps) or LPDDR4/LPDDR4X (up to 4266 Mbps)
  • Storage
    • eMMC 5.1/5.2 interface (400Mbps) with Hardware Command Queue (HW CQ) and in-line encryption
    • SLC/SPI/QSPI NAND Flash with 8-bit ECC
    • SDSC/SDHC/SDXC and SDIO interface (1-bit/4-bit, up to UHS-I SDR104)
  • Video Output
    • 1x HDMI 2.1a up to 4K @ 60Hz with eARC, ALLM, VRR, QMS, QFT, SBTM, and HDCP 1.4/2.3
    • 1x DisplayPort (DP) 1.4 up to 4K @ 60Hz with MST and DP Alt Mode via USB Type-C
    • 1x eDP 1.3/1.4 TX up to 4 lanes, 4K @ 60Hz with PSR/PSR2 support
    • 2x 4-lane MIPI-DSI up to 2.5 Gbps per lane (up to 2560 x 1600 @ 60Hz or 1920 x 1080 @ 120Hz)
    • 1x 8-lane V-by-One TX up to 4K @ 60Hz
    • 1x LVDS TX up to 1080p @ 60Hz
    • Dual independent displays supported (up to 4K + 4K duplicate mode or 4K + 2.5K extended mode)
  • Video/Camera Input
    • 1x HDMI 2.1a input up to 4K @ 60Hz with eARC, ALLM, VRR, QMS, QFT, SBTM, and HDCP 1.4/2.3
    • 2x 4-lane MIPI-CSI interfaces (2.5 Gbps per lane), supporting up to 4 virtual channels per port (RAW, YUV, or RGB formats)
    • Integrated ISP wtih up to 13MP @ 30fps or 16MP @ 20fps (WDR); features 3A, PDAF, 2D/3D NR, and CAC
    • Dewarp Unit supporting panoramic, spherical, and perspective dynamic corrections up to 16MP
    • Computer Vision Engine (CVE) for background modeling, motion target detection, face tracking, etc
  • Audio
    • 1x SPDIF input, 2x SPDIF output ports
    • 3x TDM/I2S input and 3x TDM/I2S output ports (up to 16 channels, 16/24/32-bit, up to 192kHz)
    • 8-channel PDM input supporting up to 8 digital microphones (DMICs)
    • Sound Event Detection (SED) and Asynchronous Sample Rate Converter (ASRC)
    • Optional HiFi 5 Audio DSP with single/half-precision vector FP and neural network extensions
  • Networking
    • 2.5Gbps Ethernet MAC via HSGMII interface
    • 1Gbps Ethernet MAC via RGMII interface
    • Wireless network support expansion via PCIe, SDIO, USB, UART, or PCM (for WiFi/Bluetooth modules)
  • USB
    • 1x USB 3.0 DRD (Dual Role Device, up to 5Gbps, combo with DP 1.4 TX)
    • 1x USB 3.0 Host (combo with PCIe 2.0 and HSGMII)
    • 1x USB 2.0 DRD
    • 1x USB 2.0 Host
  • Expansion
    • 1x PCIe 3.0 x2 (supports lane bifurcation to 1×2 lane or 2×1 lane; Root Complex and Endpoint modes)
    • 1x PCIe 2.0 x1 (Root Complex mode, combo with USB 3.0 Host and HSGMII)
  • Other I/O
    • Digital TV 2x serial or 1x parallel + 1x serial Transport Stream (TS) inputs with demux; ISO7816 smart card controller
    • 9x I2C, 2x I3C (supporting SDR, HDR-DDR, and HDR-BT modes)
    • 6x UART (up to 4Mbps, 4-wire with hardware flow control)
    • 14x PWM
    • 6x SPI (master/slave mode)
    • 1x CAN FD (FlexCAN) protocol specification compliant with ISO 11898-1:2015
    • IR interface (1x RX, 1x TX)
    • 5-channel 10-bit SAR ADC
  • Security
    • Arm TrustZone (TEE)
    • Secure boot, encrypted DRAM, encrypted OTP
    • AES, RSA (up to 8K), ECC
    • Post-quantum crypto (ML-DSA / Dilithium)
    • TRNG, SHA-1/2, HMAC
  • Power
    • Multi-voltage I/O design (1.8V/3.3V)
    • Multiple software-controlled power domains and DVFS support
    • Always-On (AO) domain contains dedicated I/Os (4x UART, 4x I2C, 1x I3C, 3x SPI, 7x PWM, 1x CEC, IR, PDM) to interface with an external PMIC.
  • Package – TBD

Amlogic A311Y3 Block Diagram
A311Y3 Block Diagram

After going through the specifications, it’s clear that compared to earlier Amlogic SoCs, the A311Y3 uses a newer CPU configuration with up to 2× Cortex-A78 + 6× Cortex-A55, instead of the Cortex-A73/A53 setup used in the Amlogic A311D and Amlogic A311D2. It is also built on a 6nm process. The NPU performance increases to about 8 TOPS, compared to 5 TOPS (A311D) and 3.2 TOPS (A311D2). The platform supports up to 16GB LPDDR5/LPDDR5X memory. The I/Os are also enhanced with 2.5Gbps Ethernet, PCIe 3.0, dual CAN FD, and hardware support for post-quantum cryptography.

According to SZTomato, the A311Y3 supports Android 16 (64-bit) based on Linux Kernel 6.12, along with standard GNU/GCC development tools. On Linux, initial mainline kernel support has been submitted by an Amlogic engineer with patches adding device tree bindings for the Amlogic A9 family. These patches currently provide support for the CPU, GIC, interrupts, timers, and UART, with broader peripheral enablement expected as the series progresses through upstream review. While searching, I also found a basic device tree for the BY401 development board, which appears to be an internal Amlogic reference board for the A311Y3 SoC.

Amlogic A311Y3 Development Board
A311Y3 Development Board from 9Tripod

While searching for more details, I came across the dev board from 9tripod, which features the A311Y3 SoC octa-core CPU and supports up to 16GB of LPDDR5/LPDDR5X RAM, 4K video encoding/decoding, and multiple display outputs, including HDMI 2.1, DP, and MIPI-DSI. The board also offers various connectivity options, including PCIe 3.0, 2.5G Ethernet, USB 3.0, and various industrial interfaces like CAN FD, I2C, SPI, and UART, making it suitable for embedded and AI applications.

The specifications for the Amlogic A311Y3 SoC were derived from the SZTomato website, and they also published a separate article explaining why the new chip is suitable for Smart Retail and commercial AIoT devices, and comparing the A311Y3 to RK3572.

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