Posted on - No Comments on F&S Elektronik Introduces efus A53LS NXP QorIQ LS1012A System-on-Module for Communication & Networking Applications

F&S Elektronik Introduces efus A53LS NXP QorIQ LS1012A System-on-Module for Communication & Networking Applications

NXP QorIQ LS1012A is a single core Cortex A53 communication processor that offers a 64-bit update to LS1021A dual core Cortex A7 processors found in gateways such as NXP LS1021A-IOTA IoT gateway reference design, and F&S Elektronik System has just launched efus A53LS system-on-module powered by the processor with up to 1GB RAM, up to 64SQPI NOR, access to the communication interfaces and peripherals from the processor via an efus compliant edge connector, and long term availability until 2030. efus A53LS COM specifications: Processor – NXP QorIQ Layerscape LS1012A  single core ARM Cortex-A53 @ up to 800MHz System Memory – 512MB DDR3 by default, supports up to 1GB DDR3 RAM Storage – Up to 64MB QSPI NOR flash on-module, I/Os for SATA and SD card on edge connector Connectivity – 2x Realtek RTL8211F(N) Gigabit Ethernet transceiver chips, optional wireless module with dual WiFi IEEE802.11b/g/n/ac and Bluetooth 4.0 LE efus edge connector with 1x SDIO 2x Gigabit Ethernet 1x USB 3.0 …

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Posted on - 12 Comments on NXP Introduces QorIQ LS1046A Quad Cortex A72 Communication Processor with 10 GbE, SATA 3.0, PCIe 3.0, etc…

NXP Introduces QorIQ LS1046A Quad Cortex A72 Communication Processor with 10 GbE, SATA 3.0, PCIe 3.0, etc…

NXP has unveiled a new QorIQ communication processor with LS1046A based on quad ARM Cortex-A72 cores, and including 10GbE, PCIe Gen.3, SATA 3.0, and USB 3.0 interfaces. The processors targets CPE and vCPE (virtual Customer Premise Equipment), routers, NAS, and service provider gateways for the home and small office, as well as single board computers. QorIQ LS1046A key specifications: CPU – Four ARM Cortex -A72 cores with 2MB L2 cache; 32,000 CoreMarks. Memory  – 32-/64-bit DDR4 memory controller Storage – SATA 3.0 controller, quad SPI Connectivity 2x 10 Gigabit Ethernet controllers 1x 2.5 Gigabit Ethernet controller 4x Gigabit Ethernet controllers Other peripherals 3x PCIe 3.0 Controllers, x4, x2, x 1 3x USB 3.0 with integrated PHY 4x UART, 4x I2C, SPI, GPIO JTAG Support for hardware-based virtualization via ARM SMMU Packet processing acceleration –  Packet classification and distribution; hardware work scheduling, shaping, and buffer management. Integrated security engine – High-speed security protocol processing, including IPsec, SSL, DTLS, and IKE.  SEC …

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Posted on - 12 Comments on Linux 4.0 Release – Main Changes, ARM and MIPS Architectures

Linux 4.0 Release – Main Changes, ARM and MIPS Architectures

Linus Torvalds “Ima Sheep” released Linux Kernel 4.0 on Sunday: So I decided to release 4.0 as per the normal schedule, because there really weren’t any known issues, and while I’ll be traveling during the end of the upcoming week due to a college visit, I’m hoping that won’t affect the merge window very much. We’ll see. Linux 4.0 was a pretty small release both in linux-next and in final size, although obviously “small” is all relative. It’s still over 10k non-merge commits. But we’ve definitely had bigger releases (and judging by linux-next v4.1 is going to be one of the bigger ones). Which is all good. It definitely matches the “v4.0 is supposed to be a_stable_ release”, and very much not about new experimental features etc. I’m personally so much happier with time-based releases than the bad old days when we had feature-based releases. That said, there’s a few interesting numerological things going on with 4.0. Looking at just …

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Posted on - 5 Comments on Linux 3.19 Release – Main Changes, ARM and MIPS Architectures

Linux 3.19 Release – Main Changes, ARM and MIPS Architectures

Linus Torvalds released Linux Kernel 3.19 yesterday: So nothing all that exciting happened, and while I was tempted a couple of times to do an rc8, there really wasn’t any reason for it. Just as an example, Sasha Levin used KASan and found an interesting bug in paravirtualized spinlocks, but realistically it’s been around forever, and it’s not even clear that it can really ever trigger in practice. We’ll get it fixed, and mark it for stable, and tempting as it was, it wasn’t really a reason to delay 3.19. And the actual fixes that went in (see appended shortlog) were all fairly small, with the exception of some medium-sized infiniband changes that were all reverting code that just wasn’t ready. So it’s out there – go and get it. And as a result, the merge window for 3.20 is obviously also now open. Linus Linux 3.18 improved performance of the network stack, received BTRFS and EXT-4 file systems improvements, …

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Posted on - 5 Comments on Freescale Unveils QorIQ LS1043A Quad core ARM Cortex A53 Communication Processor for Fanless Networking Equipment

Freescale Unveils QorIQ LS1043A Quad core ARM Cortex A53 Communication Processor for Fanless Networking Equipment

Freescale has introduced the QorIQ LS1043A communications processor, powered by four 64-bit ARM Cortex A53 cores, and destined to be integrated into “intelligent-edge networking equipment including security appliances, SDN (Software Designed Networks) / NFV (Network Functions Virtualization) edge platforms and other fanless, power-efficient applications.” A dual core version named LS1023A is also available. Key features of LS1043A and LS1023A SoCs: CPU – Quad (LS1043A) or Dual (LS1023A) ARM Cortex-A53 64-bit cores @ 1 GHz to 1.5 GHz with 32/32 I/D Cache KB L1 and 1 MB L2 cache. 16,000+ CoreMarks. Networking & High Speed Interfaces: Up to six 1x GbE or 1x 10GbE and five x GbE Four lane SerDes up to 10 GHz multiplexed across controllers supporting: Three PCI Express Gen 2 interfaces SATA 3.0 Interface uQUICC Engine Accelerators and Memory Control DPAA (Data Path Acceleration Architecture) Parse, Classify and Distribution Engines Integrated security engine 32-bit DDR3L/4 controller Other peripherals 3x USB 3.0 interfaces with PHY QuadSPI Integrated Flash Controller (IFC) …

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Posted on - 4 Comments on Freescale LS1021A-IOT IoT Gateway Reference Design Powered by QorIQ LS1021A Dual ARM Cortex A7 SoC

Freescale LS1021A-IOT IoT Gateway Reference Design Powered by QorIQ LS1021A Dual ARM Cortex A7 SoC

Freescale has just launched a an IoT gateway reference design powered by their QorIQ LS1021A communication processors running Linux/OpenWRT, designed in partnership with TechNexion, and targeting various IoT applications such as building/home management, smart cities, networked industrial services, etc… Beside the dual core Cortex A7 QoirIQ processor, the board features six Gigabit Ethernet ports, two USB 3.0 ports, a SATA 3 port, two mini PCIe connector, an LVDS interface, HDMI output, Arduino UNO compatible headers, and various others expansions headers. LS1021A-IOT IoT gateway Specifications: SoC – Freescale QorIQ LS1021A dual core Cortex A7 communication processor @ 1 GHz (5,000 coremarks) MCU – Freescale Kinetis K20 Cortex M micro-controller System Memory – 1 GB DDR3L Storage – 1 Gb QSPI NOR Flash, SDHC slot (up to 32 GB) populated with a 4GB SD card, 1x mSATA 3 slot Connectivity – 6x Gigabit ports via SGMII (Serial Gigabit Media Independent Interface) and RGMII (Reduced Gigabit Media Independent Interface) interfaces Display I/F 24-bit …

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