Microchip PIC64 Category - CNX Software

January 20, 2025 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

Linux 6.13 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linus Torvalds has just announced the release of Linux 6.13 on the Linux Kernel Mailing List: So nothing horrible or unexpected happened last week, so I’ve tagged and pushed out the final 6.13 release. It’s mostly some final driver fixes (gpu and networking dominating – normal), with some doc updates too. And various little stuff all over. The shortlog is appended for people who want to see the details (and, as always, it’s just the shortlog for the last week, the full 6.13 log is obviously much too big). With this, the merge window for 6.14 will obviously open tomorrow. I already have two dozen pull requests pending – thank you, you know who you are. Linus Release about two months ago, Linux 6.12 – the new LTS version – brought us real-time “PREEMPT_RT” support that had always required out-of-tree patchsets until now, the completion of the EEVDF (Earliest Eligible […]

October 28, 2024October 28, 2024 by Sayantan Nandy - No Comments

Microchip PIC64HX1000 64-bit RISC-V AI MPU delivers post-quantum security for aerospace, defense, and automotive applications

Microchip recently unveiled the PIC64HX1000 64-bit RISC-V AI microprocessor (MPU) family designed for mission-critical intelligent edge applications in the aerospace, defense, industrial, and medical sectors thanks to a quantum-resistant design. These new MPUs feature eight SiFive’s Intelligence X280 cores, each clocked at 1 GHz. The MPUs are engineered with a decoupled vector pipeline enabling 512-bit operations enabling the PIC64HX1000 to achieve up to 2 TOPS for AI/ML processing and come equipped with integrated Time-Sensitive Networking (TSN) Ethernet connectivity. This new microprocessor includes a dedicated system controller for runtime monitoring and fault management, WorldGuard architecture for workload isolation, and post-quantum defense-grade cryptography, which includes the NIST-standardized FIPS 203 and FIPS 204 cryptographic algorithms, ensuring protection against future quantum computing threats. PIC64HX1000 64-bit AI MPU specification MPU variants PIC64HX1000 – IN (Industrial) PIC64HX1000 – AV (Aviation) PIC64HX1000 – MI (Military) CPU – 8x 64-bit RISC-V cores (SiFive X280), up to 1 GHz, […]

July 10, 2024July 10, 2024 by Jean-Luc Aufranc (CNXSoft) - 11 Comments

Microchip PIC64GX is a quad-core 64-bit RISC-V microprocessor for real-time processing

Microchip has introduced its first 64-bit RISC-V microprocessor family with the PIC64GX pin-to-pin compatible with the company’s PolarFire SoC FPGA devices and designed for edge designs for the industrial, automotive, communications, IoT, aerospace, and defense segments. The PIC6GX MPU supports asymmetric multiprocessing (AMP) to run Linux, real-time operating systems, and bare metal in a single processor cluster with secure boot capabilities. The company further claims the PIC64GX MPU is “the first RISC-V multi-core solution that is AMP capable for mixed-criticality systems”. The first member of the PIC64GX RISC-V family is the PIC64GX1000 microprocessor. Microchip PIC64GX1000 specifications: CPU Quad-core SiFive U54 64-bit five-stage, single-issue, in-order pipeline RISC-V (RV64GC) processor at up to 625 MHz with AMP and deterministic latencies, PMP and MMU units Single-core SiFive E51 64-bit RISC-V (RV64IMAC) monitor processor core at up to 625 MHZ with PMP unit Cache L1 memory subsystem with Single-Error Correct, Double-Error Detect (SECDED) Flexible […]