NVIDIA Introduces Jetson Xavier Devkit and Isaac Robotics Software

NVIDIA Jetson Xavier

NVIDIA Xavier was first unveiled in September 2016 as an artificial intelligence SoC with eight NVIDIA Custom 64-bit Arm cores, a 512-core Volta GPU,  8K video encoding and decoding, and a computer vision accelerator (CVA) now called NVDLA (NVIDIA Deep Learning Accelerator). Earlier this year, the company announced Xavier was sampling,  and DRIVE IX & DRIVE AR SDKs for the automotive market. On the eve of Computer 2018, NVIDIA has introduced Jetson Xavier development kit, as well as Isaac robotics software for autonomous machines. Jetson Xavier key specifications: SoC – NVIDIA Xavier with 8-core ARMv8.2 64-bit CPU, 8MB L2 + 4MB L3 512-core Volta GPU with Tensor Cores 2x NVDLA engines for deep learning 7-way VLIW Processor for vision acceleration VPU with dual 4Kp60 video decoding and encoding System Memory – 16GB 256-bit LPDDR4x | 137 GB/s Storage – 32GB eMMC 5.1 flash Display – 3x eDP/DP/HDMI at 4Kp60 | HDMI 2.0, DP HBR3 Camera 16x CSI-2 Lanes (40 Gbps …

Nvidia Unveils Xavier Automotive & AI Octa-core SoC with 512-Core Volta GPU, 8K Video Decode & Encode

Nvidia has introduced the successor to their Parker SoC mostly targeting self-driving cars and artificial intelligence applications, with Xavier SoC featuring 8 custom ARMv8 cores, a 512-core Volta GPU, a VPU (Video Processing Unit) supporting 8K video decode and encode and HDR (High Dynamic Range), as well as a computer vision accelerator (CVA). The processor will deliver 20 TOPS (trillion operations per second) of performance, while consuming only 20 watts of power, and since it’s designed specifically for autonomous cars, it will comply with automotive safety standards such as ISO 26262 functional safety specification. Anandtech published a comparison table with Tegra X1 (Erista), Parker, and Xavier using currently available information. Xavier Parker Erista (Tegra X1) CPU 8x NVIDIA Custom ARM 2x NVIDIA Denver + 4x ARM Cortex-A57 4x ARM Cortex-A57 + 4x ARM Cortex-A53 GPU Volta, 512 CUDA Cores Pascal, 256 CUDA Cores Maxwell, 256 CUDA Cores Memory ? LPDDR4, 128-bit Bus LPDDR3, 64-bit Bus Video Processing 7680×4320 Encode & …

$69 PhoenixA20 Pico-ITX Board Features Allwinner A20 SoC

Anichips Technology, a Shenzhen based electronics design company, has just announced PhoenixA20, a pico-ITX board features AllWinner A20 dual core Cortex A20 SoC with 1GB, 4GB Flash, HDMI and VGA output, Ethernet, and built-in Wi-fi and Bluetooth. PhoenixA20 specifications: SoC- AllWinner A20 dual ARM Cortex-A7 processor @ 1.2 GHz with ARM Mali-400MP2 GPU System Memory – 1GB DDR3 Storage – 4GB NAND Flash, micro SD card slot (up to 32GB), and SATA Video output – HDMI and VGA connectors. LVDS, RGB and CVBS signals are accessible via the expansion headers Connectivity – 10/100M Ethernet, Wi-Fi & Bluetooth 4.0 (via AP6210) USB – 2x USB 2.0 host ports Camera Interface – CSI Expansion headers – 3x UART, 2x I2C, 1×I2S, 1xCVBS, 4x TVIN, 2x Line IN,  1x SPDIF, 2x PWM, 2x LRADC, 2x FMIN, 1xHeadphone, 4xTVOUT, MIC, IR, TP The board supports Android 4.2.2, and Linux 3.3 with source code for Linux, Android, and U-boot available from the company’s github account. …

Nvidia Updates its Tegra Roadmap with Parker 64-Bit ARM SoC, Unveils Kayla CUDA Development Platform

Nvidia has given an update about the roadmap for its Tegra processor at the GPU Technology Conference in San Jose, California. Tegra 4 will still be followed by Logan (Tegra 5) as planned with a Kepler GPU and support for CUDA and OpenGL 4.3, but “Stark” has been replaced by “Parker” (Tegra 6) which will be the first 64-Bit Tegra processor based on Denver CPU, Maxwell GPU and make use of Finfet transistors. Logan will be available in 2014, and Parker should be available in 2015 with 100 times more performance than Tegra 2. With this kind of performance, the separation line between desktop and mobile processors will be gone. Nvidia also unveiled Kayla (“Logan’s girlfriend”), a development platform for CUDA and OpenGL based on Tegra 3 quad-core ARM processor and a Kepler GPU connected via a PCI express slot. Jen-Hsun Huang (above) showcased Kayla performance by running real-time ray tracing at GTC using CUDA 5, OpenGL, and PhysX processing …