mips

Posted on by Jean-Luc Aufranc (CNXSoft) - 4 Comments on Ingenic JZ4780 SoC Features a Dual Core MIPS CPU and PowerVR SGX540 GPU

Ingenic JZ4780 SoC Features a Dual Core MIPS CPU and PowerVR SGX540 GPU

MIPS and Ingenic Semiconductor have just introduced the JZ4780, a low cost dual core MIPS XBurst processor with a PowerVR SGX540 GPU. The companies will demonstrate their solution in a 10″ Android 4.1 Jelly Bean reference tablet during CES 2013, on January 8 – 12, 2013. JZ4780 SoC Highlights: SoC – Dual XBurst core up to 1.5GHz CPU + PowerVR SGX540 GPU supporting 2D Graphics, 3D Graphic, OpenGL ES2.0 and ES1.0, OpenVG1.1 VPU – 1080P Decoder,1080p encoder Memory Interfaces – 8-bit SLC/MLC/TLC NAND Flash, 64 bit ECC |16/32-bit DDR3/DDR2/DDR/Mobile DDR SDRAM Peripherals – AC97/I2S/SPDIF, Audio Codec, LCD-IF, LVDS, HDMI, Camera-IF, Touch ADC,PCM, I2C, SPI,UART, SD/MMC/SDIO, USB Host, USB OTG 2.0, TS-IF, GPIO, OTP Power Consumption – Ingenic’s MIPS-Based XBurst processor is said to consumes approximately 140mW per GHz under full load. Package – BGA390 17 x 17 x 1.1 mm, 0.8mm pitch Process – 40nm CMOS Ingenic will also demonstrate […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on MIPS Releases Android 4.1.1 (Jelly Bean) Source Code

MIPS Releases Android 4.1.1 (Jelly Bean) Source Code

At the end of last month, MIPS announced the $125 Karbonn Mobiles Android Jelly Bean Tablet powered by Ingzenic MIPS-Based JZ4770 SoC.  Today, they released Android 4.1.1 source code for MIPS Before downloading the Android source code, make sure you have a properly setup Linux workstation. Here are the instructions to checkout MIPS Android 4.1.1:

You can read the release notes for more details about the current status of the MIPS Android Jelly Bean port. Myriad Dalvik turbo, an alternative Dalvik implement that is much faster than the default Dalvik engine (at least on MIPS), is not yet available for Android 4.1, but should be soon. All MIPS Android source code can also be viewed online at http://www.github.com/mips. Jean-Luc Aufranc (CNXSoft)Jean-Luc started CNX Software in 2010 as a part-time endeavor, before quitting his job as a software engineering manager, and starting to write daily news, and reviews full time […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 24 Comments on TP-Link WR703N – $23 Hackable openWRT Wi-Fi 802.11N Router

TP-Link WR703N – $23 Hackable openWRT Wi-Fi 802.11N Router

TP-Link WR703N is a tiny 802.11N 150 Mbps Wi-Fi router smaller than a credit card (5.7 x 5.7 cm) and 1.8 cm thick based on Atheros AR7240 processor with 4 MB flash and 32 MB RAM. It costs just above $20 US and can be hacked with openWRT. It features one USB host connector that allows you to connect USB devices (USB flash drive, printer…) to it. TL-WR703N Specifications: Atheros AR7240 CPU @ 400Mhz (MIPS24k core) Atheros AR9331 Chipset (integrated wireless) 10/100 Mbit Ethernet port 802.11 b/g/n 150Mbps 3G support via external USB dongle 4 MB flash memory 32 MB RAM USB 2.0 port micro-USB port for power Dimension – 5.7 x 5.7 x 1.8 cm All you need is a USB to TLL board to access the serial console, open the box to access the serial pins (TP_IN and TP_OUT) and follow the instructions on openWRT website to convert […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on ELLCC Multi-Target Cross Compiler Based on Clang and LLVM Compiler Infrastructure

ELLCC Multi-Target Cross Compiler Based on Clang and LLVM Compiler Infrastructure

ELLCC is a project aiming at creating a multi-target cross compilation environment for embedded systems. which makes use of Clang and the LLVM compiler infrastructure. QEMU is used for cross-platform testing. The project goals are to implement the following key features: A functional C/C++ compiler based on Clang (ecc) Multi-target support: ARM, i386, Microblaze, Mips, Nios2, PowerPC, PowerPC64, Sparc and X86_64 Multi-OS support: Linux, Standalone, … A complete test environment that allows automatic unit and integration testing of the run-time environment and complete executables. Support of a wide variety of target processors from armv4 to armv7, several mips cores, i386, and more. The project is still being developed, and ELLCC is in a pre-release state. ELLCC is composed of the following components: ecc – The ELLCC C/C++ compiler,  a single executable with gcc compatible options. binutils – The GNU binutils package. libecc – The C standard library based on the musl standard […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Ramos Miumiu W1 Android 4.0 Tablet Based on Actions ATM7019 MIPS SoC

Ramos Miumiu W1 Android 4.0 Tablet Based on Actions ATM7019 MIPS SoC

Ramos Miumiu W1 is a tablet running Android 4.0 (ICS) and powered by Actions Semiconductor’s ATM7019 SoC that integrate a MIPS32 74Kf core running at 1 GHz. Actions Semiconductor is a Chinese fabless semiconductor company headquartered in Zhuhai (like AllWinner). Here are the specs of the devices: SoC – Actions Semiconductor ATM7019 MIPS32 74Kf Core @ 1GHz System Memory – 512 MB DDR3 RAM Storage – 4GB or 8GB Flash depending on model + microSD slot Display – 7″ WSVGA (1024×600) capacitive touch screen. Connectivity – Wifi 802.11b/g/n USB – micro USB 2.0 Video Output – HDMI The processor can support 1080p HD video playback and the tablet can record 640×480 video via the front camera. Actions Semiconductor does not provide information about ATM7019 SoC on their website, but I found a 2011 presentation hosted on MIPS website that explains some details about MIPS32 74Kf based processors by Actions SemiConductor […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 12 Comments on iPPea TV Android 4.0.3 HDMI Stick Based on Ingenic JZ4770 (MIPS) Sells for 50 USD

iPPea TV Android 4.0.3 HDMI Stick Based on Ingenic JZ4770 (MIPS) Sells for 50 USD

iPPea Inc announced iPPea TV, an Android 4.0 dongle based on Ingenic JZ4770 MIPS SoC that “brings the ‘smart’ Android experience to any HDMI-enabled DTV for $50 US”. This is the first MIPS based Android mini PC that I’ve seem among all the ARM based floating around. Here are iPPea TV specifications: Ingenic JZ4770 applications processor (MIPS-Based XBurst CPU)  @ 1.2 GHz. 2GB storage with support for up to 32 GB external storage via a microSD slot. 512 MB of DDR2 RAM HDMI ouput (up to 1080p) 802.11b/g/n Wifi USB 2.0 port and micro USB 2.0 OTG port Video format – AVI,MKV(XVID/px/H.264),MOV,TS,M2TS, RM/RMVB,FLV,3GP,MPEG,DAT,MP4 Audio format – AAC, AAC+, eAAC+, AMR-NB, AMR-WB, QCP, MP3, WMA, WAV, MIDI, M4A Picture format –  GIF, BMP, JPEG, PNG Ebook format: PDF,EPUB,HTML,TXT Dimensions – PCB: 80 mm x 20mm x 6.5 mm | mini PC: As small as 95.5 mm x 31.5 mm x 12 […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on $3.45 Microchip PIC32 Development Platform Microstick II

$3.45 Microchip PIC32 Development Platform Microstick II

MIPS and Microchip organize a promotion on a MIPS PIC32 MCU development Kit. The Microstick II delivers a development hardware platform for Microchips MIPS-based 32-bit microcontrollers. It’s USB-powered and includes an on-board debugger/programmer, a DUT socket for easy device swapping, a user LED and reset button. Key features: Integrated USB programmer / debugger – No external debugger required USB Powered – Ease of use, No external power required MPLAB support. DUT Socket – Flexible, Easy device replacement 0.025” Pin headers – Enables plug-in to Breadboard with room for jumper wires Easy access to all device signals for probing Small size – Smaller than a stick of gum at 20 x76mm – Easily Portable On board User LED and Reset Switch Free demo code Microstick II supports all 3.3V PIC24FJ, PIC24H, dsPIC33, and PIC32 SPDIP packaged devices which are included in the kit. Microkit II normally costs 34.95 USD, but is […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on MIPS Introduces microAptiv, interAptiv and proAptiv Cores

MIPS Introduces microAptiv, interAptiv and proAptiv Cores

MIPS Technologies has introduced their new Aptiv generation of microprocessor cores divided into 3 families: proAptiv, interAptiv and microAptiv. proAptiv Core (equivalent to ARM Cortex A15 DMIPS/Mhz) The proAptiv core achieves a 4.4 CoreMark/MHz score which according to MIPS is the best score reported for any licensable IP core. It also achieves 3.5 DMIPS/MHz which is abnout the same performance as ARM Cortex A15.  This core targeted at high performance applications such as smartphones, tablets, HD STB, automotive infotainment and residential gateways. proAptiv is recommended as an upgrade to MIPS32 74K/1074K cores. interAptiv Core (equivalent to ARM Cortex-R5 DMIPS/Mhz) The multi-threaded interAptiv core delivers higher CoreMark/MHz (3.2) than competing cores in similar die area and 1.7 DMIPS/MHz per core. The interAptiv is aimed at mid-range applications such as mainstream STB, digital cameras, mid-range smartphone, broadband CPE (Consumer Premise Equipment) and SATA/SSD controllers. microAptiv Core (equivalent to ARM Cortex-M3/M4 DMIPS/Mhz) The […]

UP 7000 x86 SBC