UCIe (Universal Chiplet Interconnect Express) open standard for Chiplets with heterogeneous chips

UCIe Open Chiplet platform-on-a-package

We first heard about Chiplet, chips that gather IP or chips from different vendors into a single chip, in 2020 with the now-defunct zGlue’s Open Chiplet Initiative, but the term recently came back to the forefront last month with Intel’s investment into the “Open Chiplet Platform” that aims to offer a modular approach to chip design through chiplets with each block/chiplet customized for a particular function. It turns out there’s now an official standard called the Universal Chiplet Interconnect Express (UCIe) whose specification defines the interconnect between chiplets within a package, and not only backed by Intel, but also AMD, Arm, ASE, Google Cloud, Meta, Microsoft, Qualcomm, Samsung, and TSMC. UCIe defines the Physical Layer (Die-to-Die I/O) and protocols to be used for the chiplet interfaces, currently PCIe and CXL (Compute Express Link), but more protocols will be added to the specification in the future. The goal is to provide […]

MIPI CSI-2 v4.0 adds features for always-on, low power machine vision applications

MIPI CSI-2 AOSC

While MIPI CSI-2 standard was first introduced in 2005 as a high-speed protocol for the transmission of still and video images from image sensors to application processors, the standard has evolved over the years, and the latest MIPI CSI-2 v4.0 introduces features to better support always-on, low power machine vision applications, high-resolution sensors, and high-dynamic-range automotive image sensors. The main changes for v4.0 include support for a two-wire interface (MIPI I3C) to lower cost and complexity, multi-pixel compression for the latest generation of advanced image sensors, and RAW28 color depth for better image quality and an improved signal-to-noise (SNR) ratio. MIPI CSI-2 v4.0 highlights: Always-On Sentinel Conduit (AOSC) – Enables always-on machine vision systems with ultra-low-power image sensors and video signal processors (VSPs) continuously monitoring their surrounding environments and having the ability to wake up their more powerful host CPUs when specific events happen. Some use cases include laptop/tablet-based face […]

WiFi 7 (802.11be) will support up to 40 Gbps links, real-time applications

Key features of WiFi 7 (802.11be)

I still don’t own a WiFi 6 router, but MediaTek has already started to demonstrate WiFi 7 (802.11be) to customers with solutions based on upcoming Filogic 802.11be processors which deliver “super-fast speeds and low latency transmission” and provide a “true wireline/Ethernet replacement for super high-bandwidth applications”. The company goes on to explain that Wi-Fi 7 relies on the same 2.4GHz, 5GHz, and 6GHz frequencies as WiFi 6/6E, but can still provide 2.4x higher speeds than Wi-Fi 6, even with the same number of antennas, since WiFi 7 can utilize 320Mhz channels and support 4K QAM (quadrature amplitude modulation) technology.   There’s limited information about MediaTek Filogic 802.11be WiFi 7 processors since it will take a few more years before becoming available, but we can find more details in a document entitled “Current Status and Directions of IEEE 802.11be, the Future Wi-Fi 7” from IEEE Xplore. Here are some of the […]

PCIe 6.0 delivers up to 256 GB/s for Big Data applications

PCIe 6.0 256 GB/s

The PCI-SIG has just released the PCIe 6.0 specification reaching 64 GT/s transfer speeds, or 256GB/s, doubling the PCIe 5.0 specification data rate, and aimed at Big Data applications in the data center, artificial intelligence/machine learning, HPC, automotive, IoT, and military/aerospace sectors. PCIe 6.0 follows PCIe 5.0 announced in 2019 and can achieve the 256GB/s data rate in a 16-lane configuration. Implementation will take time, as even PCIe 5.0 is not widely used yet, and in the embedded space, I only found PCIe 5.0 in the recently announced Alder Lake-S Desktop IoT processors, with the Alder Lake Mobile IoT processors still being limited to PCIe 4.0. PCIe 6.0 highlights: 64 GT/s raw data rate and up to 256 GB/s via x16 configuration Pulse Amplitude Modulation with 4 levels (PAM4) signaling, leveraging existing PAM4 already available in the industry Lightweight Forward Error Correct (FEC) and Cyclic Redundancy Check (CRC) mitigate the […]

Wi-Fi 6 Release 2 adds support for uplink multi-user MIMO, improves power management

WiFi 6 Release 2

The Wi-Fi Alliance has just announced Wi-Fi 6 CERTIFIED Release 2 with new features that support increasing device and traffic density, and improve power management with Wi-Fi devices and applications. There are two main changes to the standard: Support for uplink multi-user multiple input, multiple output (multi-user MIMO) which will help with video conferencing, faster uploads, more reliable gaming, and IoT use cases. Power management features that will mostly provide benefit smart home, smart city, and Industrial IoT (IIoT) environments Broadcast target wake time (TWT) Extended sleep time Dynamic multi-user spatial multiplexing power save (SMPS) That means there are now three Wi-Fi 6 standards with the original WiFi 6, WiFi 6E, and the new WiFi 6 Release 2. The good news is that the new Release appears to be backward compatible with both WiFI 6 and WiFi 6E and several companies provided quotes for the press release saying how grateful […]

PICMG IoT.1 firmware specification targets IoT sensors and effecters

PICMG IoT.1 firmware specifcation

The PICMG consortium is better known for COM Express and COM HPC standards for x86 industrial computers-on-module, but last year they started catering to the IIoT sector with the introduction of the microSAM System-on-Module (micro Sensor Adapter Modules) standard for microcontrollers and IIoT sensors. The consortium has now ratified the IoT.1 firmware specification defining a communication standard between sensors/effecters and local IoT controllers such as microSAM specified by PICMGs IoT.0 specification. The PICMG IoT.1 standard, developed in collaboration with the Distributed Management Task Force (DMTF), defines a vendor-agnostic firmware interface and low-level data model that builds upon the Platform Level Data Model (PLDM) low-level messaging system, and adds features specific to industrial automation and control use cases. If like me, you’ve never heard about PLDM, PICMG explains: The PLDM is a low-level messaging system that supports topologies, eventing and discovery and runs over a variety of system level buses such […]

Bluetooth 5.3 new features lower latency, interference, improve battery life, security

Bluetooth 5.3 Channel Classification Enhancement

Bluetooth 5.3 Core Specification was adopted on July 13, 2021, without fanfare, and the only related announcement that I could find is CEVA RivieraWaves Bluetooth IP getting support for Bluetooth 5.3. Bluetooth 5.3 brings four new features or enhancements and removes one extension from the core specification: Periodic Advertising Enhancement – The AdvDataInfo (ADI) field of the common extended advertising payload format may now be included in AUX_SYNC_IND protocol data units (PDUs) which are broadcast when a device is performing periodic advertising. The Bluetooth Low Energy (LE) controllers may now use the information in the ADI field to recognize packets that contain retransmitted copies of identical or semantically equivalent data, and discard those packets in order to prevent unnecessary processing on the nodes, and make sure the overall throughput is not affected due to retransmitted packets. Encryption Key Size Control Enhancement – In Bluetooth BR/EDR, encryption key sizes are negotiated […]

The RISC-V Platform Specification aims to ensure RISC-V hardware and software compatibility

RISC-V platform specification

The RISC-V platform specification aims to define a set of rules to make sure operating systems like Linux or the Zephyr Project can boot properly on all RISC-V hardware compliant with the specs. If you’ve ever worked with the Arm Linux kernel over ten years ago, you may remember board files, which were replaced by device tree bindings, and eventually, Arm defined several standards culminating with Arm SystemReady certifications allowing compliant Arm platforms to boot off-the-shelf OS images like in the x86 world. While we are probably a long way from a “RISC-V SystemReady” platform certification program, the RISC-V platform specification is currently being worked on to define requirements for two types of platforms with optional extensions: OS-A Platform: This specifies a rich-OS platform for Linux/FreeBSD/Windows…​flavors that run on enterprise and embedded class application processors. Current extension: Server Extension M Platform – This specifies an RTOS platform for bare-metal applications […]

EDATEC Raspberry Pi 5 fanless case