Linaro Connect San Diego 2019 Schedule – IoT, AI, Optimizations, Compilers and More

Linaro Connect San Diego 2019

Linaro has recently released the full schedule of Linaro Connect San Diego 2019 that will take place on  September 23-27. Even if you can’t attend, it’s always interested to check out the schedule to find out what interesting work is done on Arm Linux, Zephyr OS, and so on. So I’ve created my own virtual schedule with some of the most relevant and interesting sessions of the five-day event. Monday, September 23 14:00 – 14:25 – SAN19-101 Thermal Governors: How to pick the right one by Keerthy Jagadeesh, Software Engineer, Texas Instruments With higher Gigahertz and multiple cores packed in a SoC the need for thermal management for Arm based SoCs gets more and more critical. Thermal governors that define the policy for thermal management play a pivotal role in ensuring thermal safety of the device. Choosing the right one ensures the device performs optimally with in the thermal budget. In this presentation Keerthy Jagadeesh, co-maintainer of TI BANDGAP AND …

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Samsung Galaxy Book S Snapdragon 8cx Laptop to Launch soon for $1,000

Snapdragon 8cx laptop

Qualcomm Snapdragon 8cx was announced as the first Snapdragon processor specifically designed for connected mobile PCs (aka laptops with cellular connectivity) last December. Earlier this year we got confirmation 8cx would support 5G connectivity as an option, and in May, we got news Lenovo Limitless 5G laptop was coming and got some benchmarks showing Snapdragon 8cx with performance similar to an Intel Core i5 Kaby Lake-R processor (15 Watt TDP) while offering much longer battery life. It’s Samsung turn to announce their Snapdragon 8cx laptop with Samsung Galaxy Book S that will be available this fall for $999 and up. Samsung Galaxy Book S specifications: SoC – Qualcomm Snapdragon 8cx Compute Platform with eight 64-bit Armv8 cores in two clusters: Kryo 495 Gold cores (Cortex-A76 class) @ 2.84 GHz + Kryo 495  cores (Cortex-A55 class) @ 1.8GHz ; 7nm process; 7W TDP System Memory – 8GB RAM (LPDDR4X) Storage – 256/512GB storage (NVMe?) + MicroSD slot up to 1TB Display …

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Arm Releases Pelion Connectivity Management 2.0 Platform with Greater Automation

Arm has announced its latest version of Pelion IoT Platform, a no-upgrade needed platform Pelion Connectivity Management 2.0 a SaaS with an automation engine.  Previously, we reported on the Sigma Delta Technologies modular devkit that was designed to work with the cloud-based Arm Pelion 1.0 device management service through the Mbed OS, focused on IoT development. The Pelion Connectivity Management 2.0 adds a level of automation that the Pelion 1.0 didn’t have, but that the company felt the customer base in the IoT industry wanted. The new features expand on the Pelion platform, through the Mbed OS, which helped the platform expand through cloud-based management services. The loudest voices in the ever-expanding and transforming IoT industry have said that automation is the key to removing barriers that allow IoT to scale. Pelion 1.0 already offered a single, cloud-based connectivity solution for managing IoT devices. Pelion 2.0 allows IoT devices to be automatically configured, dramatically increasing scale over what can become …

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Arm Cortex-A34 is a 64-bit Only Low-Power Core

Arm Cortex-A34

Arm previously announced Cortex-A35 64-bit & 32-bit lower-power CPU core, and later on Cortex-A32 32-bit only Armv8 CPU core with the usual press release, and blog posts providing details about their new offering. But this morning, I saw a tweet about Cortex-A34… Cortex-A34 is an ARM 64-bit only CPU too, and searching about it on Twitter yields zero mentions. Wow. — Longhorn (@never_released) August 2, 2019 Based on the twitter handle, I first assumed it was “never released” ;), and was just an internal part name at Arm. But the new Cortex-A34 was actually very discreetly outed last month when Arm announced Flexible Access to lower the barrier of entry by allowing IC designers to access all Arm IP in the program, and only pay for IP blocks they actually use in the final product. Nevertheless, the product page and developer documentation are now up – albeit with limited info for the latter -, so we have more details. Some …

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Intel Agilex SoC FPGA Features Four Arm Cortex-A53 Cores

Intel Agilex SoC FPGA

Intel announced their new Agilex FPGA family manufactured with a  10nm process earlier this April, but it only caught my eyes recently when I saw “Agilex SoC FPGA” listed in Linux 5.2 Arm’s changelog. The Intel SoC FPGA is there simply because it comes with four Arm Cortex-A53 cores. Three family have been announced so far, although the later is shown as coming soon: Intel Agilex F-Series FPGAs and SoCs – Transceiver support up to 58 Gbps, increased DSP capabilities, high system integration, and 2nd Gen Intel Hyperflex architecture for a wide range of applications in Data Center, Networking, and Edge. Option to integrate the quad-core Arm Cortex-A53 processor. Intel Agilex I-Series SoC FPGAs – Optimized for high performance processor interface and bandwidth intensive applications. Coherent attach to Intel Xeon processors with Compute Express Link, hardened PCIe Gen 5 support and transceiver support up to 112 Gbps. Intel Agilex M-Series SoC FPGAs – Optimized for compute and memory intensive applications. …

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MYIR Announces Xilinx Zynq UltraScale+ MPSoC SoM and Development Board

MYD-CZU3EG development board

MYIR Technology has been selling Xilinx Zynq-7000 FPGA + Arm systems-on-module since 2016, but the Chinese company has now announced new modules based on the more powerful Xilinx Zynq Ultrascale+ MPSoC with Arm Cortex-A53 cores, Arm Cortex-R5 cores, and Ultrascale FPGA fabric, as well as a corresponding development board. MYC-CZU3EG Zynq UltraScale+ MPSoC CPU Module CPU module specifications: Mechanical Parameters MPSoC – Xilinx Zynq UltraScale+ XCZU3EG-1SFVC784E (ZU3EG, 784 Pin Package) MPSoC with quad-core Arm Cortex-A53 processor @ 1.2 GHz, dual-core Cortex-R5 processor @ 600 MHz, Arm Mali-400MP2 GPU, and 16nm FinFET+ FPGA fabric (154K logic cells, 7.6 Mb memory, 728 DSP slices) System Memory – 4GB DDR4 @ 2,400MHz Storage – 4GB eMMC Flash, 128MB QSPI Flash On-module chips Gigabit Ethernet PHY USB PHY Intel Power Module Clock Generator 2x Samtec 0.5mm pitch 160-pin high-speed headers bringing out Networking – Gigabit Ethernet USB – USB 2.0 interface 4x PS GTR transceivers along with 2 GTR reference clock inputs 4x PL GTH …

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Arm Techcon 2019 Schedule – Machine Learning, Security, Containers, and More

Arm Techcon 2019

Arm TechCon will take place on October 8-10, 2019 at San Jose Convention Center to showcase new solutions from Arm and third-parties, and the company has now published the agenda/schedule for the event. There are many sessions and even if you’re not going to happen it’s always useful to checkout what will be discussed to learn more about what’s going on currently and what will be the focus in the near future for Arm development. Several sessions normally occur at the same time, so as usual I’ll make my own virtual schedule with the ones I find most relevant. Tuesday, October 8  09:00 – 09:50 – Open Source ML is rapidly advancing. How can you benefit? by Markus Levy, Director of AI and Machine Learning Technologies, NXP Over the last two years and still continuing, machine learning applications have benefited tremendously from the growing number of open source frameworks, tools, and libraries to support edge inferencing. These include CMSIS-NN, ARM …

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Linux 5.2 Release – Main Changes, Arm, MIPS & RISC-V Architectures

Linux 5.2 Changelog

Linus Torvalds announced the release of Linux 5.2 last Sunday: So I was somewhat pre-disposed towards making an rc8, simply because of my travels and being entirely off the internet for a few days last week, and with spotty internet for a few days before that [*]. But there really doesn’t seem to be any reason for another rc, since it’s been very quiet. Yes, I had a few pull requests since rc7, but they were all small, and I had many more that are for the upcoming merge window. Part of it may be due to the July 4th week, of course, but whatever – I’ll take the quiet week as a good sign. So despite a fairly late core revert, I don’t see any real reason for another week of rc, and so we have a v5.2 with the normal release timing. There’s no particular area that stands out there – the changes are sosmall that the appended …

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