Infineon launches PSoC Edge Cortex-M55/M33 microcontrollers for enhanced AI and ML applications

The PSoC Edge microcontrollers integrate the Arm Cortex-M55 core with Helium DSP and the Ethos U55 NPU unit for advanced AI tasks. It also includes a power-efficient Arm Cortex-M33 core paired with an NNLite(DSP/NPU) for simpler AI tasks.

Infineon’s new PSoC Edge series of microcontrollers integrates the Arm Cortex-M55 core with Helium DSP and the Ethos U55 NPU unit for advanced AI tasks. It also includes a power-efficient Arm Cortex-M33 core paired with an NNLite(DSP/NPU) for simpler AI tasks. This setup allows the device to be more efficient in varying load conditions. Infineon’s PSoC lineup is a configurable microcontroller powered by Arm Cortex-M4, Cortex-M3, or Cortex-M0+ cores. The main USP (Unique Selling Point) of this lineup is its configurable digital and analog components. This feature makes them somewhat similar to an FPGA, but an FPGA is far more difficult to program than these microcontrollers and they are also very power-hungry. The device is equipped with advanced HMI and “Always-on” capability. “Always-on” is a feature of this device to constantly monitors and responds to signals automatically, making it suitable for smart homes, security, wearables, robotics, and many more. Key […]

AMD Kria K24 Zynq Ultrascale+ system-on-module targets motor control and DSP applications

AMD Kria 24

The AMD Kria K24 System-on-Module (SOM) with a custom-built Zynq UltraScale+ MPSoC and the KD240 Drives Starter Kit are designed for the development of cost-sensitive industrial and commercial edge applications. The new Kria K24 is about half the size of a credit card and uses half the power of the larger, but connector-compatible, Kria K26 SOM that was introduced in 2021 for computer vision applications when the company was still known as Xilinx. That means existing K26 carrier boards can be reused with the Kria K24 SOM without modifying the PCB, but note there’s only one 240-pin connector on the new module, plus an extra 40-pin connector. AMD Kria K24 specifications: MPSoC – Custom-built Zynq Ultrascale+ XCK24 Quad-core Arm Cortex-A53 processor  up to 1.3 GHz Dual-core Arm Cortex-R5F real-time processor up to 533 MHz Mali-400 MP2 GPU up to 600 MHz FPGA fabric with 154K logic cells AMD Deep Learning […]

Cadence Neo NPU IP scales from 8 GOPS to 80 TOPS

Cadence Neo NPU

Cadence Neo NPU (Neural Processing Unit) IP delivers 8 GOPS to 80 TOPS in single core configuration and can be scaled to multicore configuration for hundreds of TOPS. The company says the Neo NPUs deliver high AI performance and energy efficiency for optimal PPA (Power, Performance, Area) and cost points for next-generation AI SoCs for intelligent sensors, IoT, audio/vision, hearables/wearables, mobile vision/voice AI, AR/VR and ADAS. Some highlights of the new Neo NPU IP include: Scalability – Single-core solution is scalable from 8 GOPS to 80 TOPS, with further extension to hundreds of TOPS with multicore Supports 256 to 32K MACs per cycle to allow SoC architects to meet power, performance, and area (PPA) tradeoffs Works with DSPs, general-purpose microcontrollers, and application processors Support for Int4, Int8, Int16, and FP16 data types for CNN, RNN and transformer-based networks. Up to 20x higher performance than the first-generation Cadence AI IP, with […]

Sony IMX500-based smart camera works with AITRIOS software

LUCID SENSAiZ SZP123S AITRIOS camera

Raspberry Pi recently received a strategic investment from Sony (Semiconductor Solutions Corporation) in order to provide a development platform for the company’s edge AI devices leveraging the AITRIOS platform. We don’t have many details about the upcoming Raspberry Pi / Sony device, so instead, I decided to look into the AITRIOS platform, and currently, there’s a single hardware platform, LUCID Vision Labs SENSAiZ SZP123S-001 smart camera based on Sony IMX500 intelligent vision sensor, designed to work with Sony AITRIOS software. LUCID SENSAiZ Smart camera SENSAiZ SZP123S-001 specifications: Imaging  sensor – 12.33MP Sony IMX500 progressive scan CMOS sensor with rolling shutter, built-in DSP and dedicated on-chip SRAM to enable high-speed edge AI processing. Focal Length  – 4.35 mm Camera Sensor Format – 1/2.3″ Pixels (H x V) – 4,056 x 3,040 Pixel Size, H x V – 1.55 x 1.55 μm Networking – 10/100M RJ45 port Power Supply – PoE+ via […]

conga-STDA4 SMARC 2.1 module features TI TDA4VM/DRA829J Jacinto 7 processor

conga-STDA4 SMARC Module TI Jacinto 7 TDA4VM DRA829J

congatec conga-STDA4 is a SMARC Computer-on-Module (CoM) based on Texas Instruments TDA4VM or DRA829J Jacinto 7 processor with two Cortex-A72 cores, six real-time Cortex-R5 cores for functional safety, accelerated vision and AI processing capabilities, and plenty of interfaces. The first Texas Instruments-powered CoM from the company is designed for industrial mobile machinery requiring near-field analytics, such as automated guided vehicles and autonomous mobile robots, construction and agricultural machinery, as well as any industrial or medical solutions requiring energy-efficient computer vision at the edge. conga-STDA4 specifications: SoC – Texas Instruments Jacinto 7 TDA4VM/DRA829J with Dual-core Arm Cortex-A72 up to 2.0 GHz 6x Arm Cortex-R5F cores @ 1.0 GHz up to 8 MB of on-chip L3 RAM 1x C7x DSP up to 80 GFLOPs 2x C66 DSPs up to 40 GFLOPs Up to 8 TOPS MMA AI accelerator PowerVR Rogue 8XE GE8430 3D GPU with support for OpenGL ES 3.1, OpenVX, OpenCL […]

Lattice Avant mid-range FPGA platform features up to 500K logic cells, 25 Gbps SERDES, Hard PCIe Gen4

Lattice Avant

Lattice Avant is a new low-power and small form factor mid-range FPGA platform, manufactured with a 16nm FinFET process, and equipped with 25 Gb/s SERDES, hardened PCI Express, external memory PHY interfaces, a high DSP count, and a security engine. Lattice Semi is better known for its entry-level FPGAs such as the iCE40 which is popular in the community thanks to low-cost hardware and support for open-source tools, but the Avant platform marks the company’s entry into the mid-range FPGA market, defined by chips with 100k to 500k logic cells (LCs). Lattice Avant highlights: FPGA fabric – 200K to 500K logic cells up to 350 MHz DSP – 700 to 1,8000 18×18 multipliers @ up to 650 MHz to support the latest AI algorithms Memory 14-36 Mbit embedded memory up to 650 MHz DDR3L/DDR4/LPDDR4 and DDR5 support I/Os 4x to 28x 25 Gbps multi-protocol SERDES Hard PCIe Gen4 200 to […]

Quadric devkit features q16 hybrid AI, DSP, computer vision accelerator

Quadric devkit Raspberry Pi CM4

The Quadric devkit is an M.2 Key M module equipped with the company’s q16 edge processor offering a hybrid data-flow + Von Neumann machine for not only neural networks, but also computer vision, digital signal processing, BLAS (Basic Linear Algebra Subprograms), and other workloads. This architecture allows the Quadric q16 to be more flexible than traditional AI accelerators and can deliver more effective solutions for heterogonous systems that may have multiple accelerators or require a powerful processor. The M.2 form factor enables easy integration into boards with an M.2 Key M socket such as the Gumstix Raspberry Pi 4 development board shown below with the Quadric devkit. Quadric devkit specifications: Accelerator – Quadric q16x4 Processor with 256 Vortex Cores, 8 MB on-chip memory, 4 kB per core memory, multi-precision multiply accumulate; 16 x 16mm package Memory – 4GB LPDDR4, 32-bit, dual-rank up to 3677 MHz Host Interface – 2-lane PCIe […]

STMicro Intelligent Sensor Processing Unit (ISPU) combines MEMS sensor with DSP for AI “in the edge”

ISPU flexibility, low-power, data transfer

STMicroelectronics’ Intelligent Sensor Processing Unit (ISPU) is a single chip that combines a MEMS sensor together with a Digital Signal Processor (DSP) designed to run AI algorithms to let the chip make electronic decisions “in the edge” without help from the cloud or a local gateway. The ISPU is said to offer a smaller size compared to system-in-package devices, cut power consumption by up to 80%, and according to STMicro, launch the new “Onlife era” following the “Offline era” of the 2000’s where sensors were controlled by MCUs without network connectivity and the “Online era” in the 2010’s when sensors became connected to the cloud or a local gateway. ISPU key features: Enhanced 32-bit RISC Harvard architecture Extensible at the chip design phase with dedicated instructions or HW components Frequency / ODR (Output Data Rate) max – 5 MHz / 3.33 kHz – 10 MHz / 6.66kHz Four-stage pipeline 16-bit […]

Memfault IoT and embedded debugging platform