open source News - Page 20 of 92 - CNX Software

June 3, 2022June 7, 2022 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

Nokia 1680 phone gets new PCB with MIPS SoC, runs mainline Linux

Reimu NotMoe has designed the “Notkia” PCB based on Ingenic X1000E MIPS processor with 64MB built-in RAM and following the exact same dimensions as the PCB found in Nokia 168x phones (1680, 1681, 1682), and allowing the phone to run mainline Linux. The board also comes with 32MB NOR flash, a 4GB SLC NAND flash, and supports LoRa, 2.4 GHz WiFi, Bluetooth, and GNSS connectivity, but no cellular modem. Combining Nokia 168x phone with Notkia PCBA creates a phone with the following specifications: SoC – Ingenic X1000E single-core XBurst MIPS processor @ 1.0 GHz (2200+ CoreMark) with 64MB RAM Storage – 32MB NOR flash + 4GB SLC NAND flash Display – 2.0-inch 240×320 IPS LCD, 3/4 visible (Replaces the original 128×160 TFT screen in the phone) Camera – 5MP camera with auto focus (only available in the Nokia 1680 case) Audio – Yamaha MA-3 (YMU762) music synthesizer and regular I2S […]

May 27, 2022 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

hm-panelizer – A KiCad companion GUI tool for panelizing PCBs

Gerard (aka halfmarble) has released hm-panelizer open-source software allowing for a panelization of PCBs via a simple GUI interface and doubling as a Gerber file viewer. He’s mostly tested it with PCBs designed in KiCad 6.x, but it should also work with design files from other tools. Note that hm-panelizer is just a side project, and Gerard released it as an open-source project in hopes that it might be useful to users and the community will contribute to it. The project relies on kivy cross-platform library, pygame and pycairo libraries, as well as pcb-tools and pcb-tools-extension projects. There are some requirements for the utility to work on with your PCB : Use the metric system The PCB Gerber files must use Altium/Protel filename extensions The board outline gerber file (.gm1) must be present “Disable aperture macros” when exporting Gerber files (this may not be needed for simple designs and only […]

May 23, 2022May 23, 2022 by Jean-Luc Aufranc (CNXSoft) - 7 Comments

CherryUSB – A lightweight USB device/host stack for embedded systems

CherryUSB USB stack for embedded systems

CherryUSB is a lightweight open-source USB device/host stack for embedded systems with one or more USB interfaces. The stack implements various class drivers such as CDC, HID, MSC, audio, video, and so on. It’s apparently part of Boufallo Lab SDK (e.g. for BL702 MCU), and has been ported and tested with WCH CH32V307 RISC-V MCU, STMicro STM32F4, and Nuvoton NUC442 Cortex-M4 microcontroller, as well as a two Arm Cortex-M3 microcontrollers I’ve never heard of: EastSoft ES32F3 and MindMotion MM32L3xx. CherryUSB device stack highlights: Support for USB2.0 full and high speed Endpoint irq callback USB classes support Composite Device Communication Device Class (CDC) Human Interface Device (HID) including “Custom HID” Mass Storage Class (MSC) USB VIDEO Class (UVC1.0,UVC1.5) USB AUDIO Class (UAC1.0, UAC2.0) Device Firmware Upgrade CLASS (DFU) MIDI CLASS (MIDI) Test and Measurement CLASS (TMC) Vendor class Remote NDIS (RNDIS) support Support WINUSB 1.0,WINUSB 2.0 with BOS (Binary Device Object […]

May 16, 2022May 16, 2022 by Jean-Luc Aufranc (CNXSoft) - 18 Comments

iCESugar-nano is a $19 iCE40LP1k FPGA board with 3x PMOD connectors

Muse Lab’s iCESugar-nano is a tiny FPGA board based on Lattice Semi iCE40LP1K-CM36 programmable via its USB-C port through on-board iCELink debugger, and exposing I/Os for three standard PMOD connectors. The board is fully supported by Yosys open-source toolchain ( Yosys+ nextpnr + IceStorm), and the onboard debugger supports drag-and-drop programming so that you can just drag the FPGA bitstream into the virtual disk to program it through a USB Type-C cable. iCESugar-nano specifications: FPGA – Lattice Semi iCE40LP1k FPGA with 1280 LUT/8KB SRAM/PLL Storage – 2MB SPI flash (W25Q16) USB – 1x USB Type-C port for power and programming Expansion – 14x usable IOs with 1x 12-pin PMOD connectors and 2x 6-pin PMOD connectors Debugging – On-board iCELink debugger based on Arm Mbed DAPLink Misc – Adjustable clock (8/12/36/72MHz), LED Power Supply – 5V via USB-C port Dimensions – 3.9 x 1.8 cm Documentation, schematic PDF, links to tools, […]

April 23, 2022 by Jean-Luc Aufranc (CNXSoft) - No Comments

Intel releases SDK for Cortex-M7 PSE found in Elkhart Lake processors

Elkhart Lake processors integrate the Intel Programmable Services Engine (Intel PSE) offload engine for IoT workloads powered by an Arm Cortex-M7 microcontroller that handles real-time IO control using GPIO, I2C, and/or UART interfaces, and supports functions such as remote, out-of-band device management, network proxy, embedded controller, and sensor hub. Until now the firmware was only provided as a closed-source binary, and Coreboot developers published an open letter to open the source code for the PSE firmware last December, and it’s been successful with Intel releasing the Intel PSE SDK based on Zephyr OS. The SDK combines open-source components (code samples, services, etc…) released under a permissive Apache 2.0 license (“License A”), and closed-source libraries and tools released under an Intel license (“License B”) allowing the redistribution and use in binary form, without modification. You’ll find everything on Github including documentation explaining how to get started with the Zephyr SDK, the […]

April 20, 2022April 26, 2022 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

NVIDIA NVDLA AI accelerator driver submitted to mainline Linux

A large patchset has been submitted to mainline Linux for NVIDIA NVDLA AI accelerator Direct Rendering Manager (DRM) driver, accompanied by an open-source user mode driver. The NVDLA (NVIDIA Deep Learning Accelerator) can be found in recent Jetson modules such as Jetson AGX Xavier and Jetson AGX Orin, and since NVDLA was made open-source hardware in 2017, it can also be integrated into third-party SoCs such as StarFive JH7100 Vision SoC and Allwinner V831 processor. I actually assumed everything was open-source already since we were told that NVDLA was a “complete solution with Verilog and C-model for the chip, Linux drivers, test suites, kernel- and user-mode software, and software development tools all available on Github’s NVDLA account.” and the inference compiler was open-sourced in September 2019. But apparently not, as developer Cai Huoqing submitted a patchset with 23 files changed, 13243 insertions, and the following short description: The NVIDIA Deep […]

April 15, 2022April 15, 2022 by Jean-Luc Aufranc (CNXSoft) - 13 Comments

ESP USB Bridge project converts ESP32-S2 or ESP32-S3 into a USB to UART/JTAG chip

Espressif’s ESP USB Bridge is a project based on the ESP-IDF that leverages ESP32-S2 or ESP32-S3 USB interface to use the board as a USB to UART or USB to JTAG debug board. It can serve as a substitute for USB to TTL debug boards based on CH340 or CP2104 for instance, be used with OpenOCD in JTAG bridge mode, and also flash UF2 firmware file to the target board. As just mentioned, there are three main use cases: Serial bridge mode with a terminal program or a firmware flashing tool like esptool. In that case, it just works like your typical USB to TTL debug board JTAG bridge mode for JTAG debugging with OpenOCD, and if the target board is based on ESP32, you can use openocd-esp32 project Mass storage device where the board can be accessed by a file manager on the host computer. One of the specific […]