HiFive Unleashed RISC-V Linux Development Board Gets a $2000 FPGA Expansion Board

If you’re a RISC-V architecture’s enthusiast or represent a company working on products with the new ISA, you may have spent $999 or more on Hifive Unleashed RISC-V Linux development board a few months ago. You now have the opportunity to spend an extra $1,999 for HiFive Unleashed Expansion Board powered by a MicroSemi PolarFire FPGA programmed with a PCIe root port bridge, and allowing you to test all sorts of peripherals such as HDD’s & SSD’s,  HDMI output, and audio cards, network adapters, graphics cards, and so on. Expansion board specifications: FPGA – Microsemi Low Power PolarFire FPGA with 300K Logic Element 4 Gbit DDR4 x16 SPI Flash for remote FPGA updates, QSPI Flash connected to GPIO 24 lane PCIe Switch x1 PCI Express card connector x16 PCI Express card connector with 4 lanes of PCIe gen2 connected SSD M.2 connector SATA connector HDMI connector eMMC Nand Flash uSD Card Slot USB to UART bridges 2 CAN transceivers FMC …

QEMU 2.12 Released with Raspberry Pi 3, RISC-V Support

QEMU is open source machine emulator and virtualizer, which I used in the past at a time when Arm boards were more expensive or hard to get than today, and more recently I tested RISC-V Linux using QEMU (fork). QEMU 2.12 has now been released with some interesting new features including RISC-V support, and initial support for Raspberry Pi 3 machine model. The Changelog is rather long, but some other notable changes include: Cortex-M33 Armv8-M emulation, used by the new mps2-an505 board. Support for various AArch64 v8.1/v8.2/v8.3 extensions. Initial support for Raspberry Pi 3 machine model i.MX7 SoC and i.MX7 Sabre board emulation. Spectre/Meltdown mitigation support for x86/pseries/s390 guest Intel IOMMU support for 48-bit addresses Many SD card emulation cleanups and bugfixes. Etc.. You can get the source code and build instructions in the download page. If you are interested in running Debian on RPI 3 model, or/and want to find out more about RISC-V support, you may want to …

SiFive Partners with Western Digital to Produce 1 Billion RISC-V Cores

Architecture like Arm and x86 are well established, and initiatives like RISC-V opens source ISA have potential, but market acceptance and commercial success are not guaranteed. But RISC-V just got a big boost, as SiFive announced it raised $50.6 million in a Series C round from existing and new investors, as well as strategic partners such as Huami, SK Telecom and Western Digital. Even more importantly, Sifive and Western Digital signed a multi-year license for the Freedom Platform, with Western Digital pledging to produce 1 billion RISC-V cores. The announcement does not explicitly mention which Freedom platform, but Western Digital statement makes it quite clear they’ll use one of the more powerful (and Linux capable) core: RISC-V delivers a platform for innovation unshackled from the proprietary interface of the past. This freedom allows us to bring compute closer to data to optimize special purpose compute capabilities targeted at Big Data and Fast Data applications. The next generation of applications like Machine …

How to Run Linux on RISC-V with QEMU Emulator

RISC-V open source architecture is starting to become more and more interesting thanks the growing RISC-V hardware & software ecosystem, and with the recent release of HiFive Unleashed, we even have a board capable of running Linux. The only problem: it costs $999. But luckily, it’s possible to experiment with Linux on RISC-V without extra hardware, just using your current PC. Imperas offers a commercial solution working on both Windows and Linux that relies on busybear-linux RISC-V Linux root filesystem comprised of busybox and dropbear SSH server. The rootfs also works with QEMU, so I tried it in Ubuntu 16.04. The instructions on Github are quite easy to follow. My computer is powered by an AMD FX8350 processor coupled with 16GB RAM, and the whole process took around 2 hours, so better use the fastest computer possible. It also requires around 26 GB of storage on your build machine. First, let’s create a working directory, and retrieve the RISC-V toolchain: …

RISC-V Keynote at Embedded Linux Conference 2018 (Video)

The Embedded Linux Conference and OpenIoT Summit 2018 have just started, and the Linux Foundation has already uploaded a few keynote videos to YouTube, including the one by Yunsup Lee, Co-Founder and CTO, SiFive, entitled “Designing the Next Billion Chips: How RISC-V is Revolutionizing Hardware”. Yunsup explains the current problem with chip development, and go through the open source RISC-V solutions offered by Sifive. Currently design a chip has a high upfront (NRE = non-recurring engineering) costs, is time-consuming (1.5 to 2 years at least) and silicon vendors normally target high volume production, but now many applications like IoT or machine learning require custom chips that may not be (yet) manufactured in such high volume. The solution is to adapt some idea from open source software to open source hardware in order to lower the costs, enable fast prototyping, and involve the community of designers and software developers. He took Instagram as an example, as it sold for $1 billion …

GreenWaves GAP8 is a Low Power RISC-V IoT Processor Optimized for Artificial Intelligence Applications

GreenWaves Technologies, a fabless semiconductor startup based in Grenoble, France, has designed GAP8 IoT application processor based on RISC-V architecture, and optimized for image and audio algorithms including convolutional neural network (CNN) inference with high energy efficiency thanks to an 8-core computational cluster combined with a convolution hardware accelerator. The design is based on RISC-V based Parallel Ultra Low Power (PULP) computing open-source platform. The new processor targets industrial and consumer products integrating artificial intelligence, and advanced classification such as image recognition, counting people and objects, machine health monitoring, home security, speech recognition, consumer robotics, wearables and smart toys. Some of GAP8 processor specifications: 1x extended RISC-V fabric controller core with 16 kB data and 4 kB instruction cache for system control 8x extended RISC-V compute cores with 64 kB shared data memory and 16 kB shared instruction cache 1x Hardware optimized synchronization unit 1x Hardware Convolution Engine (HWCE) Multi channel 1D/2D DMA, specialized multi-channel micro DMA for autonomous peripheral …

Embedded Linux Conference & IoT Summit 2018 Schedule

The Embedded Linux Conference 2018 and the OpenIoT Summit 2018 will jointly take place next month, on March 12 – 14, 2018 in Portland, Oregon, USA. The former is a “vendor-neutral technical conference for companies and developers using Linux in embedded products”, while the latter is a “technical conference for the developers and architects working on industrial IoT”. The Linux Foundation has already published the schedule, and it’s always useful to learn what will be discussed about even for people who won’t attend. With that in mind, here’s my own virtual schedule with some of the talks I find interesting / relevant to this blog. Monday, March 12 10:50 – 11:40 – Progress in the Embedded GPU Ecosystem by Robert Foss, Collabora Ltd. Ten years ago no one would have expected the embedded GPU ecosystem in Linux to be what it is now. Today, a large number of GPUs have Open Source support and for those that aren’t supported yet, …

SiFive Introduces HiFive Unleashed RISC-V Linux Development Board (Crowdfunding)

RISC-V free and open architecture has gained traction in the last couple of years. SiFive has been one of the most active companies with RISC-V architecture, introducing Freedom U500 and E500 open source RISC-V SoCs in the summer of 2016, before launching their own HiFive1 Arduino compatible board, and later the official Arduino Cinque board. That’s fine if you are happy with MCU class boards, but RISC-V is getting into more powerful processors, and recently got initial support o Linux 4.15, so it should come as no surprise the company has now launched HiFive Unleashed, the first RISC-V-based, Linux-capable development board. HiFive Unleashed key features and specifications: SoC – SiFive Freedom U540 with 4x U54 RV64GC application cores @ up to 1.5GHz with Sv39 virtual memory support, 1x E51 RV64IMAC Management Core, 2 MB L2 cache;  28 nm TSMC process System Memory – 8GB DDR4 with ECC Storage –  32MB Quad SPI Flash from ISSI, MicroSD card for removable storage …