Cypress PSoC 64 Microcontrollers Target Secure IoT Applications

PSoC 64 Secure MCU

If you are like me, you probably don’t remember, but back in 2017 Arm announced the Platform Security Architecture (PSA) that defines a set of requirements to secure low cost Internet of Things devices. There’s now at least on PSA compliant microcontroller, as Cypress Semiconductor introduced their PSoC 64 Secure MCU at Embedded World 2019 last month. The press release claims that PSoC 64 MCU family is one of “the first Arm Cortex-M processors to be certified as Level 1 compliant within the Arm Platform Security Architecture (PSA) certification scheme, PSA Certified, utilizing a secure Trusted Firmware-M (TF-M) implementation integrated into the Arm Mbed OS open-source embedded operating system”. PSoC 64 secure MCU key features and specifications: Arm Cortex-M4F core with 22‑µA/MHz active power consumption Optional Arm Cortex-M0+ core with 15‑µA/MHz power consumption System Memory – 160KB to 1MB SRAM Storage – 512KB to 2MB flash Security HW Cryptography – Symmetric: AES, 3DES; Asymmetric: RSA, ECC; Hashing: SHA-256, SHA-512;True Random …

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GRiSP 2 Board Targets Embedded Erlang & Elixir Development (Crowdfunding)

Erlang is described as a programming language used to build massively scalable soft real-time systems with requirements on high availability, and used in telecoms, banking, e-commerce, computer telephony and instant messaging. Elixir is a dynamic, functional language designed for building scalable and maintainable applications that leverages the Erlang VM, known for running low-latency, distributed and fault-tolerant systems. Elixir is used in many types of applications from higher-level web development to the embedded software domain, and Peer Stritzinger designed GRiSP board especially for the latter in 2017. He’s now back with GRiSP 2 featuring an NXP i.MX 6ULL SoM running Linux and RTEMS (Real-Time Executive for Multiprocessor Systems) RTOS. GRiSP 2 board is comprised of a system-on-module and baseboard with the following specifications: System on Module SoC – NXP iMX6UL Arm Cortex-A7 @ 696 MHz, 128 KB L2 cache, with TRNG, Crypto Engine (AES/TDES/SHA), Secure Boot Memory – 128 MB DDR3 DRAM Storage – 4 GB eMMC flash, 4 KBit EEPROM …

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$30 Arch Mix Development Board Features NXP i.MX RT1052 Crossover Processor

Arch Mix

NXP i.MX RT Arm Cortex-M7 crossover processors are supposed to fill the gap between microcontrollers and more powerful application processors thanks to real-time capabilities, and a higher CPU frequency. We’ve already covered several i.MX RT1050 series platforms including NXP’s own evaluation board and Forlinx OK1052-C development kit comprised of a carrier board and an i.MX RT1052 system-on-module. But if you’d like to experiment with NXP i.MX RT processor using a cheaper, smaller, and easier to purchase development platform, Seeed Studio has started to sell Arch Mix development board for $29.90 plus shipping. Arch Mix board specifications: SoC – NXP i.MX RT1052 Arm Cortex-M7 processor @ up to 528MHz System Memory – 32MB SDRAM Storage – 64MB Hyperflash, 8MN QSPI flash, microSD card socket Display I/F – RGB LCD interface USB – 1x micro USB 2.0 host port, 1x USB OTG port for data and power Expansion Headers – 2x 22-pin headers (2.54mm pitch) with RMII, CAN, I2C, UART, CSI, I2S, …

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Minnow Server is a Secure Web Server for Microcontrollers

Minnow Server Secure Websocket

Many embedded systems have a limited amount of memory, which would normally run programs with smaller footprints than on desktops or servers. For example, nginx and Apache2 are the common web servers, but on hardware with limited memory, smaller footprint web servers may be required, so that’s why I wrote a list of web servers for embedded systems running Linux/uClinux many years ago. But now, even platforms based on microcontrollers often need to run web server usually for configuration. We’ve already shown how to use Arduino to serve a simple web page and did the same in Getting Started with NodeMCU Board Powered by ESP8266 WiSoC but using Lua programming language instead. It may be more convenient to run a proper web server however, as it’s easier to change the interface, and we previously covered MicroWebSrv lightweight web server that works on platforms running MicroPython such as Pycom boards. Real Time Logic offers another open source alternative with their Minnow Server …

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Forlinx OK5718-C Development Board is Powered by TI AM5718 Cortex-A15/M4 processor

TI AM5718 Development Board

Forlinx Embedded Technology (Forlinx) has just launched a new development board for indsutrial applications with audio and video processing requirements.  OK5718-C development board features Texas Instruments AM5718 Sitara SoC with a single Arm Cortex-A15 core, two real-time Cortex-M4 cores, a dual PRU, and a TI C66x DSP core. OK5718-C development board consists of a carrier board and FET5718-C SoM with the following specifications: FET5718-C System-on-Module SoC – TI AM5718 Sitara Arm Cortex-A15 processor @ up to 1.5GHz, C66x DSP @  750MHz, dual-core Arm Cortex-M4 @ 213MHz, dual core PRU @ 200MHz, PowerVR SGX544 3D GPU,  Vivante GC320 2D GPU, IVA-HD video accelerator subsystem (H.264, MPEG4, MPEG2, VC1) System Memory – 1GB DDR3L Storage – 8GB eMMC flash Board-to-board connectors for interface with baseboard – 320–pin exposing USB 3.0, PCIe 3.0, HDMI 1.4a, LCD RGB, 10x UART, 1x QSPI, 2x CAN, 2x Gigabit Ethernet, etc… PMU – TI TPS659162RGZR Supply Voltage – 5V Dimensions – 70 x 50 mm (12-layer PCB) Carrier …

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LicheePi Nano is an SD Card Sized Linux Board Powered by Allwinner F1C100s ARM9 Processor

Linux Board SD Card Size

Before Allwinner launched their popular A10 Cortex A8 processor earlier this decade, the company had Allwinner F-series ARM9 processors found in E-ink readers, vehicle multimedia systems, audio products and so on. I would not expect a new board based on of those processors in 2018, but LicheePi Nano looks to be exactly that with an Allwinner F1C100s processor, a form factor roughly the size of an SD card, and support for RGB LED displays. LicheePi Nano board specifications: SoC- Allwinner F1C100s ARM926EJS processor clocked at up to 900MHz System Memory – 32MB DDR integrated into SoC Storage – Micro SD card, and optional 8M SPI flash (unpopulated in the photo above) Display I/F – 40-pin RGB LCD FPC connector supporting 272×480, 480×800, 1024×600 and other resolutions resistive and capacitive displays Video Decoding – H.264 / MPEG up to 720p I/Os via 2.54mm pitch through holes and 1.27mmm pitch castellated holes SDIO for WiFi module 2x SPI, 3x TWI (I2C),3x UART 1x …

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Embedded Systems Conference 2018 Schedule – IoT, Security, Artificial Intelligence, and More

The Embedded Systems Conference takes place each year in Boston, US in April or May. This year, the event will occur on April 18-19, and the organizers have published the schedule with 7 tracks: Advanced Technologies, Center Stage (free), Embedded Hardware Design & Verification, Embedded Software Design & Verification, IoT and Connected Devices, Keynotes (free) and Special Event (free). Even if you can’t attend, it’s always useful to have a look at the schedule to learn about potential industry developments. So I’ve made my own virtual schedule with some of the sessions I found relevant to this blog. Wednesday, April 18 8:00 – 10:00 – An Introduction to RTOS by Jean Labrosse (Software Architect, Silicon Labs) This tutorial will help you understand what RTOSs are and how they work so that you can make better use of their features. The class will explain what an RTOS is and why you should use one. We’ll explain what tasks are, why you …

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ACRN is an Open Source Hypervisor Built for IoT Device Development

ACRN – pronounced “acorn” – is an open source reference hypervisor with a small footprint, real-time capabilities, adaptability with support for Linux, Android, and RTOS guest operating systems, built for safety critical code in mind, and specifically designed for IoT and embedded devices. The project is managed / supported by the Linux Foundation. A few more details about some of the key features of the solution: Two main components: the hypervisor itself, and its device model complete with rich I/O mediators managed by Linux-based Service OS (SOS). Small footprint – Approx. 25K lines of code (LOC) for ACRN hypervisor against 156K LOC for datacenter-centric hypervisors. Real Time – Low latency, enables faster boot time, improves overall responsiveness with hardware communication Adaptability – Multi-OS support for guest operating systems like Linux, Android, RTOSes… Safety Criticality – Safety critical workloads have priority, isolation of safety critical workloads Built for Embedded IoT – Virtualization beyond CPU, I/O, Networking, etc with support for Graphics, Imaging, …

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