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Posts Tagged ‘sip’

ESP32-PICO-KIT v4 Board Based on ESP32-PICO-D4 SiP Now Available for $10

December 7th, 2017 2 comments

A little while ago, I received a bunch of ESP32 PICO Core development boards which were based on Espressif Systems ESP32-PICO-D4 system-in-package with ESP32, 4MB SPI Flash, and other components. The advantage of such chip is that is requires less external component, and allows for smaller designs. For example, the boards I received would leave two row of pin on each side of the board, while most other ESP32 boards will only expose one row on each side.

I used the board to play with Micropython ESP32 port, and later-on when I launched a giveaway of 8 of the boards, I found out the name had changed to ESP32-PICO Kit, with the documentation listing v3 with all pins connected to male headers, and v4 with 6-pin not connected to a male header as shown in the photo below. Both versions of the board also have a different pin layout. But you don’t need to care since AFAIK v3 was never up for sale.

ESP32-PICO-KIT v4 however has now just launched, and Electrodragon offers it for $10 plus shipping.

Board specifications:

  • SiP – ESP32-PICO-D4 802.11 b/g/n WiFi + Bluetooth LE system-in-package
  • 3D antenna
  • USB – 1x micro USB port for power and programming;  CP2102 USB-TTL Serial Bridge
  • Expansion – 2x 20-pin headers with I/O and power signals. 2x 17-pin male headers soldered
  • Misc – EN and Boot buttons, on board power indicator LED.
  • Power regulator – AMS1117 3.3V regulator
  • Auto reset circuit
  • Dimensions – 51 x 20 mm

This board can be used like any other ESP32 board with ESP32 IDF SDK, Arduino Core, Micropython, and so on, it’s just narrower than most.

Other ESP32-PICO-D4 based boards have been launched such ESP32-PICO motherboard sold for $16 on Tindie, or TTGO T7, recently discovered by Time4EE, that can be purchased for $8.50 plus shipping on Aliexpress. The latter is however quite wider than the official Espressif devkit (estimated dimensions: 50×30 mm), but does provide a battery connector

TTGO T7

Standard ESP32 boards can now be purchased for as low as $5, so boards based on the SiP are currently a little bit more expensive, but I’d expect the price difference to come down overtime.

SAMA5D2 Based SiPs Combine ARM Cortex-A5 Processor With Up to 128MB DDR2

October 31st, 2017 5 comments

Atmel SAMA5D2 ARM Cortex-A5 processor was released about two years ago with extended temperature range and lower power consumption compared to previous SAMAD5 processors, with the new SoC still targeting industrial Internet of Things (IIoT), wearables and point of sale applications.

In recent years, we’ve seen companies packing main components into systems-in-package (SiP) with products such as Octavo Systems OSD3358 and Espressif Systems ESP32-PICO-D4 with integrate an existing processor with memory, storage, and/or PMIC. Microchip (previously Atmel) has now done the same for their SAMA5D2 processors with SiPs combining the Cortex A5 SoC with DDR2 memory.

Click to Enlarge

Four SAMA5D2 SiPs have been launched:

  • ATSAMA5D225C-D1M based on ATSAMA5D22C MPU with extra SD/SDIO, QSPI, FLEXCOMs (2x), I2S, and timers (2x) and:
    • 128 Mb (16 MB) DDR2 DRAM
    • 90 Peripheral I/Os
    • 196 BGA Package
    • Designed for RTOS/bare metal development
  • ATSAMA5D27C-D5M based on ATSAMA5D27C MPU with:
    • 512 Mb (64 MB) DDR2 DRAM
    • 128 Peripheral I/Os
    • 289 BGA Package
    • Designed for small Linux OS applications
  • ATSAMA5D27C-D1G based on ATSAMA5D27C MPU with
    • 1 Gb (128 MB) DDR2 DRAM
    • 128 Peripheral I/Os
    • 289 BGA Package
    • Designed for large Linux OS applications
  • ATSAMA5D28C-D1G based on ATSAMA5D28C MPU with:
    • 1 Gb (128 MB) DDR2 DRAM
    • 128 Peripheral I/Os
    • 289 BGA Package
    • PCI-pre-certified security
    • Designed for large Linux OS applications

atsama5d27-som1-ek1 – Click to Enlarge

Microchip provides software and hardware development tools for the SiP including ATSAMA5D27-SOM1-EK1 is a fast prototyping and evaluation platform together with SAMA5D27-SOM1. The kit’s main features include:

  • ATSAMA5D27-SOM1 module:
    • SiP – Microchip ATSAMA5D27C-D1G SiP withCortex-A5 MPU @ 500 MHz, 128 MB DDR2 DRAM
    • Storage
      • Microchip SST26VF064B-104I/MF 64Mb Serial Quad I/O (QSPI) flash memory for boot code (Linux kernel or RTOS)
      • Microchip 24AA02E48T-I/OT 2Kb Serial EEPROM with EUI-48 Note Identity for the Ethernet MAC address
    • Connectivity – Microchip KSZ8081RNAIA 10Base-T/100Base-TX Ethernet PHY for wired Ethernet connection
    • Power Management – Microchip MIC2800-G4JYML Power Management IC (PMIC) providing 3 power rails for the CPU, VDD I/O and the SDRAM
  • External Storage – 1x standard SD card interface, 1x microSD card interface
  • onnectivity – 10/100M Ethernet (RJ45 connector)
  • Display I/F – LCD RGB 24-bit interface (50-pin FPC connector)
  • Camera I/F – 12-bit camera interface (2×15 male connector)
  • USB – 1x USB host, 1x USB device, 1x USB HSIC (jumper not populated)
  • Expansion – 1x CAN interface ATA6561, 1x PMOD connector, 2x mikroBUS connector
  • Debugging – 1x JLINK-OB and JLINK-CDC, x1 JTAG interface
  • Security – 1x ATECC508 CryptoAuthentication device  (populated but not provisioned), 1x tamper connector
  • Misc – 1x RGB LED, 4x push button switches
  • Power Supply – From USB A and USB JLINK-OB; SuperCap for power saving

SAMA5D2-based SiPs are available now starting at $9.03 per unit for 5K orders, and the development kit is sold for $245. More details, including some documentation, can be found via the product page.

$25 PocketBeagle is a mini BeagleBone Board based on Octavo OSD3358-SM SiP

September 22nd, 2017 16 comments

Earlier this year, Qwerty Embedded designed PocketBone board, an Eagle & KiCad open source hardware board software compatible with BeagleBone, but much smaller and based on Octavo OSD3358 system-in-package. This was never an official BeagleBoard.org board, and AFAIK it was not made broadly available. But the BeagleBoard foundation has now introduced PocketBeagle with a similar form factor, but based instead on the latest Octavo OSD3358-SM SiP that embeds TI Sitara AM3358, 512MB RAM, a PMIC, and various passive components into a 21×21 package, and exposing more I/Os thanks to 72 through holes.

PocketBeagle board specifications:

  • SiP (System-in-Package) – Octavo Systems OSD3358-SM with
    • TI Sitara AM3358 ARM Cortex-A8 processor @ up to 1 GHz,  PowerVR SGX530 GPU, 2x PRU, ARM Cortex-M3 for power and security management functions
    • 512MB DDR3 800 MHz
    • 4kB I2C EEPROM
    • TPS65217 PMIC + LDO with integrated 1-cell LiPo battery support
  • Storage – micro SD slot
  • USB – 1x micro USB 2.0 OTG port
  • Expansion – 2x 36-pin headers (unpopulated) with USB 2.0 OTG, 8x analog inputs, 44x digital GPIOs, 3x UARTs, 2x I2C, 2x SPI, 4x PWM, 2x quadrature encoder inputs, 2x CAN bus, 23x programmable PRU I/O pins, 3x voltage inputs for battery, USB, power line, 2x voltage output (3.3V LDO + 1x voltage input)
  • Misc – Power button
  • Power Supply – 5V via micro USB port; via expansion headers for LiPo battery, VIN, or USB-VIN
  • Dimensions – 56mm x 35mm x 5mm

As with all BeagleBoard.ord board, PocketBeagle is open source hardware, but instead of providing only one source, the schematics and PCB layouts are provided in EAGLE and KiCAD formats, and convertion to web based Upverter CAD tools in progress.

Software support should be about the same as for BeagleBone Black with official Debian image, Cloud9 IDE, etc.., but there must be some differences, as software status is yet to be updated with most items marked as WiP at the time of writing. You’ll find more info in the Wiki’s FAQ.

PocketBeagle can be purchased now for around $25 on Digikey, Arrow, or Mouser. Visit PocketBeagle’s product page for more details.

ESP32-PICO-D4 System-in-Package Combines ESP32, 4MB SPI Flash, a Crystal Oscillator, and Passive Components

August 22nd, 2017 2 comments

Espressif Systems has revealed another ESP32 variant, but this time it’s not an SoC, but a 7x7mm system-in-package (SIP) that comes ESP32 dual core processor, a 4MB  SPI flash, a crystal oscillator and various passive components, so that you don’t need to include those in your design, and create an ultra-compact PCB for wearables and other space-constrained applications.

ESP32-PICO-D4 Internal Schematics – Click to Enlarge

ESP32-PICO-D4 SiP specifications:

  • SoC – ESP32 with two Tensilica LX6 cores, 448 KB ROM, 520 KB SRAM (inc. 8KB RTC memory), 1kbit eFuse
  • On-module Flash – 4MB SPI flash
  • Connectivity
    • WiFi – 802.11 b/g/n/e/i (802.11n up to 150 Mbps)
    • Bluetooth – Bluetooth V4.2 BR/EDR and BLE specification; ; class-1, class-2 and class-3 transmitter; Audio: CVSD and SBC
  • SIP Interfaces
    • SD card, UART, SPI, SDIO, LED PWM, Motor PWM, I2S, I2C, IR
    • GPIO, capacitive touch sensor, ADC, DAC, LNA pre-amplifier
  • Sensors –  On-chip Hall sensor & temperature sensor
  • Clock – On-module 40 MHz crystal
  • Power supply – 2.3 ~ 3.6V
  • Operating current – Average: 80 mA
  • Temperature range –  -40°C ~ 85°C
  • Package dimensions –  7.0±0.1 mm x 7.0±0.1 mm x 0.94±0.1 mm

I understand ESP32 supports up to 16MB flash, so future ESP32-PICO-D16 SIP might be possible too. The second schematics in the datasheet shows what a basic board with ESP32-PICO SIP looks like.

ESP32-PICO-D4 Module Peripheral Schematics – Click to Enlarge

The company explains the SiP is particularly suited for any space-limited or battery-operated applications, such as wearable electronics, medical equipment, sensors and other IoT products. Beside the datasheet, there’s currently very little information about ESP32-PICO-D4 on the web, so we’ll have to wait to see what comes out of it.

[Update: Photo of module with ESP32-PICO-D4

]

Via ESP32net Tweet

CHIP Pro is a $16 WiFi and Bluetooth 4.2 System-on-Module Powered by a $6 GR8 ARM Cortex A8 SIP

October 12th, 2016 24 comments

Next Thing CHIP board and corresponding PocketCHIP portable Linux computer have been relatively popular due to their inexpensive price for the feature set, as for $9, you’d get an Allwinner R8 ARM Cortex A8 processor, 512MB flash, 4GB NAND flash, WiFi & Bluetooth connectivity, and plenty of I/Os, which made it very attractive for IoT applications compared to other cheap boards such as Raspberry Pi Zero and Orange Pi One. The first board was mostly designed for hobbyists, but  company has now designed a new lower profile system-on-module called CHIP Pro based on Next Thing GR8 SIP combining Allwinner R8 SoC with 256MB DDR3 RAM that can be used for easy integration into your own hardware project.

chip-proWhile the original CHIP board exposed full USB ports and interface for video signal, the new CHIP Pro is specifically designed for IoT with the following specs:

  • SIP – Allwinner R8 ARM Cortex A8 processor @ up to 1.0 GHz with Mali-400 GPU + 256MB DDR3 RAM (14×14 mm package)
  • Storage – 512MB SLC NAND flash, 1x micro SD port
  • Connectivity – 802.11 b/g/n WiFi + Bluetooth 4.2 with chip antenna and u.FL antenna connector
  • USB – 1x micro USB port for power and serial console access
  • Expansion – 2x 16-pin with 2x UART, parallel camera interface, I2C, SPI, 2x PWM, USB 2.0 OTG, USB 2.0 host, 2x microphone, 1x headphone
  • Power Supply – AXP209 PMU supporting USB power, Charge in, and 2.9 to 4.2V LiPo battery
  • Dimensions – 45 x 30 mm
  • Certifications – CE and FCC part 15
Click to Enlarge

Click to Enlarge

The module is pre-loaded with the company’s Linux based GadgetOS operating system, but custom firmware flashing is available for orders of 1,000 modules or more. Potential applications include physical computing, voice recognition, smart consumer devices, portable audio devices and so on. Software support should be identical to what you already get in CHIP board, and you can already find some hardware design files specific to CHIP Pro on Github including datasheets for the system-on-module and Allwinner GR8 SIP.

chip-pro-devkitIn order to help you getting started as fast as possible, a development kit is also available with a baseboard and two CHIP Pro modules. The baseboard include a 5V-23V power jack, a 3.5mm audio jack, a micro USB port, a USB host port, some LEDs, a power button, and female headers for easy access to all I/Os.

CHIP Pro SoM will start selling for $16 in December of this year without minimum order quantity, and no volume discount, e.g. if you buy 1 million SoMs, you’d have to pay 16 million dollars. One issue with CHIP board is that if you asked Allwinner for a quote for module used in the board, it would cost more or about the same as the board itself. Allwinner/Next Thing GR8 is completely different, as you can actually buy it for $6 (including AXP-209 PMIC) to integrate into your own project. The development kit is available now for $49. More technical details and purchase links can be found on the product page.

Thanks to Nanik for the tip.

Setting a VoIP SIP user agent with Embedded Linux

July 19th, 2016 8 comments

This is a guest post by Leonardo Graboski Veiga, working for Toradex.

Introduction

This article’s main goals are: to cross-compile the PJSIP libraries and the PJSUA API reference implementation; deploy it to the target system; give an overview about the SIP protocol; and explore the reference implementation features, regarding audio only. For this purpose, a Computer on Module (CoM) from Toradex was chosen in the following configuration: Colibri iMX6DL* + Colibri Evaluation Board. The evaluation board and CoM are displayed in Figures 1 and 2, respectively.

Figure 1 -

Figure 1 – Colibri Evaluation Board

 

Figure 2 -

Figure 2 – Colibri iMX6DL

VOIP or Voice over IP, is a term designed to refer to a set of methods and technologies targeted for the implementation of telephony services over the Internet. For the purpose of this article, the scope will be limited to the use of a reference implementation built upon the SIP communication handling protocol by means of the PJSIP libraries and PJSUA2 API. If you wish to gather more information about VOIP itself, there is a website that labels itself “A reference guide to all things VOIP” and it holds comprehensive information on the matter.

SIP is the Session Initiation Protocol – a protocol used for signaling and handling communication sessions. This protocol is sometimes referred to as the de facto standard for VOIP implementations. It is an IETF (Internet Engineering Task Force) standard even though there are other options to SIP, such as IAX2. SIP employs the RTP protocol for data transmission which itself is encapsulated in TCP or UDP and can be encrypted by using TLS.

PJSIP is a set of libraries that implements the SIP and related protocols such as RTP and STUN, among others in C language. Some of its advantages are that it is free, open source, and highly portable. It was started in 2005 and is still being maintained and improved with wide documentation and the advantage of having a high level API named PJSUA2 for easily building custom applications. The PJSUA2 even has an online book for its official documentation.

Cross-compilation

The first step to cross-compile the PJSIP libraries and the test/sample application is to have the toolchain set. To do it, we can follow the toolchain for hard float calling convention section of this article. Note that if you are willing to use your own cross-compilation toolchain, according to this PJSIP documentation, you are required to have the following GNU tools: GNU make (other make will not work), GNU binutils, and GNU gcc for the target.

If the basic rootfs provided by Linaro doesn’t have some ALSA headers and the library needed to compile PJSIP, we will download and compile these libraries from the ALSA project website. In this article, the alsa-lib version downloaded was 1.1.1. then we will install the headers and library to the Linaro rootfs.

Install the toolchain Linaro:

Export the environment variables:

Download and unpack the ALSA lib:

Before compiling the ALSA lib source codes, it is necessary to run the autoconf script with the CFLAGS, LDFLAGS and prefix variables pointing to the rootfs from the Linaro toolchain:

Then just build and install. After the make command, the compilation will fail at some point; but it doesn’t matter because the headers and library we need will have been compiled.

Having the toolchain configured, it is time to download and extract the PJSIP source codes to the host machine and then go into the directory that holds the unpacked content. At the time this article was written, PJSIP version was 2.5.1.

Before compiling the PJSIP source codes, it is necessary to run the autoconf script pointing to the previously modified rootfs from the Linaro toolchain. It is almost the same way we did to compile the ALSA libraries, except for the fact that the directory where we want the compiled libraries to be installed is a directory we will compress and deploy to the target machine.

Then we are able to compile the libraries and also copy the reference implementation executable to the installation folder:

The next steps are to compress the folder and copy it to the Colibri iMX6. To discover the iMX6 IP, you can issue the ifconfig command:

Finally, log into the Colibri iMX6:

Now, we have the PJSIP deployed to the target – although it isn’t necessary for our next steps, since we will be using a binary only, you may find it useful somehow while developing applications of your own. We are also ready to start using the reference implementation, but first, let’s check some other things.

Audio check and configuration

The PJSIP library uses ALSA (Advanced Linux Sound Architecture) resources, which is also the audio subsystem used by the Toradex embedded system BSPs. Before starting, make sure you plug a headphone/speakers and a microphone into the carrier board with the system powered-off, as illustrated in the Figure 3.

Figure 3 -

Figure 3 – Connecting the mic/headphones/speakers to the Evaluation Board

Then you can use the alsamixer application to adjust the audio options according to your system.

The configuration used is illustrated in the Figure 4 and you should notice that adjusting the microphone’s amplification too loud can cause distortion, thus, it is good to experiment with the settings. Even adjusting the mic option to zero won’t mute your microphone; it just means there will be no amplification, or in other words 0dB gain. Another important point to notice is that if you force power-off the system, the configurations you made might be lost, therefore reboot or shutdown from the command line the first time you make your changes.

Figure 4 -

Figure 4 – Alsamixer configuration (Click to Enlarge)

To test the audio input (microphone) and, subsequently the output (headphones/speakers), we will record some audio by using the arecord command and then play it by using the aplay command. Notice that for the arecord there are some options that we need to set: -V displays a VU meter so you have visual feedback whether your mic configuration is good or not; mono is passed since microphone is mono; -r is the sampling rate; -f is the format and -d is the duration in seconds. For more information regarding arecord, you can use the –help option, or if you want to know more about audio on the Colibri iMX6, you can go to the Toradex developer related page.

If you can hear yourself well, we are ready to go ahead. Otherwise, check the connectors and the audio configuration.

SIP protocol overview

SIP is the session initiation protocol standardized by the IETF and used for VOIP and other types of multimedia sessions, such as messaging and video. It is text-based and uses the UTF-8 encoding, usually choosing UDP or TCP over port 5060 as a transport protocol. The information provided here about this protocol is mostly based on information provided here.

The protocol has methods defined in its RFC and method extensions defined in other RFCs. A few of them are:

  • ACK: used in some situations for handshake
  • BYE: session hang up
  • CANCEL: cancel an invite
  • INVITE: add another user agent to a session
  • SUBSCRIBE: request information about the status of a session
  • NOTIFY: sent from time to time by the gateway, must be answered with 200 OK
  • MESSAGE: used to allow and transport instant messages

There are also response codes, each with a specific meaning, that consist of 3 digit values:

  • 1xx: provisional – request received and still needs to process e.g. 100 trying, 180 ringing
  • 2xx: success – action successfully received and accepted e.g. 200 ok
  • 3xx: redirection – there is still some action needed to complete the request e.g. 300 multiple choices; 305 use proxy
  • 4xx: client error – server cannot process request or the client sent invalid e.g. 400 bad request; 404 not found
  • 5xx: server error – server cannot process a valid request e.g. 500 server internal error
  • 6xx: global failure – no server can fulfill the request e.g. 600 busy everywhere; 603 decline

It is important to notice that the SIP protocol doesn’t carry the audio information. Instead, it uses the RTP protocol encoded usually in UDP or TCP transport. For a better understanding, the Figure 5 explains how the transaction between two user agents is done for a simple call.

Figure 5: Example of a simple SIP call between user agents

Figure 5: Example of a simple SIP call between user agents

To make calls, a SIP URI is needed. It is a form of identifying a communication resource. A complete SIP URI has the format sip:user:[email protected]:port;uri-parameters?headers, but there are systems which can operate even with a SIP URI that provides only the host.

PJSUA reference implementation

The PJSUA API reference implementation is a command-line based application which uses the PJSIP, PJMEDIA, and PJNATH libraries and implements a user agent, also known as softphone. Its source-code can be found here and is a useful starting point to developing your own solution. The full documentation regarding the use of the PJSUA application can be found here.

Before starting to test, find the IP address for both your embedded system and your PC/notebook. You must have both of them in the same LAN, because we are not worried about using a proxy server or anything like that, therefore our connection between devices will be made point-to-point.

In this article, we will assume IP address 192.168.10.5 for the Colibri iMX6 and 192.168.10.1 for the PC. You also must have softphone software installed in your PC – it can even be the same reference application, if you want to compile it for your machine – this article will use the Linphone open-source softphone for Ubuntu 14.04 LTS. To start PJSUA in the embedded system use the following command. The PJSUA command line interface that you are expected to see is described in the Figure 6.

Figure 6: PJSUA command-line interface (Click to Enlarge)

Figure 6: PJSUA command-line interface (Click to Enlarge)

To make a new call from the embedded system to the PC, type “m” and then enter the simplest SIP URI possible which consists of passing only the softphone IP in the format sip:192.168.10.1. The process of making the call is illustrated in the Figure 7 and the answered call in the PC is illustrated in the Figure 8. To hang up, use the command “h”.

Figure 7: Making a call from PJSUA

Figure 7: Making a call from PJSUA

Figure 8: Linphone positive answer – in progress

Figure 8: Linphone positive answer – in progress

In order to send instant messages, type “i”, the SIP URI of the destination and the message, almost like the way we did to start a call. In your PC softphone, you should see the message. Try to send some message to the iMX6 by using the GUI. The Figure 9 displays the Linphone messaging interface with some messages exchanged between devices, while Figure 10 illustrates a message received by the Colibri iMX6 embedded system.

Figure 9: Message exchange between the Colibri iMX6 and the PC/notebook

Figure 9: Message exchange between the Colibri iMX6 and the PC/notebook

Figure 10: Message received by the Colibri iMX6 embedded system

Figure 10: Message received by the Colibri iMX6 embedded system

Additional configuration

In this subsection, some of the options for the PJSUA command-line application will be presented. They can be found here. Firstly, create a file named .pjsua-conf in the embedded system with the following contents:

The stereo configuration lets the audio output to be played on both the headphone’s speakers, while omitting it just makes the application to output the sound to only one of them. The auto-answer option lets you configure an answer code for incoming calls – in this case, the answer is 200, which means the call is accepted – and this can be useful in situations where the embedded system endpoint doesn’t has a human interface. Duration sets a maximum call duration in seconds, and this may be useful in applications such as debugging purposes. Color makes some log messages such as warnings and errors be colored, which helps identifying specific situations. Lastly, the add-buddy option lets you add SIP URIs so that you don’t have to add them manually every time you restart the application neither do you have to type the URI every time you want to make a call to the corresponding buddy (you may specify this option more than once for multiple buddies).

Passing the configuration file to the application:

Among the various options available, there are two that are nice for testing purposes: rx-drop-pct=PCT and tx-drop-pct=PCT. They both simulate packet loss by adjusting its percentage (PCT). It was tested with a package loss for both Rx and Tx of 10%, 20% and 30%, respectively, while monitoring the call quality average displayed by Linphone, which ranges from 0 to 5. The quality went from almost 5.0 without loss to 3.3, 2.3, and 0.6, respectively. Figure 11 shows the Linphone screen capture for the last situation (30% loss).

Figure 11: Quality for Rx and Tx packet loss of 30%

Figure 11: Quality for Rx and Tx packet loss of 30%

There you go! Now you have a VOIP implementation for the Colibri iMX6 running and a starting point to develop your own application according to your needs. Some additional information will be presented in the next chapter: network monitoring in order to see the SIP packets and some transactions being made.

Network monitoring for SIP packets

In order to see the SIP transactions being made between devices, the Wireshark software will be employed. You must notice that there is a third IP address 192.168.0.20 in the transactions and that is because the notebook was used as a DHCP server for the iMX6. Therefore, the notebook has two IP addresses. Still, no further investigation on why or how the SIP application is accessing the second IP address.

The sequence of operations made while capturing the network is described below:

  1. Call from Colibri iMX6 and reject from the notebook
  2. Call from Colibri iMX6 and accept from the notebook
  3. Colibri iMX6 hang up
  4. Call from the notebook and accept from Colibri iMX6
  5. Colibri iMX6 puts on hold
  6. Colibri iMX6 resumes the call
  7. Colibri iMX6 sends UPDATE
  8. Colibri iMX6 sends instant message
  9. Notebook sends instant message
  10. SUBSCRIBE/NOTIFY

The Figure 12 displays only the SIP protocol packets exchanged during the capture, with the highlighted lines corresponding to the start of the situations described above. Hence, 10 lines are highlighted. Notice that there is a SUBSCRIBE/NOTIFY handshake a moment before the third operation listed above.

Figure 12 - Network monitoring for SIP protocol packets only (click to enlarge)

Figure 12 – Network monitoring for SIP protocol packets only (Click to enlarge)

In the Figure 13, there is a capture of a very brief conversation (~4s) SIP and RTP packets. Notice that while the notebook uses the IP address 192.168.10.1 to send data to the embedded system, this one replies to the IP address 192.168.0.20.

Figure 13: Network monitoring for SIP and RTP packets for a brief call (Click to Enlarge)

Figure 13: Network monitoring for SIP and RTP packets for a brief call (Click to Enlarge)

With the information gathered, this is a way to confirm in practice some of the information presented in the previous chapter SIP protocol overview.

This is the end of the article that goes through implementing the PJSUA console-based application on a Toradex Colibri iMX6 and Evaluation Board running embedded Linux. Thank you for reading and I hope it was a useful article!

* for T20 based modules, mfpu=neon could generate incompatible binaries.

OSD3358 SiP Integrates TI Sitara AM3358 SoC, Memory, PMIC, LDO and Passive Components into a Single BGA System-in-Package

May 10th, 2016 6 comments

Octavo Systems has created a BeagleBone Black reference design that’s exactly like the original board, except for one detail: It’s based on the company’s OSD3358 system-in-package (SiP) that combine Texas Instruments AM3358 Cortex A8 processor with up to 1GB RAM, TI LDO and PMIC, and over 140 passive components into a single 400-ball BGA package. The only three other main components on the reference design are the eMMC flash, Ethernet transceiver and HDMI framer.BeagleBone_Black_OSD3358_SiP Key specs of OSD3358 SiP:

  • Texas Instruments AM335x (AM3358 or AM3352) Cortex A8 processor @ 1 GHz
  • 256MB, 512 MB or 1GB DDR3 memory
  • Texas Instruments TPS62217C PMIC
  • Texas Instruments TL5209 LDO
  • Over 140 passive components
  • Package – 400 1.27mm pitch BGA – 27 x 27 mm package size
  • Temperature Range – Base version: 0 to 85°C; Industrial version: -40° to 85° C

Octavo_Systems_OSD3358_SiP_Block_Diagram Some of the advantages of a SiP package over using multiple chips include faster design time thanks to decreased layout complexity, increased reliability through reduced number of components, power savings due to shorter signal trace lengths and reduced parasitics, and simplification of supply chain since less components need to be sourced.

Another example of board with OSD3358 is PocketBone, a mint box size Beaglebone features the SiP, two USB ports, the power circuitry, and some LEDs & test points.

PocketBone

PocketBone PCB Layout

OSD3358-512M-BAS with 512 MB RAM and commercial temperature range is available now for $30 per unit for 1K order. Other version are coming soon. The datasheet, BeagleBone Black reference design files (OrCAD) and other documentation can be found on Octavo Systems OSD335x product page.

Thanks to Freire for the tip.

Mediatek Unveils MT2523 SiP for GPS Enabled, Bluetooth LE Wearables

January 5th, 2016 No comments

Silicon manufacturers are starting to launch ever more integrated solutions specifically designed for wearables, and after Samsung S3FBP5A bio-processor unveiled a few days ago, MediaTek has launched MT2623 ARM Cortex M4 System-in-Package (SiP) with GPS, Bluetooth LE, and a MIPI DSI interface.

Mediatek

Other details are sparse but here’s what the company disclosed for MT2523:

  • MCU core – ARM Cortex M4
  • GPU – 2D accelerator supporting true colors, per-pixel alpha channel, anti-aliasing fonts, and 1-bit index color to save memory.
  • Connectivity – Dual-mode Bluetooth Low Energy and GPS
  • Display – MIPI DSI and serial interfaces
  • Integrated PMU
  • Battery Life – More than a week (typical)

The SiP’s printed circuit board area is said to be 41% percent smaller than competitors’ solutions.

MT2523 will be available to manufacturers in H1 2016, and found in active and fitness smartwatches a little later.

Thanks to Nanik for the tip.