VIA Pixetto Hi3518E V300 HD Camera Board Targets Artificial Intelligence and Machine Learning Education

VIA Technologies has launched the VIA Pixetto vision sensor aims to teach artificial intelligence (AI) and machine learning (ML) to students aged twelve and above. The Linux board features an Hisilicon Hi3518E V300 Cortex-A7 HD camera SoC combined with 64MB RAM, 128MB SPI flash, a MicroSD slot, as well as GalaxyCore GC2053 2M CMOS sensor offering 1920 x 1080 resolution and a 130° field of view. VIA Pixetto hardware specifications: SoC – Hisilicon Hi3518E V300 Cortex-A7 HD camera SoC @ 900 MHz with H.264, H.265, MJPEG/JPEG encoder System Memory – 64MB DDR, MicroSD card slot Storage – 128MB SPI flash Camera – GalaxyCore GC2053 2M CMOS sensor with 1920 x 1080 resolution,  130° FoV Audio – Microphone USB – 1x Micro USB 2.0 port Connectivity – WiFi 4 via Hisilicon Hi1131 low-power Wi-Fi chip  and ceramic antenna Expansion – Grove connector Misc – 3x LEDs (Power, OS boot, active status), 1x reset button Power Supply 5V/500mA via Micro USB port …

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QuickFeather Board is Powered by QuickLogic EOS S3 Cortex-M4F MCU with embedded FPGA (Crowdfunding)

Yesterday, I wrote about what I felt what a pretty unique board: Evo M51 board following Adafruit Feather form factor, and equipped with an Atmel SAMD51 Cortex-M4F MCU and an Intel MAX 10 FPGA. But less than 24 hours later, I’ve come across another Adafruit Feather-sized Cortex-M4F board with FPGA fabric. But instead of using a two-chip solution, QuickLogic QuickFeather board leverages the company’s EOS S3 SoC with a low-power Cortex-M4F core and embedded FPGA fabric. QuickFeather specifications: SoC – QuickLogic EOS S3 with Arm Cortex-M4F Microcontroller @ up to 80 MHz and 512 Kb SRAM, plus an embedded FPGA (eFPGA) with 2400 effective logic cells and 64Kb RAM Storage – 16Mbit SPI NOR flash USB – Micro USB  port with data signals tied to eFPGA programmable logic Sensors – Accelerometer, pressure sensor, built-in PDM microphone Expansion I/Os – Breadboard-compatible 0.1″ (2.54 mm) pitch headers including 20 Feather-defined GPIO + 13 additional GPIO with UART, I2C, I2S and SPI Debugging …

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Boardcon RK1808 SBC Targets Smart Audio & Computer Vision Applications

Rockchip RK1808 neural network processing unit was initially an IP Block inside RK3399Pro, but the company eventually launched RK1808 Cortex-A35 processor as a standalone solution now providing up to 3.0 TOPS for AI inferencing in modules, USB sticks, and development kits. Boardcon offers another option with EM1808, a Rockchip RK1808 SBC equipped with the processor. The board should be suitable for two main types of AI applications, namely smart audio applications thanks to four audio ports, speaker header, & an onboard 4-mic array, and computer vision with MIPI CSI & DSI interfaces. Boardcon EM1808 board is comprised of a baseboard and CPU module with the following overall specifications: SoC – Rockchip RK1808 dual Cortex-A35 processor up to 1.6GHz with 3.0 TOPS (for INT8) NPU, VPU supporting H.264 1080p60 decode, 1080p30 encode System Memory- 2GB LPDDR3 Storage – 8GB eMMC flash, MicroSD slot, M.2 NVMe SSD interface Display I/F – 26-pin MIPI DSI header Camera I/F – 26-pin MIPI CSI header …

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XMOS launches Xcore.AI, a scalable AI processor for the Edge

XMOS, known for its high-performance voice interfaces, is joining the AIoT bandwagon with the announcement of the Xcore.ai, a flexible and economical processor delivering high-performance AI, DSP, control, and I/O’s in a single device. IoT and AI have been one of the most trending topics and fields in the last decade. Both areas have seen large innovations in between them. Deep neural networks have become better, IoT deployment cost has also been greatly reduced, and most importantly, they both have a significant impact on multiple industries. An interesting trend recently is the emergence of applications merging AI and IoT together to form so-called AIoT applications. IoT will be the digital nervous system, while AI will become the brain that makes all the critical decisions which will control the whole system. AIoT has led to the development and deployment of what we call AI processors or AI modules that can be deployed to the edge for high-performance Edge computing applications. An …

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Arm Introduces Cortex-M55 MCU Core, Arm Ethos-U55 microNPU for Cortex-M Microcontrollers

Artificial Intelligence and the Internet of Things often go hand in hand with AIoT being a new buzz word that came up last year or so. But for AIoT to scale we need ultra-low-cost, low-power solutions capable of doing inference at the sensor node level, and this is only possible with microcontrollers. To achieve this goal, Arm has just unveiled the Arm Cortex-M55 microcontroller core optimized for artificial intelligence workloads that delivers up to a 15x uplift in ML performance and a 5x uplift in DSP performance with greater efficiency, as well as Ethos-U55 microNPU designed for Cortex-M microcontrollers that need even more AI performance (up to 480 times faster), while consuming as little power as possible. Arm Cortex-M55 Key features and specifications: Architecture – Armv8.1-M Bus interface – AMBA 5 AXI5 64-bit master (compatible to AXI4 IPs) Pipeline – 4-stage (for main integer pipeline) Security – Arm TrustZone technology (optional) DSP extension – 32-bit DSP/SIMD extension M-Profile Vector Extension …

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Mustang-M2BM-MX2 M.2 Card Features Two Intel Movidius Myriad X VPUs

We’ve already seen M.2 cards based on one or more Intel Movidius Myriad X VPU with the likes of AAEON AI Core XM2280 M.2 card, but there’s now another option from Taiwan-based IEI Integration Corp with their Mustang-M2MB-MX2 card. Specifications: AI Accelerators – 2x Intel Movidius Myriad X MA2485 VPU Dataplane Interface – M.2 BM Key Power Consumption – Around 7.5W Cooling – Active Heatsink Dimensions – 22 x 80 mm Temperature Range – -20°C~60°C Humidity – 5% ~ 90% Just like other Myriad X devices, the card relies on Intel OpenVINO toolkit working on Ubuntu 16.04.3 LTS 64-bit, CentOS 7.4 64-bit or Windows 10 64-bit operating systems, and supporting AlexNet, GoogleNetV1/V2, MobileNet SSD, MobileNetV1/V2, MTCNN, Squeezenet1.0/1.1, Tiny Yolo V1 & V2, Yolo V2, ResNet-18/50/101 topologies, as well as TensorFlow, Caffe, MXNet, and ONNX AI frameworks. The heatsink is really thick (~2 cm high), so it’s not something you’d just put in your laptop, and instead, it’s better suited to …

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ASUS Tinker Edge T SBC Launched for $168 and Up

ASUS unveiled Tinker Edge T & CR1S-CM-A SBCs based on Google Coral Edge TPU system-on-module featuring both NXP i.MX 8M processor and Google Edge TPU co-processor for AI acceleration in May 2019, but at the time none of the boards were available. But earlier this month, ASUS officially announced the board, and it can now be purchased on various sites including Provantage (~$168.35) and  Physical Computing (21,600 JPY ~ $200). It is also listed on Connection for about $198 but currently out of stock. Edge TPU module SoC – NXP i.MX 8M quad-core Arm Cortex-A53 processor with Arm Cortex-M4F real-time core,  GC7000 Lite 3D GPU ML accelerator – Google Edge TPU coprocessor delivering up to 4 TOPS System Memory – 1 GB LPDDR4 RAM Storage – 8 GB eMMC Flash memory Wireless Connectivity – Wi-Fi 2×2 MIMO (802.11b/g/n/ac 2.4/5GHz) Bluetooth 4.2 Baseboard Storage – MicroSD card slot Networking – Gigabit Ethernet port (via RTL8211F-CG) Video Output – MIPI DSI connector, …

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ESP Open Source Research Platform Enables the Design of RISC-V & Sparc SoC’s with Accelerators

FOSDEM 2020 will take place next week, and there will be several interesting talks about open-source hardware and software development. One of those is entitled “Open ESP – The Heterogeneous Open-Source Platform for Developing RISC-V Systems” with an excerpt of the abstract reading: ESP is an open-source research platform for RISC-V systems-on-chip that integrates many hardware accelerators. ESP provides a vertically integrated design flow from software development and hardware integration to full-system prototyping on FPGA. For application developers, it offers domain-specific automated solutions to synthesize new accelerators for their software and map it onto the heterogeneous SoC architecture. For hardware engineers, it offers automated solutions to integrate their accelerator designs into the complete SoC. If we go to the official website, we can see ESP (Embedded Scalable Platform) actually supports both 32-bit Leon3 (Sparc) and 64-bit Ariane (RISC-V) cores, and various hardware accelerators from the platform or third parties. Highlights: Architecture Tile-based architecture: processor, memory and accelerator tiles NoC (Network-on-Chip) …

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