MIPS Based TritonAI 64 AI IP Platform to Enable Inferencing & Training at the Edge

TritonAI 64 Block Diagram

After announcing their first MIPS Open release a few weeks ago, Wave Computing is back in the news with the announcement of TritonAI 64, an artificial intelligence IP platform combining MIPS 64-bit + SIMD open instruction set architecture with the company’s WaveTensor subsystem for the execution of convolutional neural network (CNN) algorithms, and WaveFlow flexible, scalable fabric for more complex AI algorithms. TritonAI 64 can scale up to 8 TOPS/Watt, over 10 TOPS/mm2 using a standard 7nm process node, and eventually would allow both inference and training at the edge. The platform supports 1 to 6 cores with MIPS64r6 ISA boasting the following features: 128-bit SIMD/FPU 8/16/32/int, 32/64 FP datatype support Virtualization extensions Superscalar 9-stage pipeline w/SMT Caches (32KB-64KB), DSPRAM (0-64KB) Advanced branch predict and MMU Integrated L2 cache (0-8MB, opt ECC) Power management (F/V gating, per CPU) Interrupt control with virtualization 256b native AXI4 or ACE interface Here’s the description provided by the company for their WaveTensor and WaveFlow …

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Wave Computing Announces the First MIPS Open Source Release

MIPS Open Source Release

In a surprise announcement last year, Wave Computing revealed their plans to open source MIPS architecture, and more specifically the new MIPS Release 6 architecture. The company has now started to deliver the goods with the release of the first MIPS Open Program components. Specific components of the first release include: MIPS ISA – The latest R6 version of the MIPS 32-and-64-bit architecture, including extensions such as virtualization, multi-threading, SIMD, DSP and microMIPS code compression MIPS Open Tools – Integrated development environment for embedded real-time operating systems and Linux-based systems for embedded products that enable developers to build, debug and deploy applications on MIPS-based hardware and software platforms; MIPS Open Field Programmable Gate Arrays (FPGAs)– A complete training program for community members that includes: Getting Started Package – Provides the MIPS FPGA system as a set of Verilog files, plus an overview and instructions on how to use the MIPS FPGA system; Labs – Includes 25 hands-on labs that help …

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Wave Computing to Open Source MIPS Architecture

MIPS Open Source

There has been a lot of talks about RISC-V open source, royalty-free instructions set architecture this year,  including the launch of RISC-V MCUs and Linux capable RISC-V processors,  and corresponding development boards such as Hifive Unleashed. This even lead Arm to create a – now shutdown – microsite telling why people should stick with Arm instead of RISC-V. While RISC-V was clearly on the rise this year, MIPS architecture once a dominant players in routers and set-top box has been on the decline, even prompting Blu to write a guest review entitled “Baikal T1 MIPS Processor – The Last of the Mohicans?” hinting at the near extincsion of MIPS based solutions. But there may be hope, or at least a last ditch effort, with Wave Computing purchasing MIPS from Imagination Technology earlier this year, and now announcing the MIPS Open Initiative to effectively open source 32-bit and 64-bit MIPS ISA next year, as well as making the ISA royalty-free, just …

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