Design an Open-Source SoC with Google SkyWater PDK, Get It Manufactured for Free

SkyWater PDK

With open ISAs like RISC-V, it’s become easier – provided you have the skills – to develop or customize your own SoC using RTL files, compile it with EDA tools, and run the resulting bitstream on an FPGA. But if you ever wanted to get an actual chip that would become more complex, as you’d need to request a process design kit (PDK) from a  foundry, and pay for the manufacturing cost, which amounts to at least several thousand dollars for older process nodes. But the FOSSi (Free and Open Source Silicon) Foundation has good news with Tim Ansell of Google announcing the SkyWater PDK, the first manufacturable, open-source process design kit. There are other open-source PDKs, but they aren’t manufacturable and/or only support older 0.35/0.5 micron nodes. The SkyWater PDK allows you to produce chips with the SkyWater foundry in the 130nm node. That’s a big improvement since you have access to an open-source PDK that’s manufacturable. but you’d …

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QuickFeather Board is Powered by QuickLogic EOS S3 Cortex-M4F MCU with embedded FPGA (Crowdfunding)

QuickLogic EOS S3 Development Board

Yesterday, I wrote about what I felt what a pretty unique board: Evo M51 board following Adafruit Feather form factor, and equipped with an Atmel SAMD51 Cortex-M4F MCU and an Intel MAX 10 FPGA. But less than 24 hours later, I’ve come across another Adafruit Feather-sized Cortex-M4F board with FPGA fabric. But instead of using a two-chip solution, QuickLogic QuickFeather board leverages the company’s EOS S3 SoC with a low-power Cortex-M4F core and embedded FPGA fabric. QuickFeather specifications: SoC – QuickLogic EOS S3 with Arm Cortex-M4F Microcontroller @ up to 80 MHz and 512 Kb SRAM, plus an embedded FPGA (eFPGA) with 2400 effective logic cells and 64Kb RAM Storage – 16Mbit SPI NOR flash USB – Micro USB  port with data signals tied to eFPGA programmable logic Sensors – Accelerometer, pressure sensor, built-in PDM microphone Expansion I/Os – Breadboard-compatible 0.1″ (2.54 mm) pitch headers including 20 Feather-defined GPIO + 13 additional GPIO with UART, I2C, I2S and SPI Debugging …

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Fraunhofer HHI H.266/Versatile Video Coding (VVC) Halves the Data Requirements of H.265

H.266 VCC

There’s a lot of hype around AV1 royalty-free video codec since it has backing from large companies, better characteristics than H.265 or VP9, and is already used by YouTube and Netflix. AV1 hardware decoders are also found in new processors like Amlogic S905X4 or Mediatek Dimensity 1000+. But we previously noted that H.266, aka VCC (Versatile Video Coding), was in the works, and Fraunhofer HHI has just announced the release and official adoption of the H.266/Versatile Video Coding (VVC) video compression standard. H.266 standard offers improved compression, which reduces data requirements by around 50% compared to the previous H.265/HEVC standard at the same visual quality. In practical terms, a 10GB H.265 video now only needs 5GB with H.266 video codec saving both storage and bandwidth. The standard can be used to transmit and store commonly used video resolutions from SD to HD up to 4K and 8K and also supports HDR (high dynamic range) and omnidirectional 360° videos. It should …

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STMicro STM32WL Wireless MCU Gets Wireless M-Bus Stack for Smart Meters

STM32WL Wireless M-Bus Stack

STMicro STM32WL was introduced as the world’s first LoRa SoC last year as it combined an STM32L4 Arm Cortex-M4 microcontroller with Semtech SX126x LoRa radio. The company has now partnered with Stackforce to develop a wireless M-Bus (wM-Bus) software stack that leverages the integrated sub-GHz radio and multiple modulation schemes supported by STM32WL microcontrollers. Wireless M-Bus (Wireless Meter Bus) is a wireless protocol specifically designed for remote reading of smart meters, generally gas, water, or electricity meters. The wM-Bus stack developed by Stackforce is said to comply with most of EN 13757-3/-7 specifications from lower to upper layers. The stack notably supports Wireless M-BUS modes S, T and C used throughout Europe in the 868MHz band, as well as the mode N for operation at 169MHz that also happens to be Wize frequency. Stackforce Wireless M-Bus stack for STM32WL also meets requirements for several other metering standards, including the Open Metering System (OMS) specification, the Dutch Smart Meter Requirements (DSMR), …

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Feather-Sized Evo M51 Board Combines Atmel SAMD51 MCU with Intel MAX 10 FPGA

Evo M51 FPGA Arduino

Arduino unveiled its first FPGA board around two years ago with MKR Vidor 4000 combining an Intel Cyclone FPGA with Microchip SAMD21 Cortex-M0+ MCU in a form factor similar to Arduino Zero. But in case you are looking for an even smaller Arduino compatible FPGA board, Alorium Technology’s Evo M51 might be exactly what you are after. The Adafruit Feather-sized board is equipped with an Atmel SAMD51 Arm Cortex-M4F microcontroller coupled with an Intel MAX 10 FPGA. Evo M51 specifications: MCU – Microchip (Atmel) SAMD51 Arm Cortex-M4F microcontroller clocked at 120 MHz with 512KB flash, 192 KB SRAM FPGA – Intel MAX 10 (10M25) FPGA with 25K LEs, 675Kbit block memory Storage – 2MB external flash USB – 1x micro USB port for power and programming I/O Digital 55x Total Digital I/O – 21x through-hole/castellated vias, 34x additional castellated-only 6x digital pins shared with analog pins 3.3V Inputs, 3.3V Outputs STEMMA QT QWIIC Compatible I2C connector Analog 6x analog inputs …

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Software Update Brings Subscription based Functions-on-Demand to BMW Cars

BMW Digital personalization functions on demand

Cars are getting smarter and safer, and autonomous driving looks promising but may take longer than expected, as many shortcomings still have to be worked out. In any case, that means most new cars will be connected to the Internet in the future, especially with the launch of 5G and V2X solutions. This will bring benefits and new business models, as BMW showcased at the recent BMW Connected Car Beta Days 2020. BMW lists a long list of new advantages of an upcoming software upgrade with improved BWM maps, connected parking to help you find parking space, connected charging to “make mobility more sustainable and innovative”, BMW Digital Key that turns an iPhone into a secure digital vehicle key,  wireless support of Google’s Android Auto, and the BMW Intelligent Personal Assistant has received some improvement with the virtual character now turns towards the person talking and can distinguish between addressing the driver and the passenger. Some updates look genuinely useful, …

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Upcoming SAVVY-V Open Source RISC-V Cluster Board Supports 10GbE via Microsemi PolarFire 64-bit RISC-V SoC

SAVVY-V Open Source-PolarFire RISC-V SOC FPGA Board

RISC-V based PolarFire SoC FPGA by Microsemi may be coming up in the third quarter of this year, but Ali Uzel has been sharing a few details about SAVVY-V advanced open-source RISC-V cluster board made by FOSOH-V (Flexible Open SOurce Hardware for RISC-V) community of developers. It’s powered by Microsemi Polarfire RISC-V SoC MPFS250T with four 64-bit RISC-V cores, a smaller RV64IMAC monitor core, and FPGA fabric that allows 10GbE via SFP+ cages, and exposes six USB Type-C ports. The solution is called a cluster board since up to six SAVVY-V boards can be stacked via a PC/104+ connector and interfaced via the USB-C ports. SAVVY-V cluster board preliminary features and specifications: SoC – Microsemi Polarfire RISC-V SoC MPFS250T with a quad-core 64-bit RV64IMAFDC (RV64GC) processor @ up to 667 MHz, a RV64IMAC monitor core, and FPGA fabric with 250K logic elements; 3.0 CoreMarks/MHz, 2.0 DMIPs/MHz; Also compatible with MPFS160T, MPFS095T, andMPFS025T. System Memory Up to 4GB 32-bit 3200Mbps LPDDR4 …

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Interview – NXP Linux BSP and Timesys Vigiles Maintenance Service & Security Updates

NXP Linux BSP Maintenance Workflow

I’ve been interviewing Ed White, Manager of NXP’s Professional Support and Engineering Services, and Akshay Bhat, Director of Engineering, Security Solutions at Timesys by email to find out more about NXP Linux BSP development process, and how Timesys can help to keep it updated and secure with its Vigiles service. Q1. CNX Software readers recently discussed NXP Linux BSP update status. One person specifically noted Linux 4.14.98 used in the BSP was well over a year old, and there were various opinions about the topic, including one person suggesting NXP only provides a stable BSP and it was the ultimate responsibility of the customer to merge Linux security patchsets. Could you explain the typical development process for NXP Linux BSP, and why the company chose not to update the patchsets regularly? Answer: The kernel strategy for NXP’s i.MX family BSPs closely follows the annual cadence of kernel.org’s LTS kernel selection. As soon as kernel.org establishes the next official LTS kernel …

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