arm

Posted on by Debashis Das - No Comments on NXP FRDM-IMX95-PRO i.MX 95 board features 10GbE, faster 6400 MT/s LPDDR5 memory, dual M.2 expansion

NXP FRDM-IMX95-PRO i.MX 95 board features 10GbE, faster 6400 MT/s LPDDR5 memory, dual M.2 expansion

NXP FRDM IMX95 PRO i.MX 95 dev board with larger 19×19 mm package, 10GbE, Wi Fi 6 Tri Radio, and dual M.2 expansion

NXP has introduced the FRDM-IMX95-PRO, a compact development board based on the i.MX 95 application processor in the larger 19×19 mm package. It features a 10GbE interface, Wi-Fi 6, Bluetooth 5.4, and 802.15.4 tri-radio connectivity, and two M.2 Key-M slots for AI accelerator cards or SSDs. The board also comes with 16 GB LPDDR5-6400 memory, a 32 GB eMMC flash, and NXP’s GoPoint demo interface for robotics, industrial networking, and vision processing applications. FRDM-IMX95-PRO board specifications: SoC – NXP i.MX 95 CPU Up to 6x Arm Cortex-A55 application cores clocked at 1.8/2.0 GHz with 32KB I-cache and D-cache, 64KB L2 cache, and 512KB L3 cache 1x Arm Cortex-M7 real-time core clocked at 800 MHz 1x Arm Cortex-M33 safety core clocked at 333 MHz GPU – Arm Mali-G310 V2 GPU for 2D/3D acceleration with support for OpenGL ES 3.2, OpenCL 3.0 VPU 1080p60/4Kp30 H.265 and H.264 encode and decode JPEG Encoder, […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Proxmox VE now officially supports 64-bit Arm (Aarch64) targets

Proxmox VE now officially supports 64-bit Arm (Aarch64) targets

Proxmox VE 64-bit Arm

Proxmox has recently announced the first official release of Proxmox Virtual Environment (VE) with support for 64-bit Arm (arm64/aarch64). Until now, the popular virtualization solution was only available for x86-64 (amd64). Proxmox VE 9.2 for arm64 is built on Debian 13.5 “Trixie” with Linux 7.0, and is otherwise based on the same code as the x86-64 version, and relies on the same configuration, tooling, and documentation, except for a few architecture-specific differences. The developers note that Proxmox VE for Arm fully supports NVIDIA Grace Hopper and NVIDIA Vera platforms, and “best-effort” support is available on other UEFI-based Armv8-A/Armv9-A hardware. However, device-tree-only single-board computers, such as the Raspberry Pi, are not supported, since the host must boot through UEFI and describe its hardware through ACPI. Having said that, we previously noted work on an UEFI+ACPI port for the Raspberry Pi 4, and users have already managed to have the release work […]

Posted on by Debashis Das - No Comments on AMD Versal Premium Gen 2 MoP adaptive SoC integrates 32GB LPDDR5X to shrink board footprint by 60%

AMD Versal Premium Gen 2 MoP adaptive SoC integrates 32GB LPDDR5X to shrink board footprint by 60%

 Versal Premium Gen 2 Memory on Package (MoP) adaptive SoCs

AMD has announced the Versal Premium Gen 2 Memory-on-Package (MoP) adaptive SoCs, adding an integrated memory option to the Premium Gen 2 family, a topic we covered back in November 2024. While the core silicon (dual-core Cortex-A72 + dual-core Cortex-R5F + high-end FPGA fabric) remains the same, the new devices (2VP3422, 2VP3522, and 2VP3622) integrate up to 32 GB of LPDDR5X memory directly inside the package. This removes the need for external high-speed memory on the board and reduces PCB area by up to 60%. This also eliminates high-speed memory routing on the carrier board, increasing the maximum memory bandwidth to 288 GB/s. AMD Versal Premium Gen2 MoP specifications: CPU cores Dual-core Arm Cortex-A72 application core, 48 KB/32 KB L1 Cache w/ parity & ECC; 1 MB L2 Cache w/ ECC Dual-core Arm Cortex R5F, 32 KB/32 KB L1 Cache, and 256 KB TCM w/ECC Memory on Package 32 GB of LPDDR5X DRAM […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Broadcom unveils fully-integrated quad-core Wi-Fi 8 access point SoCs, 5G FWA router reference platform

Broadcom unveils fully-integrated quad-core Wi-Fi 8 access point SoCs, 5G FWA router reference platform

Broadcom Wave 5 BCM6772 BCM6774 BCM6776 WiFi 8 SoC family

Broadcom has launched three new Wi-Fi 8 access point SoCs: the BCM6772 for mass-market Ethernet routers, extenders, and repeaters, the BCM6774 for high-volume Ethernet routers and extenders, and the BCM6776 for premium Ethernet tri-band routers and extenders. The latter is also part of a 5G FWA router platform based on Samsung B1320 5G Modem. Broadcom’s first Wi-Fi 8 chips were introduced in May 2025 for clients and access points, and the company followed up with BCM6714 and BCM6719 dual-band radios earlier this year, and the BCM67142, BCM67192, and BCM68565 chips for low-cost Wi-Fi 8 10 Gbps fiber access points last month. So far, all the Broadcom Wi-Fi 8 chips enable multi-chip solutions with an application processor connected to one or more Wi-Fi 8 chipsets over a PCIe connection. The new BCM677x chips are fully-integrated SoCs with (Armv8>) application cores and 802.11bn connectivity in a single chip, except for 6 GHz […]

Posted on by Debashis Das - 9 Comments on Amlogic A311Y3 octa-core Edge AI SoC features Cortex-A78/A55 cores, 8 TOPS NPU, LPDDR5 support

Amlogic A311Y3 octa-core Edge AI SoC features Cortex-A78/A55 cores, 8 TOPS NPU, LPDDR5 support

Amlogic A311Y3 Octa Core Edge AI SoC

Amlogic has introduced the A311Y3 Edge AI SoC, which seems to be an upgrade over earlier designs such as the A311D and A311D2 used in boards like the Khadas VIM3 and Khadas VIM4. Although not listed on the official Amlogic website, documentation from vendors such as Shenzhen Tomato Technology indicates that the A311Y3 SoC is built around a 6nm process node and features a newer CPU architecture based on Arm Cortex-A78/A55 cores. The SoC integrates an NPU with up to 8 TOPS of compute performance and supports LPDDR5/LPDDR5X memory, which can be used in both processing and Edge AI, compared to earlier A311-series chips. Amlogic A311Y3 specifications CPU 2x Arm Cortex-A78 cores (64KB L1 I-cache, 64KB L1 D-cache, 256KB L2 cache) 6x Arm Cortex-A55 cores (32KB L1 I-cache, 32KB L1 D-cache, 128KB L2 cache) with a shared 2MB L3 cache Neon and Crypto extensions included Co-processors – RISC-V core for system control processing; Built-in […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Linux 7.1 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 7.1 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 7.1 release

Linus Torvalds has just released Linux 7.1 on LKML: So it’s only Sunday morning back home, but it’s Sunday afternoon where I am right now, so I’m doing the 7.1 release at the regular time – just not in the regular timezone. This obviously means that the merge window opens tomorrow, but I’ll be in yet another timezone by then, so timing will all be a bit irregular. Normally I try to front-load the merge window and do as much as possible the first few days – this time I’m not sure that will work out with my laptop and a couple of long flights without internet, but I’ve made sure that I have fetched the early pull requests (thank you – you know who you are), so I will be able to do some of it off-line. Anyway, possible slight hiccups in the merge window aside, the news today […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on OpenCV 5 release – New DNN engine with enhanced ONNX and LLM/VLM support, Intel, Arm, and RISC-V hardware optimizations

OpenCV 5 release – New DNN engine with enhanced ONNX and LLM/VLM support, Intel, Arm, and RISC-V hardware optimizations

OpenCV 5

OpenCV 5 open-source computer vision library has recently been released with a brand-new DNN (Deep Neural Network) engine that provides better ONNX coverage and enables LLM/VLM support. The fifth version of the popular CV library also adds support for Intel, Arm, Qualcomm, and RISC-V hardware acceleration, improved 3D vision, and various new core features such as new data types, real N-dimensional and scalar support, and performance improvements. OpenCV 5’s DNN Engine OpenCV 4.x supports about 22% of ONNX operators, and the new DNN engine in OpenCV 5 brings coverage to over 80%.  That means models with dynamic shapes that used to fail on OpenCV 4.x, should now work, as the 5.x engine was rebuilt around a typed operation graph with proper shape inference, constant folding, and operator fusion. The table below shows the main difference between OpenCV 4.x and OpenCV 5 Since it’s quite a big change, to make sure […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Altera Agilex 9 Direct RF-Series AGRW039 SoC FPGA targets high-performance RF systems

Altera Agilex 9 Direct RF-Series AGRW039 SoC FPGA targets high-performance RF systems

Agilex 9 FGPA Direct RF-Series

Altera’s wideband Agilex 9 Direct RF-Series AGRW039 SoC FPGA is designed for high-performance Radio Frequency (RF) systems in aerospace, defense, and advanced communications systems. It is the fourth device in Altera’s Agilex 9 Direct RF-Series, and compared to the previous generation AGRW027, the new AGRW039 delivers about 45% more logic resources, 45% more DSP resources, and 43% more block RAM. It also integrates a 64Gsps wideband RF, a hard quad-core Cortex-A53 processor, and supports DDR5 and LPDDR5 memory. Agilex 9 Direct RF AGRW039 SoC FPGA key features and specifications: Hardware CPU – Quad-core Arm Cortex-A53 processor @ up to 1.41 GHz FPGA fabric 3.9M logic elements (LEs) 1.3M adaptive logic modules (ALMs) 18,960 M20K memory Blocks 370 Mb M20K memory Size 65,280 MLAB memory count 40 Mb MLAB memory size 24,600 18×19 multipliers 12,300 DSP/AI blocks Single Precision – 18.4 TFLOPS Memory I/F – DDR5, LPDDR5, DDR4 Peripherals PS – […]

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