HydraUSB3 RISC-V MCU board combines USB 3.0 with HSPI and SerDes high-speed interfaces

HydraUSB3 board

Benjamin VERNOUX has launched the HydraUSB3 V1 board based on WCH CH569 RISC-V MCU as a developer platform to experiment with high-speed protocols like HSPI and SerDes through a USB 3.0 interface. It’s the third board from Benjamin we feature here, after the STM32-based HydraBUS and the HydraNFC v2 shield delivering up to 1600 mW for NFC charging and connectivity. The HydraUSB3 v1 is quite different since it does not involve NFC at all, and instead leverages the CH569’s high-speed interfaces including USB 3.0 (5 Gbps), HSPI (3.8Gbps), and SerDes (>1.2Gbps). HydraUSB3 V1 specifications: MCU – WCH CH569 32-bit RISC-V (RISC-V3A) RV32IMAC MCU @ 120MHz with 16KB 32-bit SRAM, 96KB configurable 128-bit SRAM, 448KB code flash, 32KB data flash USB – 1x USB 3.0 host/device port that supports the USB 3.0 SS built-in PHY (5Gbps) and USB 2.0 built-in PHY FS/LS/HS (480Mbps) High-speed I/Os High-Speed Parallel Interface (HSPI) up to […]

Milandr MDR32F02FI is a RISC-V microcontroller for (Russian) electricity meters

Milandr K1986BK025 development kit

Last year, we wrote about the Made-in-Russia Mikron MIK32 RISC-V microcontroller with features similar to STM32L0 Arm Cortex-M0+, and I was recently told that the first fully packed samples are expected for the end of autumn. But it turns out there’s another Russian company that makes RISC-V microcontrollers, and for instance, the Milandr MDR32F02FI features the open-source BM-310 RISC-V MCU core and is specially designed for electricity meters. It is the second generation of the microcontroller with the first being based on Arm Cortex-M0 core and produced for over 5 years. Milandr MDR32F02FI specifications: CPU – CloudBEAR BМ-310S 32-bit RISC-V core @ 60 MHz Memory – 112KB Storage – 256+8 KB flash, 16KB OTP Electricity meter function 7-channel 24-bit sigma-delta ADC Hardware unit for calculating power consumption Other Peripherals 5x UART, 3x SPI, 1x I2C Up to 55x GPIOs Instrumental ADC – 10-bit with temperature sensor 4x 32-bit timer blocks […]

Linux 5.19 Release – Main changes, Arm, RISC-V and MIPS architectures

Linux 5.19 release arm risc-v mips

Linus Torvalds has just announced the release of Linux 5.19. It should be the last 5.xx version, with Linux 6.0 coming for the next cycle: So here we are, one week late, and 5.19 is tagged and pushed out. The full shortlog (just from rc8, obviously not all of 5.19) is below, but I can happily report that there is nothing really interesting in there. A lot of random small stuff. In the diffstat, the loongarch updates stand out, as does another batch of the networking sysctl READ_ONCE() annotations to make some of the data race checker code happy. Other than that it’s really just a mixed bag of various odds and ends. On a personal note, the most interesting part here is that I did the release (and am writing this) on an arm64 laptop. It’s something I’ve been waiting for for a _loong_ time, and it’s finally reality, […]

Pinecil V2 soldering iron gets BL706 Bluetooth LE RISC-V MCU, USB PD EPR support

Pinecil V2 RISC-V soldering iron

PINE64 is about to launch the second generation Pinecil RISC-V soldering iron with the Pinecil V2 featuring a new Bouffalo Lab BL706 RISC-V microcontroller with Bluetooth LE connectivity, optimizations for higher power levels, as well as tentative support for the new USB PD EPR standard (Extended Power Range) working at up to 28V. I don’t solder every day, but when I do, I use my Pinecil soldering iron, as it’s heating super fast and does the job, and in my case, works quite better than the TS100 soldering iron. So it should come as no surprise that the Pincel is the most popular consumer hardware from the PINE64 community (after SOPine modules), and the new Pinecil V2 is a welcome upgrading building on the same design but with Bluetooth LE connectivity and a lower tip resistance. Pinecil V2 preliminary specifications: MCU – Bouffalo Lab BL706 32-bit RISC-V microcontroller @ 144 […]

YD-CH32V307VCT6 RISC-V MCU board comes with Ethernet and plenty of I/Os

VCC-GND Studio CH32V307 RISC-V Ethernet board

At the beginning of the year, we wrote about WCH CH32V307 RISC-V microcontroller and a development board with 8 UART ports controlled over Ethernet. I’ve now been informed of a similar, but much more compact by VCC-GND Studio named “YD-CH32V307VCT6”. Besides the 144 MHz RISC-V microcontroller, the board features a 10Mbps Ethernet port, two USB Type-C ports, SPI flash, EEPROM, a microSD card socket, and four rows of 24 pins each for a total of 96 pins exposing all pins out of the LQFP100 package. YD-CH32V307VCT6 board specifications: MCU – WCH CH32V307VCT6 32-bit RISC-V microcontroller @ 144 MHz with 256K Flash, 64K SRAM Storage – 32Mbit SPI NOR flash (W25Q32), 64kbit EEPROM (24C64), MicroSD card slot Networking – 10 Mbps Ethernet USB – 1x USB 2.0 Type-C port (High Speed: 480 Mbps), 1x USB 2.0 Type-C port (Full Speed: 12 Mbps) Expansion – 2x 48-pin headers with 2 x 12-bit […]

RISC-X? Top Chinese scientist discusses potential for RISC-V fork in extreme case

RISC-X

Is RISC-X next? Bao Yungang, a professor and scientist at the Chinese Academy of Sciences and the secretary-general of the China RISC-V Alliance, has suggested RISC-V related standard specifications can be bifurcated into a new RISC-X standard independently developed in China for the “Belt and Road” countries. [Update July 9, 2022: The title has been updated, as Bao Yungang only answered a hypothetical question, and the screenshot below from a slack (maybe internal) shows SCMP may have misunderstood his meaning, and China would have no need to fork RISC-V based on how licensing works. I’ve also been given the link to Bao Yungang’s Zhuhi account, and there’s no mention of “RISC-X”. I’ve left the rest of the post unchanged for reference and general discussion about the topic] The world has become more complicated with new sanctions imposed nearly every week, and those include not only primary sanctions but also secondary […]

Seeed Studio outs $5 XIAO ESP32C3 board with WiFi and BLE, battery support

XIAO-ESP32C3

Seeed Studio’s XIAO family of tiny MCU boards expands with the XIAO ESP32C3 board equipped with ESP32-C3 WiFi and Bluetooth LE (BLE) microcontroller, support for LiPo batteries, and following the same 21 x 17.5mm form factor. If I’m counting right, this is the fifth member following the original XIAO based on Microchip SAMD21G18 Cortex-M0+ MCU, XIAO RP2040, and the nRF52840-based XIAO BLE and XIAO BLE Sense boards which I tested with Edge Impulse. XIAO ESP32C3 specifications: Wireless MCU –  Espressif Systems ESP32-C3 single-core RISC-V microcontroller @ 160 MHz with 400KB SRAM, 384KB ROM, 4MB flash Wi-Fi 4 & Bluetooth LE 5.0 connectivity Antenna – External u.FL antenna USB – USB Type-C port for power and programming Expansion I/Os 2x 7-pin headers with 1x UART, 1x I2C, 1x SPI, 11x GPIO (PWM), 4x ADC, I2S 3.3V I/O voltage (not 5V tolerant) Debugging – JTAG pads Misc – Reset button, Boot button, […]

ROMA Linux laptop to feature quad-core RISC-V SoC, support Web3, NFT, cryptocurrencies, etc…

ROMA RISC-V laptop for developers

ROMA is an upcoming Linux laptop equipped with an unnamed quad-core RISC-V processor with GPU and NPU, up to 16GB RAM, 256GB storage, primarily aimed at software developers, and with Web3 technology integration. The ROMA laptop will be born out of the collaboration between DeepComputing working on engineering and Xcalibyte taking care of system tuning, plus PW (assembly), ECP (security), XC (crypto), Rexeen (voice), and the LatticeX Foundation (PoS blockchain, NFT). ROMA laptop preliminary specifications: SoC – Quad-core RISC-V CPU with  GPU for graphics, NPU for AI (12nm chip for the Pro model, 28nm chip for the Standard model) System Memory – 16GB LPDDR4/LPDDR4X RAM Storage – 256GB eMMC flash Security – Arm SC300 security enclave processor Display, keyboard, touchpad I agree that’s a bit light on details. We’re told the laptop will support most Linux operating systems and the company will offer free SoC and SoM upgrades, as well […]