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October 21, 2025October 20, 2025 by Debashis Das - 3 Comments

Upbeat introduces UP201 and UP301 ultra-low power RISC-V MCUs with always-on AI processing

Upbeat UP201 and UP301 Series AI MCUs No BG

Upbeat Technology, in collaboration with SiFive, has introduced UP201 and UP301 always-on AI MCUs for ultra-low-power AI and IoT applications such as wearables, drones, and sensor-based systems. The UP201 is designed for compact, battery-driven devices such as smartwatches, hearing aids, and IoT sensor nodes, whereas the UP301 targets AI and vision-based applications for more complex edge systems such as smart glasses, robotics, and industrial AI equipment. Both chips feature a dual-core RISC-V architecture. The SiFive E21 lightweight core is Always-On (AON), managing continuous low-power sensing, whereas the SiFive E34 performance core activates for higher workloads. The MCUs also integrate a 2.5D GPU and various I/O options. UP201 and UP301 MCU specifications: CPU cores (SiFive Essential RISC-V IP cores) E21 core in Always-On (AON) domain for continuous low-power sensing E34 performance core in the Non-AON domain for higher workloads Up to 400 MHz operating frequency Up to 717 DMIPS performance Near-threshold […]

September 8, 2025September 8, 2025 by Jean-Luc Aufranc (CNXSoft) - 1 Comment

SiFive introduces 2nd Gen Intelligence RISC-V AI CPUs: X160, X180, X280 Gen 2, X390 Gen 2, and XM Gen 2

SiFive Intelligence X180 Gen 2 Core Complex

SiFive has just launched its 2nd Generation Intelligence family, featuring five new RISC-V-based products: the new X160 Gen 2 and X180 Gen 2, and upgraded X280 Gen 2, X390 Gen 2, and XM Gen 2 processors, all featuring scalar, vector, and matrix processing (XM only) capabilities designed for AI workloads. The original Intelligence X280 64-bit RISC-V CPU was introduced in 2021, following the Intelligence X390 NPU in 2023, and the Intelligence XM Series in September 2024. The X160 Gen 2 (32-bit) and X180 Gen 2 (64-bit) are entry-level AIoT CU cores targeting edge compute and IoT applications for automotive, autonomous robotics, industrial automation, and smart IoT applications. The upgrade models get support for the RVA23 profile and a few other changes. SiFive X160/X180 Gen 2 CPUs Key features and specifications: Scalar processing Intelligence X160 Gen 2 – 32-bit RISC-V ISA (RV32I) Intelligence X180 Gen 2 – 64-bit RISC-V ISA (RV64I) Dual […]

July 28, 2025 by Jean-Luc Aufranc (CNXSoft) - 5 Comments

Linux 6.16 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linus Torvalds has just announced the release of Linux 6.16 on LKML: It’s Sunday afternoon, and the release cycle has come to an end. Last week was nice and calm, and there were no big show-stopper surprises to keep us from the regular schedule, so I’ve tagged and pushed out 6.16 as planned. It’s worth noting that the upcoming merge window for 6.17 is going to be slightly chaotic for me: I have multiple family events this August (a wedding and a big birthday), and with said family being spread not only across the US, but in Finland too, I’m spending about half the month traveling. That means that I will try very hard to get most of the merge window done the first week before my travels start, and I already ended upgiving a heads-up on that to the people who tend to send me the most pull requests. […]

October 28, 2024October 28, 2024 by Sayantan Nandy - No Comments

Microchip PIC64HX1000 64-bit RISC-V AI MPU delivers post-quantum security for aerospace, defense, and automotive applications

Microchip recently unveiled the PIC64HX1000 64-bit RISC-V AI microprocessor (MPU) family designed for mission-critical intelligent edge applications in the aerospace, defense, industrial, and medical sectors thanks to a quantum-resistant design. These new MPUs feature eight SiFive’s Intelligence X280 cores, each clocked at 1 GHz. The MPUs are engineered with a decoupled vector pipeline enabling 512-bit operations enabling the PIC64HX1000 to achieve up to 2 TOPS for AI/ML processing and come equipped with integrated Time-Sensitive Networking (TSN) Ethernet connectivity. This new microprocessor includes a dedicated system controller for runtime monitoring and fault management, WorldGuard architecture for workload isolation, and post-quantum defense-grade cryptography, which includes the NIST-standardized FIPS 203 and FIPS 204 cryptographic algorithms, ensuring protection against future quantum computing threats. PIC64HX1000 64-bit AI MPU specification MPU variants PIC64HX1000 – IN (Industrial) PIC64HX1000 – AV (Aviation) PIC64HX1000 – MI (Military) CPU – 8x 64-bit RISC-V cores (SiFive X280), up to 1 GHz, […]

October 21, 2024October 22, 2024 by Jean-Luc Aufranc (CNXSoft) - No Comments

HiFive Premier P550 mini-DTX motherboard features ESWIN EIC7700X RISC-V AI SoC, up to 32GB DDR5, a PCIe x16 slot

SiFive HiFive Premier P550 RISC-V mini-DTX motherboard

SiFive HiFive Premier P550 is a mini-DTX (203 x 170mm) motherboard powered by a 1.4 GHz ESWIN EIC7700X quad-core RISC-V SiFive P550 SoC with up to 19.95 TOPS of AI performance, and equipped with up to 32GB LPDDR5 memory and a 128GB eMMC flash all soldered on a system-on-module. The motherboard itself features a SATA III connector for data storage, includes an HDMI 2.0 port for 4K video output, a PCIe Gen3 x16 slot (working at x4), two gigabit Ethernet ports, an M.2 Key-E socket to add a WiFi/Bluetooth card, up to five USB interfaces, and more. HiFive Premier P550 specifications: SoC – ESWIN EIC7700X CPU 4x SiFive Performance P550 RV64GC RISC-V cores @ 1.4GHz (up to 1.8GHz when overclocked) with Cortex-A75-class performance 32KB(I) + 32KB(D) L1 Cache 256KB L2 Cache 4MB shared L3 Cache Cache supports ECC (support SECDED) NPU (Not currently supported in software) – Up to 19.95 […]

July 10, 2024July 10, 2024 by Jean-Luc Aufranc (CNXSoft) - 11 Comments

Microchip PIC64GX is a quad-core 64-bit RISC-V microprocessor for real-time processing

Microchip has introduced its first 64-bit RISC-V microprocessor family with the PIC64GX pin-to-pin compatible with the company’s PolarFire SoC FPGA devices and designed for edge designs for the industrial, automotive, communications, IoT, aerospace, and defense segments. The PIC6GX MPU supports asymmetric multiprocessing (AMP) to run Linux, real-time operating systems, and bare metal in a single processor cluster with secure boot capabilities. The company further claims the PIC64GX MPU is “the first RISC-V multi-core solution that is AMP capable for mixed-criticality systems”. The first member of the PIC64GX RISC-V family is the PIC64GX1000 microprocessor. Microchip PIC64GX1000 specifications: CPU Quad-core SiFive U54 64-bit five-stage, single-issue, in-order pipeline RISC-V (RV64GC) processor at up to 625 MHz with AMP and deterministic latencies, PMP and MMU units Single-core SiFive E51 64-bit RISC-V (RV64IMAC) monitor processor core at up to 625 MHZ with PMP unit Cache L1 memory subsystem with Single-Error Correct, Double-Error Detect (SECDED) Flexible […]

June 26, 2024June 25, 2024 by Jean-Luc Aufranc (CNXSoft) - 6 Comments

SiFive announces Essential Gen4 RISC-V CPUs for embedded applications

As the RISC-V Summit Europe 2024 is underway, SiFive has announced the fourth generation of its “Essential” RISC-V CPUs (Essential Gen4) with improved power efficiency and more flexible interfaces for SoCs used in embedded devices. The update covers 32-bit and 64-bit RISC-V cores including the U6 and U7-series 64-bit application processors, the S2, S6, and S7 64-bit real-time embedded processors, and the E2, E6, and E7 32-bit real-time embedded processors. Essential Gen4 IP keys features: Up to 40% runtime power reduction 8x different baseline embedded 32-bit and 64-bit cores From 2-stage single-issue to 8-stage superscalar Improved L2 cache and enhanced L1 memory Configuration and integration options CPU type, profile, and options On-chip memories selection System, peripheral, and front ports Advanced power management and security Debug and trace Software support includes embedded Linux and FreeRTOS operating systems and Eclipse-based IDE for C/C++ development. That’s another low-quality, light-on technical details announcement from […]

June 19, 2024July 16, 2025 by Jean-Luc Aufranc (CNXSoft) - 2 Comments

ESWIN EIC7700X quad-core RISC-V SoC embeds 19.95 TOPS NPU for Edge AI vision applications

Yesterday we noted Sipeed was working on the LM5A system-on-module powered by ESWIN EIC7700X quad-core RISC-V processor with a ~20 TOPS AI accelerator in order to integrate it into its Lichee Book laptop and other carrier boards. So today, I’ve decided to look into the EIC7700X SoC designed by “BEIJING ESWIN COMPUTING TECHNOLOGY CO., LTD”, or ESWIN for shorts. The EIC770X features four 64-bit RISC-V (RV64GC) cores clocked up to 1.8 GHz, an Imagination AXM-8-256 3D GPU, a 19.95 TOPS NPU, H.265/H.264 video encoder/decoder capable of handling up to 32x 1080p30 videos, various video output (HDMI + DSI) and input interfaces, dual GbE, 4-lane PCIe Gen 3, and more. ESWIN EIC7700X specifications: CPU 4x SiFive Performance P550 RV64GC RISC-V cores @ 1.4GHz (up to 1.8GHz) with Cortex-A75-class performance 32KB(I) + 32KB(D) L1 Cache 256KB L2 Cache 4MB shared L3 Cache Cache supports ECC (supports SECDED) DNN Accelerator – 19.95 TOPS […]