Home > Freescale i.MX, NVidia Tegra 2, Texas Instruments OMAP 3, Texas Instruments OMAP 4 > Toradex Releases Apalis Computer on Module Architecture Specification

Toradex Releases Apalis Computer on Module Architecture Specification

Last month, Toradex released the preliminary specification for Apalis, a Computer on Module (CoM) architecture. Although the Apalis specification has been initially designed with ARM based processors in mind such as the Nvidia Tegra, Freescale i.MX and Texas Instruments OMAP processor families, it aims at being device and chip architecture independent.

Nvidia Tegra Apalis Compliant Module

The Apallis specification defines the following:

  • Interface Specifications:
    • Signal Naming Convention – Rules to name pins (e.g. VCC, PWM1, PWM2, ) which are used for all modules.
    • Signal Definition – Details about the pins named above
    • Physical Pin Definition and Location
  • Mechanical Specifications:
    • Mounting and Fixation
    • Module Size – Standard: 82 x 45mm | Extended: 82 x 56mm
    • Pin Numbering – There is a total of 321 pin numbers (but a few less actually pins)
  • Electrical Specifications:
    • Power Supplies
    • Power Control
    • Back Feed Protection

Apalis Architecture

This specifications also defines mounting mechanisms for active cooling (e.g. heat spreaders) in case those are needed. I could not find licensing information, e.g. creative common, yet. I haven’t really looked into details but it looks like a similar initiative to TechNexion EDM standard. It would be good if companies could agree on one common standard, instead of doing their own, as it partially voids the advantage of having a standard in the first place.

The Apalis specification is still in development, and Toradex may change it based on customer requirements. The specification is freely available on Toradex Apalis Module Architecture page.

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