SD Association Introduces Class A2 Application Performance Class, and UHS-III Standard Supporting Up to 624 MB/s

Users of development boards booting from (micro) SD cards have often missed random I/O performance information to determine whether the device would performance well to run an operating system, but now that Google has implemented “adoptable storage” to let consumer run app from their micro SD cards, it has become an important differentiating factor for manufacturers, and the SD association announced A1 App performance class with minimum random I/O read/write performance and at least 10MB/s  sequential write speed last year. The SD association has now unveiled Class A2 with better I/O performance with minimum requirements of 4000 IOPS for random reads, and 2000 IOPS for random writes, with the same 10 MB/s minimum sequential write speed.

That means the application performance table now looks as shown below. Note that Class A2 is not available right now, and test requirements will be explained in SD 6.1 part 1 physical specification to be released later this year.Compliant (micro) SD cards will be easy to spot with A1 or A2 logo on the card and package. The SD association came to those numbers in collaboration with Google. The main advantage of such cards will be that the app will load faster, and you’ll get less occurrences of “app is not responding” window in Android due to slow I/Os.

Beside performance requirements, Class A2 also brings some new compulsory features:

  • Command Queue
    • Contributes mainly to random read performance
    • Multiple tasks can be handled at one time with arbitrary order
    • New tasks can be assigned during data transmission
  • Cache function
    • Contributes mainly to random write performance
    • Card may use higher speed volatile memory to cache the host data during memory card access operation
  • Self-Maintenance
    • Contributes to better memory access performance
    • Allows internal background data management
    • May be initiated either by card or by the host based on the card’s internal needs

SD Specification 6.0 also introduces the Low Voltage Signaling (LVS) memory card that may support either 3.3V or 1.8V signaling with an auto detection mechanism of the host’s operating signaling level. The new specification allows LVS cards to be backwards compatible to conventional 3.3V signaling hosts. Both Class A2 and LV were announced in the same press release.

SD Cards are still being to store large files such as photos and videos, so sequential performance is still important, and that’s why the SD association also announced UHS-III delivering up to 624 MB/second for applications such as 4K/8K video recording and high resolution 360° videos.


UHS-III is defined in SD specification 6.0. We can notice some extra pins for UHS-II and UHS-III cards in the diagram above, so the host system will have to support this extra bus to benefit from the extra performance.

Charbax interviewed the SD association at Mobile World Congress 2017 where they talked about both announcements.

More details can be found in the SD association’s Application Performance Class and Bus Speed pages. You may be interested in a white paper entitled “Mobile Device Innovations: Application Performance Class Expansion and New Low Voltage Signaling for SD Memory Cards” to find out more.

Thanks to Theguyuk for the tip.

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Benjamin
3 years ago

Thats pretty great to see focus on random performance. Great for SBCs !

Martin
Martin
3 years ago

Can anybody explain the difference between IOPS and MB/s?
Can a card have 10MB/s and a very low IOPS rate and another card with also 10MB/s has a very high IOPS rate?

Jeroen
Jeroen
3 years ago

Are there uhs-II and uhs-III cards also more durable?, and are they backwards compatible so they work on older boards?

tkaiser
tkaiser
3 years ago

Martin : Can a card have 10MB/s and a very low IOPS rate and another card with also 10MB/s has a very high IOPS rate? Yep and that’s still a huge problem. You can get SD cards showing pretty decent sequential performance that totally suck with random IO. If you use the card in a camera then sequential throughput is all that’s important (and that’s SD Association’s so called ‘speed class’) but that’s totally different if we’re talking about embedded devices and especially Android or a ‘Desktop Linux’. When we (Armbian users) tested a lot of SD cards and onboard… Read more »

Mike Schinkel
3 years ago

Do SBCs need to offer different SD Card drives to support this, or is it all in the SD Card itself?

Also, anyone know if there are any cards smaller than 256GB available for these?

tkaiser
tkaiser
3 years ago

@Mike Schinkel Forget about SBC here at the moment. Switching voltages (3.3V vs. 1.8V) is required and controller support is mandatory for performance. SD cards compliant to A2 and even A1 performance class will be bottlenecked by bus limitations on most SBC today since there’s so much protocol/bus overhead if the board’s implementation is not up to date. It’s easy to test: just use a capable IO test with 4K block size (or less) and check sequential transfer speeds. If sequential transfer speeds are already low then random IO will also suffer since the limitation at this stage is already… Read more »

LloydS
LloydS
3 years ago

Does this mean the end for Samsung’s UFS Card that was revealed last year? I hope we are not going to see a VHS/Betamax standards competition develop in the micro storage card market.

tkaiser
tkaiser
3 years ago

@LloydS Why do you compare UHS extensions with UFS? UHS II and III is ‘just’ extending already existing SD standards, needing more pins compared to older modes and it’s all about doubling frequency and bandwidth while remaining backwards compatible whereever possible. UFS is something different, it’s a newer open standard originally meant for internal use only (overcoming limitations of ‘raw NAND’ and eMMC) and just recently JEDEC introduced JESD220-2 standard for removable UFS cards. Samsung currently is the only manufacturer of these cards that are incompatible to both SD protocols and pin-outs. So one part of the chicken-egg problem is… Read more »

tkaiser
tkaiser
3 years ago

Another thing to add: I already mentioned stumbling accross an SD card showing somehow ‘normal’ 4K write IOPS (~100) but horribly low 2 IOPS at 16K size. When we did this testing a while back there were many other SD cards that suffered from the same problem: a mysterious performance drop at 16K block size to below 10 IOPS (affected also many cheap SanDisk cards): https://forum.armbian.com/index.php?/topic/954-sd-card-performance/ Now imagine running a database which uses a 16K page size internally and constant fsync calls to ensure data integrity ‘on disk’. Funnily something like this is happening all the time when running modern… Read more »

LloydS
LloydS
3 years ago

@tkaiser Well, thanks for your lucid reply but my concerns remain. If I were currently designing an Odroid Cx (say), I would need to decide whether to: a) include UHS II or III MicroSD slot and eMMC connector (little change from status quo), or b) leave out the above and include UFS Card slot instead (saving PCB real estate), or c) include a UHS II or III MicroSD slot for backward compatibility and UFS Card slot instead of eMMC connector (most likely?). presuming, of course, that my favoured SoC is capable of supporting all. Sadly, I do see the UFS… Read more »

tkaiser
tkaiser
3 years ago

If you would design a new SBC today and want to implement UFS cards the first you would have to check whether those SoCs that are capable of UFS (those from Samsung’s most recent flagship phones) are even JESD220-2 compliant. If not… then you need new SoCs or (PCIe attached) controllers. So let’s talk in 2019 again if the focus is SBC 🙂 Then the other problem with UFS card acceptance is backwards compatibility. You can take an UHS III card that performs quite well in your most recent gadget and insert it in a 10 years old card reader… Read more »

Drone
Drone
3 years ago

@tkaiser
Depending on the likes of NAND Flash for your OS’s random read/write storage is a bad idea in the first place. Your OS should boot from flash via sequential read, run mostly in SDRAM thereafter, and only write to flash sparingly to reduce wear.

tkaiser
tkaiser
3 years ago

Adata claims to show an SD card compliant to A2 standard: http://industrial.adata.com/a/news/4/

Heise.de just reported they would show the ‘Adata Premier microSD’ with 32, 64 und 128 GB mentioning “up to 4000/2000 IOPS” at Computex which is ‘interesting’ since A2 compliance talks about 4000/2000 IOPS being minimum requirements and not funny ‘up to’ marketing BS. 🙂

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