SiFli SF32LB52J big.LITTLE Arm Cortex-M33 Bluetooth MCU powers the Core Time 2 smartwatch

SiFli SF23LB52J is a Bluetooth 5.3 microcontroller part of the SF32LB52x family with two Cortex-M33 in big.LITTLE configuration with a 240 MHz high-performance core for user application/GUI and a 24 MHz low-power core to manage the Bluetooth part.

A few months ago, Eric Migicovsky, the founder of the smartwatch company Pebble, and now Core Devices, introduced the Core 2 Duo and Core Time 2 smartwatches running PebbleOS open-source firmware that were mostly relaunches of the never-released Pebble 2 and Pebble Time 2 with some tweaks. We already knew the Core 2 Duo would be based on a Nordic nRF52840 Arm Cortex-M4F microcontroller, however, the one for the Core Time 2 was kept secret. That’s until today, as Eric has just announced that the Core Time 2 would be based on the SiFli SF23LB52J MCU, since the smartwatch required an MCU with more RAM and processing power, and SiFli also offers an open-source SDK without any NDA required.

SiFli SF32LB52J block diagram
Block diagram

SiFli SF32LB52x key features and specifications:

  • CPU and Memory
    • High Performance Processor (HCPU) –  Arm Cortex-M33 STAR-MC1 core @ up to 240MHz (up to 370DMIPS, 984 EEMBC CoreMark) with 512 KB SRAM
    • Ultra Low-Power Processor (LCPU) – Arm Cortex-M33 STAR-MC1 core @ up to 24MHz with 64KB SRAM
  • Storage and Memory Interfaces
    • NOR flash up to 96MHz (SiP)
    • OPI-PSRAM up to 144MHz (SiP)
    • MPI (QSPI) for external NOR, NAND, OPI-PSRAM
    • SD/SDIO with support for SD3.0, SDIO3.0, eMMC
  • Graphics and Display
    • 2D/2.5D GPU – ePicaso 2.0 supporting hardware-accelerated rotation, scaling, and mirroring up to 512×512 resolution
    • Lossless Decompression Accelerator—eZIP 2.0
    • LCD Controller
      • Supports 8080, SPI, Dual-SPI, Quad-SPI
      • 1 layer + 1 background layer alpha blending
      • Independent LCD controller, Always-On Display
  • Audio
    • 24-bit Audio DAC supporting 8k to 48kHz sample rates; SNR/dynamic range: 109dB; noise floor: 3.7uVrms
    • 24-bit Audio ADC supporting 8k to 48kHz sample rates; SNR.dynamic range: 99dB
    • 1x I2S, 1x PDM
  • Wireless
    • Dual-mode Bluetooth 5.3
    • BLE audio support
    • Sensitivity – -100dBm (BLE)/1Mbps), -96.3dBm (BR), -95.5dBm (EDR2)
    • Tx power – Up to 13dBm (EDR2/3), 19dBm (BR/BLE)
    • Rx peak current (BR) – 2.4mA @ 3.8V
    • BLE connected – About 50uA
  • Peripherals
    • Up to 45x GPIO
    • 3x UART, 4x I2C, 2s SPI
    • USB 2.0 FS
    • Peripheral Task Controller (PTC)
    • Analog
      • 12-bit general-purpose SAR ADC, 8 channels
      • Temperature sensor
    • DMA
      • General DMA: high efficiency data transfer between internal memory and peripherals
      • extDMA: high efficiency data transfer between internal memory and external memory
    • Timers
      • 2x 16-bit GPTIM, 2x 32-bit BTIM, 32-bit ATIM, 2x 24-bit LPTIM
      • 1x RTC
      • 2x 24-bit WDT, 1x IWDT
  • Security
  • Power Management
    • Highefficiency buck and lowpower LDO
    • 2x external 3.3V power supply LDOs, Max. current 150mA x2
    • Sleep current: 2uA
    • Builtin 560mA lithium battery linear charger, supporting 4.2V4.45V full voltage
    • VBAT voltage range – 3.2V4.7V
    • VBUS voltage range – 4.6V5.5V
  • Package – QFN68L, 44 GPIOs,  7 x 7 x 0.85mm

There’s no public information about the SF32LB52J per se, but a 337-page user manual for the SF32LB52x family is available in English, and the SDK for the SF2 series and source code for Android or iOS apps demonstrating OTA firmware updates can be found on GitHub. The Wiki and documentation for the SDK are only available in Chinese for now, but an English translation is coming soon.

While the Core Time 2 and PebbleOS port are being worked on, you can always get a SL32KB52 development board (SF32LB52-DevKit-LCD-v1.2) to get started. It’s available on AliExpress for about $22 and on Taobao for 99 RMB. The AliExpress listing also has an option for a kit with the board and an LCD for about $32, but I could not find any photos with the display.

SiFli SF32LB52J development boardSF32LB52-DevKit-LCD-v1.2 Core Time 2 development board

But why didn’t Core Devices opt to go with a more powerful Nordic Semi Bluetooth LE SoC instead? It would have made software porting easier, and they considered the nRF54L15 and nRF54H20, but the former only has 256KB of RAM, while the latter was a bit too expensive at $4-5 or more. So they went to look for other vendors, and the main problem was the lack of an open-source SDK and NDA requirements.

They eventually went with SiFli for a range of reasons. First, their chips are custom-made for smartwatches, and they are already found in products from Redmi, Oppo, Noise, and others. Then the set of features of the SF32LB52x was close to perfect for the Core Time 2 requirements with 512KB SRAM, 16MB PSRAM, and a dedicated MIP peripheral for the display, removing the need for a separate FPGA. Finally, the power consumption is low at ~50uA with BLE connected, and the price is low at about $2. Variants with 1 to 2MB SRAM could also be switched to if 512KB RAM ends up not being enough.

Only time will tell, but based on the info we have so far, SiFli SF32 chips may end up being the smartwatches and wearables equivalent to what ESP8266/ESP32 became for IoT applications.

Thanks to Artur for the tip.

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