RISC-V open architecture has made its way into low-cost low power general purpose MCUs such as Gigadevices GD32V or WCH CH32V103, Western Digital hard drives, some AI processors notably Kendryte K210, and even Linux capable boards including Microsemi’s PolarFire SoC Icicle kit. But more applications featuring RISC-V architecture are coming with, for instance, WCH CH569 RISC-V processor featuring USB 3.0, Gigabit Ethernet, DVP camera, and 1.25 SERDES block all managed by a RISC-V core clocked at 120 MHz. CH569 (and CH565) processor key features and specifications: CPU – RISC-V (RISC-V3A) core @ 120MHz with hardware multiplication and division, programmable interrupt controller, low-power two-stage pipeline Memory – 16KB 32-bit SRAM, 32/64/96KB configurable 128-bit SRAM Storage Internal – 448KB code flash, 32KB data flash External – SD/eMMC controller with single-wire, 4-wire, 8-wire data communication mode. Complies with eMMC card 4.4 and 4.5.1 specifications, and compatible with 5.0 specifications Networking – Gigabit Ethernet […]
WCH CH569 RISC-V SoC Offers USB 3.0, Gigabit Ethernet, High-Speed SERDES & HSPI Interfaces
