Imagination Technologies to design RISC-V cores

Imagination RISC-V

Now better known for its PowerVR embedded GPUs, Imagination Technologies tried to enter the CPU market by purchasing MIPS Technologies and introducing microAptiv, interAptiv, and proAptiv cores in 2012. It did not end up well, as the company had to sell its MIPS technology a few years later, and the MIPS architecture is now barely supported. But Imagination is now working on getting back into the CPU space by designing RISC-V cores. At least that’s what the company revealed in a press release also announcing overall revenues increased by 55% to $76m in H1 2021, with $70m in cash, and no external third-party debt. This year Imagination is re-entering the CPU market with designs based around the RISC-V open ISA. Imagination’s heritage in CPU enables it to provide innovative and patent protected technologies for the discrete CPU market as well as addressing demand for heterogeneous solutions that combine GPU, CPU […]

Intel Alder Lake hybrid mobile processor family to range from 5W to 55W TDP (leak)

Intel Alder Lake Mobile Hybrid Processors

Intel’s first foray into hybrid processors using Foveros 3D stacking technology did not end well with the company just announcing the end of the life for Lakefield hybrid processors. But the company is not giving up on hybrid technology, and a recent leak shows the Intel Alder Lake family comprised of more powerful mobile hybrid processors will be offered for a wide range of applications from tablets with 5-7W M5 processors and up to “muscle laptops” or mobile workstations (MWS) with H55 processor at 45-55W TDP. Alder Lake hybrid processors will be comprised of high-performance CPU “Golden Cove” cores and energy-efficient Atom-based “Gracemont” CPU cores, in a way that’s similar to Arm’s Cortex-A7x big cores and Cortex-A5x LITTLE cores with big.LITTLE or DynamIQ processing with the goal of optimizing power consumption. The Intel Alder Lake Mobile SKU stack includes processors for 6 market segments including three “new” segments/TDP ranges according […]

First Armv9 cores unveiled – Cortex-A510, Cortex-A710, Cortex-X2

Armv9 Cortex-A510 Cortex-A710 Cortex-X2

Armv9 architecture was announced in Q1 2021, building upon Armv8 but adding blocks and instructions for artificial intelligence, security, and “specialized compute”, i.e. hardware accelerators or instructions optimized for specific tasks. The company has now introduced the first three Armv9 cores with Cortex-X2, Cortex-A710, and Cortex-A510 cores, providing updates to respectively Cortex-X1, Cortex-A78, and Cortex-A55 cores. The company calls those new cores “Arm Total Compute solutions”. Arm Cortex-X2 flagship core is the company’s most powerful CPU so far with 30% performance improvements over Cortex-X1 and will be found in premium smartphones and laptops. Arm Cortex-A710 “big” CPU core provides a 30% energy efficiency gain and 10% uplift in performance compared to Cortex-A78, while Arm Cortex-A510, high efficiency “LITTLE” Armv9 core delivers up to 35% performance improvements and over 3x uplift in ML performance compared to Cortex-A55 announced four years ago, or about the same performance as the “big” Cortex-A73 cores […]

Semiconductors lead times in March 2021

As we previously mentioned previously there is a serious chip shortage that will lead to supply issues and higher prices for single board computers and other electronics products. A few days ago, Hardkernel had o increase the price for ODROID boards using DDR4 memory with increases of $3 to $4 for ODROID-N2+, ODROID-C4, and ODROID-HC4 boards. But besides price increase, some semiconductors will not be available at any price with extended periods as lead times of up to 52 weeks have been reported as shown in the table below, obtained from a trusted, anonymous source, which I have translated from Chinese. Every manufacturer is impacted, but items highlighted in red are severely impacted. Since include processors from Qualcomm, STMicroelectronics, and NXP, as well as Broadcom wireless chips which are found in nearly every SBC with WiFi or Bluetooth through Ampak modules. Here’s the source image in Chinese for reference. Jean-Luc […]

Renesas RZ/G2L MPUs Feature Cortex-A55 & Cortex-M33 Cores for AI Applications

Block Diagram of RZ-G2L

Renesas Electronics Corporation announced RZ/G2L MPUs, allowing enhanced processing for an extensive variety of AI applications. The RZ/G2L group of 64-bit MPUs includes three new MPU models featuring Arm Cortex-A55, and an optional Cortex-M33 core. These are RZ/G2L, RZ/G2LC, and RZ/G2UL MPUs. The Cortex-A55 CPU core typically delivers approximately 20 percent improved processing performance compared with the previous Cortex-A53 core, and according to Renesas, is around six times faster in “essential processing for AI applications”. The company already has four mid to high-end design level MPUs including RZ/G2E, RZ/G2N, RZ/G2M, and RZ/G2H, with combinations of Cortex-A53 and Cortex-A57 cores. The new RZ/G2L group of three MPUs forms the entry-level design with Cortex-A55. Hence, the seven MPU models together provide scalability from entry-level to high-end design. Common Key Features in RZ/G2L, RZ/G2LC, and RZ/G2UL MPUs Up to 2x Cortex-A55 cores Cortex-M33 core Camera interface (MIPI-CSI) Display interface (Parallel-IF) USB2.0 interface 2ch, […]

Arm Announces Cortex-A78AE CPU, Mali-G78AE GPU & Mali-C71AE ISP for autonomous automotive & industrial applications


Arm has announced new CPU, GPU, and ISP specifically designed for autonomous automotive and industrial applications with respectively Cortex-A78AE CPU, Arm Mali-G78AE GPU, and Arm Mali-C71AE ISP. Arm Cortex-A78AE CPU Key features and specifications: Architecture – Armv8.2-A (AArch32 at ELO only) Extensions – Armv8.1, Armv8.2, and Armv8.3 extensions (LDAPR instructions only), RAS extensions, Armv8.4 Dot Product, Cryptography extensions, RAS extensions Microarchitecture Up to 4x CPU cores per cluster Out of order pipeline Neon / Floating Point Unit included with INT8 Dot Product and IEEE FP16 Optional Cryptography Unit 48-bit Physical Addressing (PA) Memory system and external interfaces 32kB to 64kB L1 I-Cache / D-Cache 256kB to 512kB L2 Cache Optional 512kB to 4MB L3 Cache ECC Support LPAE Bus interfaces – AMBA ACE or CHI Optional ACP, peripheral port Functional Safety Support – ASIL D Systematic1 and ASIL D Diagnostic2 Security – TrustZone Interrupts – External GICv4 Generic timer – […]

Arm Announces Cortex-A78 CPU, Mali-G78 GPU, Ethos-N78 NPU and Custom Cortex-X1 Core

Arm Cortex A78

Arm has just announced its 2020 Arm Mobile IP portfolio with no less than five IP blocks including Arm Cortex-A78 CPU, Arm Mali-G78 and G68 GPUs, Arm Ethos-N78 neural processing unit, and the custom Cortex-X program starting with Cortex-X1, the most powerful Arm core to date. Arm Cortex-A78 CPU Cortex-A78 highlights: Architecture –  Armv8-A (Harvard) Extensions – Armv8.1, Armv8.2, Cryptography, and RAS; Armv8.3 (LDAPR instructions only) ISA support – A64, A32, and T32 (at EL0 only) Microarchitecture Pipeline – Out of order Superscalar Neon / Floating Point Unit Optional cryptography Unit Max number of CPUs in cluster – 4 Physical Addressing (PA) – 40-bit Memory system and external interfaces 32KB to 64KB L1 I-Cache / D-Cache 256KB to 512KB L2 Cache Optional 512KB to 4MB L3 Cache ECC and LPAE support Trustzone security Cortex-A78 delivers 20% extra performance compared to Cortex-A77 at the same power budget (one Watt), but peak […]

ICube MVP SoCs Combine CPU and GPU into a Single Unified Processing Unit (UPU)

ICube is a fabless semiconductor company developing SoCs featuring a Unified Processing Unit (UPU) that takes care of the tasks usually handle by separate CPU and GPU on typical SoCs. The UPUs are based on MVP (Multi-thread Virtual Pipeline) instruction set architecture, and are themselves called MVP cores. The company has now two SoCs based on UPU MVP cores: IC3128 and IC3228. IC3128 is a single core / 4 thread SoC, and IC3228 is a dual MVP core / 8 threads SoC. Let’s have a look at IC3228 technical specifications: CPU function 4-way simultaneous multi-threading (SMT) in each core Symmetric-multi-processing (SMP), dual MVP cores 64KB I-cache, 64KB D-cache and 64KB local memory in each core, 256KB shared L2 cache Homogeneous parallel programs Support Pthread, OpenMP GPU function Data parallel, Task parallel, and/or Function parallel computing Multi-standard media processor Programmable unified shader Support OpenGL ES 2.0 70 million triangles / sec, […]