Trying out Edge Impulse machine learning platform on XIAO BLE Sense board

double-sided sticky tape boards

I had seen the Edge Impulse development platform for machine learning on edge devices being used by several boards, but I hadn’t had an opportunity to try it out so far. So when Seeed Studio asked me whether I’d be interested to test the nRF52840-powered XIAO BLE Sense board, I thought it might be a good idea to review it with Edge Impulse as I had seen a motion/gesture recognition demo on the board. It was quite a challenge as it took me four months to complete the review from the time Seeed Studio first contacted me, mostly due to poor communications from DHL causing the first boards to go to customs’ heaven, then wasting time with some of the worse instructions I had seen in a long time (now fixed), and other reviews getting in the way. But I finally managed to get it working (sort of), so let’s […]

FOMO (Faster Objects, More Objects) enables real-time object detection on low-end embedded systems

FOMO face detection

FOMO used to stand for “Fear Of Missing Out” in my corner of the Internet, but Edge Impulse’s FOMO is completely different, as the “Faster Object, More Objects” model is designed to lower the footprint and improve the performance of object detection on resource-constrained embedded systems. The company says FOMO is 30x faster than MobileNet SSD and works on systems with less than 200K of RAM available. Edge Impulse explains the FOMO model provides a variant between basic image classification (e.g. is there a face in the image?) and more complex object detection (how many faces are in the image, if any, and where and what size are they?). That’s basically a simplified version of object detection where we’ll know the position of the objects in the image, but not their sizes. So instead of seeing the usual bounding box while the model is running, the face position will be […]

Maple Eye ESP32-S3 board offers 2MP camera, microphone, and two LCD displays

Maple Eye ESP32-S3 camera displays

AnalogLamb Maple Eye ESP32-S3 is a WiFi and Bluetooth connected board based on ESP32-S3 dual-core Xtensa LX7 microcontroller and equipped with one 2MP camera, one microphone, and two LCD displays placed on each side of the board. Those features, plus 8MB of flash and an 8 MB Octal PSRAM, allow the board to make good use of ESP32-S3 AI instructions through the ESP-DL library found in ESP-WHO framework in order to speed up face detection and recognition algorithms, or for audio processing. Maple Eye ESP32-S3 specifications: Wireless module – ESP32-S3-WROOM-1 module with ESP32-S3 dual-core Xtensa LX7 processor @ up to 240 MHz integrating vector instructions  for AI acceleration, 512 KB SRAM, 8MB PSRAM & 8MB Octal SPI Flash Storage – MicroSD card interface Displays – 2x 1.3-inch TFT LCD displays, selectable by switch Camera – 2MP OV2640 camera Audio – Digital microphone for VAD (voice activity detection) & ASR (automatic […]

Codasip L31 and L11 RISC-V cores for AI/ML support TFLite Micro, customizations

Codasip L31 L11

Codasip has announced the L31 and L11 low-power embedded RISC-V processor cores optimized for customization of AI/ML IoT edge applications with power and size constraints. The company further explains the new L31/L11 RISC-V cores can run Google’s TensorFlow Lite for Microcontrollers (TFLite Micro) and can be optimized for specific applications through Codasip Studio RISC-V design tools. As I understand it, this can be done by the customers themselves thanks to a full architecture license as stated by Codasip CTO, Zdeněk Přikryl: Licensing the CodAL description of a RISC-V core gives Codasip customers a full architecture license enabling both the ISA and microarchitecture to be customized. The new L11/31 cores make it even easier to add features our customers were asking for, such as edge AI, into the smallest, lowest power embedded processor designs. The ability to customize the cores is important for AI and ML applications since the data types, […]

STMicro Intelligent Sensor Processing Unit (ISPU) combines MEMS sensor with DSP for AI “in the edge”

ISPU flexibility, low-power, data transfer

STMicroelectronics’ Intelligent Sensor Processing Unit (ISPU) is a single chip that combines a MEMS sensor together with a Digital Signal Processor (DSP) designed to run AI algorithms to let the chip make electronic decisions “in the edge” without help from the cloud or a local gateway. The ISPU is said to offer a smaller size compared to system-in-package devices, cut power consumption by up to 80%, and according to STMicro, launch the new “Onlife era” following the “Offline era” of the 2000’s where sensors were controlled by MCUs without network connectivity and the “Online era” in the 2010’s when sensors became connected to the cloud or a local gateway. ISPU key features: Enhanced 32-bit RISC Harvard architecture Extensible at the chip design phase with dedicated instructions or HW components Frequency / ODR (Output Data Rate) max – 5 MHz / 3.33 kHz – 10 MHz / 6.66kHz Four-stage pipeline 16-bit […]

Silicon Labs BG24 and MG24 2.4 GHz wireless MCU’s quadruple AI performance at a fraction of the energy

Silicon Labs BG24 & MG24 block diagram

Machine Learning is getting everywhere including into 2.4GHz wireless microcontrollers with SIlicon Labds BG24 Bluetooth and MG24 multi-protocol Cortex-M33 microcontrollers that improve AI/ML performance by 4 times using 1/6th of the energy thanks to a built-in AI accelerator. That makes the new microcontrollers suitable for battery-powered edge AI devices with support for Matter (coming soon) as well as PSA Level 3 Secure Vault protection. Silicon Labs expects the chips to be found in various smart home, medical and industrial applications. BG24 and MG24 share the same block diagram and the same specifications apart from the supported wireless protocols: MCU core – Arm Cortex-M33 @ 78.0 MHz with DSP instruction and floating-point unit Memory – Up to 256 kB RAM data memory Storage – Up to 1536 kB flash program memory Wireless CPU – Arm Cortex-M0+ 2.4 GHz Radio Performance -104.5 dBm sensitivity @ 250 kbps O-QPSK DSSS -104.9 dBm sensitivity […]

MYIR introduces i.MX 8M Plus module and devkit with AI/ML capabilities

MYIR i.MX 8M Plus development kit

There are already plenty of i.MX 8M Plus systems-on-module, but here’s one more courtesy of MYIR Tech with MYC-JX8MPQ i.MX 8M Plus module with as well as MYD-JX8MPQ development board for evaluating the solution. The module is especially well suited to applications leveraging Artificial Intelligence (AI) and Machine Learning (ML) with the NXP Cortex-A53/M7 integrating a 2.3 TOPS Neural Processing Unit (NPU). The module comes with up to 6GB LPDDR4, 128GB eMMC flash, 32MB QSPI flash, a PMIC for power management, as well as a 314-pin MXM 3.0 connector exposing the I/Os from the processor. MYC-JX8MPQ module specifications: SoC – NXP i.MX 8M Plus (MIMX8ML8CVNKZAB) quad-core Cortex-A53 processor @ 1.6 GHz, real-time Arm Cortex-M7 co-processor @ 800 MHz, 2.3 TOPS AI accelerator, 2D/3D GPU, HiFi4 Audio DSP, and 1080p VPU System Memory – 3GB LPDDR4 (option up to 6GB) Storage – 8GB eMMC flash (option up to 128GB), 32MB QSPI […]

StarFive Dubhe 64-bit RISC-V core to be found in 12nm, 2 GHz processors

StarFive Dubhe RISC-V Core

StarFive has just announced customers’ delivery of the 64-bit RISC-V Dubhe core based on RV64GC ISA plus bit manipulation, user-level interrupts, as well as the latest Vector 1.0 (V) and Hypervisor (H) instructions. StarFive Dubhe can be clocked up to 2 GHz on a 12nm TSMC process node, and the company also released performance numbers with a SPECint2006 score of 8.9/GHz, a Dhrystone score of 6.6 DMIPS/MHz, and a CoreMark score of 7.6/MHz. A third-party source told CNX Software it should be equivalent to the SiFive Performance P550 RISC-V core announced last summer, itself comparable to Cortex-A75. StarFive Dubhe highlights: Typical frequency – 2.0 GHz @ TSMC 12nm “Industry-leading” Power and Area Efficiency (TSMC 12nm) RISC-V Vector Extension Data types: floating point, fixed point and integer VLEN=128-1024bits ALU & data path width=128 or 256 bits Full vector register grouping (LMUL) support RISC-V Virtualization Extension Pre-integrated Multi-Core with Memory Coherency Support […]