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Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Linux 7.1 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 7.1 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 7.1 release

Linus Torvalds has just released Linux 7.1 on LKML: So it’s only Sunday morning back home, but it’s Sunday afternoon where I am right now, so I’m doing the 7.1 release at the regular time – just not in the regular timezone. This obviously means that the merge window opens tomorrow, but I’ll be in yet another timezone by then, so timing will all be a bit irregular. Normally I try to front-load the merge window and do as much as possible the first few days – this time I’m not sure that will work out with my laptop and a couple of long flights without internet, but I’ve made sure that I have fetched the early pull requests (thank you – you know who you are), so I will be able to do some of it off-line. Anyway, possible slight hiccups in the merge window aside, the news today […]

Posted on by Debashis Das - No Comments on Microchip dsPIC33CK low-cost motor control MCU sells for $0.51 and up

Microchip dsPIC33CK low-cost motor control MCU sells for $0.51 and up

Microchip dsPIC33CK low cost Value Line DSC motor controller

Microchip has expanded its dsPIC33 lineup with the dsPIC33CK Value Line family, a new series of low-cost 16-bit digital signal controllers (DSCs) designed for motor control applications. The devices deliver up to 100 MIPS of deterministic performance and integrate high-resolution PWM and a 12-bit ADC, making them suitable for motor Field-Oriented Control (FOC) and precision sensing tasks. These DSCs are designed to bridge the gap between basic microcontrollers and higher-end dsPIC33A devices. It offers flash memory from 32 KB to 256 KB, supports function consolidation to reduce component count and BOM cost, and is available in automotive-grade (AEC-Q100 Grade 1) versions with secure boot. Microchip dsPIC33CK specifications: MCU Core – 16-Bit dsPIC33CK CPU operating up to 100 MHz / 100 MIPS and DSP with 40-bit wide accumulators Memory & Storage 8 KB to 16 KB Data RAM 32 KB to 256 KB Program Flash with Error Correction Code (ECC) 384 […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on Microchip launches LAN878x and LAN888x Single Pair Ethernet (SPE) transceivers with MACSec, TSN, and FuSA

Microchip launches LAN878x and LAN888x Single Pair Ethernet (SPE) transceivers with MACSec, TSN, and FuSA

Microchip LAN878x LAN888x Single Pair Ethernet SPE PHY transceivers

Microchip’s LAN878x 100BASE-T1 and LAN888x 1000BASE-T1 Single Pair Ethernet (SPE) PHY transceivers are designed for secure, scalable, and deterministic Ethernet connectivity for automotive, avionics, robotics, and industrial systems. We first noticed Microchip SPE solutions in 2023 with the LAN8650/LAN8651 10BASE-T1S and LAN8770 100BASE-T1 transceivers, and they’ve launched other families since then, such as the LAN887x industrial Single Pair Gigabit Ethernet transceivers. The just-announced LAN878x/LAN88x parts introduce MACsec support, as well as Time Sensitive Networking (TSN) and FuSa (Functional Safety). Microchip LAN878x and LAN888x key features and specifications: Standard and port speed LAN878x – IEEE 802.3bw, 100BASE-T1 LAN888x – IEEE 802.3bp, 1000BASE-T1 MACsec compliant to IEEE 802.1AE-2018 (M Version Only) Time Sensitive Networking (TSN) support Host interface (one or the other, depending on SKU) SGMII (Serial Gigabit Media Independent Interface) RGMII (Reduced Gigabit Media Independent Interface) OPEN Alliance TC10 support / wake-up support IEEE 802.1AS-2020, 802.1AS-2011 ASIL B Functional Safety Ready with […]

Posted on by Debashis Das - 2 Comments on Microchip PIC16F132 and PIC18-Q35 low-power 8-bit MCUs feature CPLD-like Configurable Logic Blocks (CLB)

Microchip PIC16F132 and PIC18-Q35 low-power 8-bit MCUs feature CPLD-like Configurable Logic Blocks (CLB)

PIC16F13276 and PIC18 Q35 families of Configurable Logic Block MCUs

Microchip Technology has introduced the PIC16F132 and PIC18-Q35 8-bit families of MCUs, as an upgrade over the PIC16F13145, which combine traditional embedded control with integrated Configurable Logic Blocks (CLB), to bring CPLD-like programmable logic directly onto the microcontroller die. The main difference between the two families is in logic density, where the PIC16F132x includes 32 Basic Logic Elements (BLEs), and the PIC18-Q35 offers 128 BLEs. Alongside the CLB, these MCUs also integrate security and voltage management features. Programming and Debugging Interface Disable (PDID) provides anti-tamper protection against unauthorized firmware access, and Multi-Voltage I/O (MVIO) allows direct communication across different voltage domains without external level shifters. The company also mentions that by executing logic functions on dedicated hardware rather than in software, the CLB architecture reduces CPU load and power consumption while ensuring deterministic behavior. This makes the devices well-suited for timing-critical applications such as motor control, industrial automation, consumer electronics, […]

Posted on by Debashis Das - 8 Comments on Microchip SAM9X75 Hybrid automotive MCU – Surprisingly ARM9 is still a thing in 2026

Microchip SAM9X75 Hybrid automotive MCU – Surprisingly ARM9 is still a thing in 2026

Microchip SAM9X75D5M ARM9 Hybrid MCU

When Microchip launched the SAM9X60 in 2020, we were surprised to see a new SoC based on a legacy ARM926EJ-S core. But we were even more surprised to see Microchip doubling down with the SAM9X75, a hybrid automotive-qualified (AEC-Q100 Grade 2) System-in-Package (SiP) with the same classic ARM9 core and integrated DDR2 or DDR3L memory. The first part will be the SAM9X75D5M SiP with 512MB on-chip DDR2 RAM, but the company also designed the SAM9X75D1G with 1 Gbit DDR3L and the SAM9X75D2G featuring 2 Gbit DDR3L. The SAM9X75 hybrid ARM9 MCU targets developers who need an MCU-like development environment, while benefiting from higher processing and display capabilities of microprocessors for automotive and e-mobility HMI applications. Microchip SAM9X75D5M specifications: CPU subsystem Core – ARM926EJ-S running up to 800 MHz (significant increase from older 400-600MHz variants) 32 KB data cache, 32 KB instruction cache, and Memory Management Unit (MMU). Memory 512 Mbit […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on Linux 6.19 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 6.19 Release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 6.19

Linus Torvalds has just released Linux 6.19 on the Linux Kernel Mailing List (LKML): No big surprises anywhere last week, so 6.19 is out as expected – just as the US prepares to come to a complete standstill later today watching the latest batch of televised commercials. The betting man would expect them all to be AI-generated, but maybe some enterprising company decides to buck the trend? Doubtful, but there’s always a slight chance. But for anybody outside the US, maybe taking the newest kernel out for a spin instead is an option? I have more than three dozen pull requests for when the merge window opens tomorrow – thank you to all the early maintainers. And as people have mostly figured out, I’m getting to the point where I’m being confused by large numbers (almost running out of fingers and toes again), so the next kernel is going to […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 10 Comments on Microchip PIC32CM PL10 Cortex-M0+ microcontrollers are pin-to-pin compatible with AVR MCUs, support 5V operation

Microchip PIC32CM PL10 Cortex-M0+ microcontrollers are pin-to-pin compatible with AVR MCUs, support 5V operation

Microchip PIC32CM PL10

Microchip has added the PIC32CM PL10 MCUs to its PIC32C Arm Cortex-M0+ microcontroller family. Pin-to-pin compatible with AVR MCUs, the new PL10 MCUs feature a range of Core Independent Peripherals (CIPs), 5V operation, and functional safety (FuSa) compliance. The microcontrollers notably integrate a 12-bit ADC with strong noise immunity, a Peripheral Touch Controller (PTC) for responsive touch applications, and two serial communication interfaces with USART, I2C, and/or SPI support. Target applications include industrial control, building automation, consumer appliances, power tools, and sensor-based systems. Microchip PIC32CM PL10 specifications: MCU core – Arm Cortex-M0+ core up to 24 MHz Memory –  Up to 16 KB SRAM (8 KB in current datasheet) Storage – Up to 128 KB Flash (64 KB in current datasheet) I/Os and peripherals Up to 55x programmable I/O pins Up to 16x external interrupts Multi-Voltage I/Os (MVIO), removing the need for external level shifters Peripheral Touch Controller (PTC)  with […]

Posted on by Debashis Das - 3 Comments on Microchip PIC32-BZ6 BLE 6.0, Thread, and Matter wireless MCU integrates touch and motor control

Microchip PIC32-BZ6 BLE 6.0, Thread, and Matter wireless MCU integrates touch and motor control

Microchip IC32 BZ6 single chip wireless MCU

Microchip has recently introduced the PIC32-BZ6 family of single-chip, multiprotocol wireless MCUs, also available as RF-certified modules, and designed for smart home, industrial automation, and automotive applications. The module supports Bluetooth LE 6.0, IEEE 802.15.4-based Thread and Matter, and proprietary mesh protocols. For wired connectivity, there are two CAN-FD ports, a 10/100 Mbps Ethernet MAC, and a USB 2.0 full-speed transceiver. Other features include CVD-based touch sensing and motor control interfaces for interactive and real-time applications. As a secure MCU, the PIC32-BZ6 integrates a hardware-based security engine, a secure boot ROM, and encryption accelerators, along with OTA update capability for long-term device management. The microcontroller offers up to 54 GPIO pins, multiple pin and package options (up to 132-pin VQFN), and automotive-grade variants rated for -40°C to +125°C operation. Microchip PIC32-BZ6 specifications: MCU Core – 128 MHz Arm Cortex-M4F with FPU and DSP extensions Memory 512 KB multi-port SRAM (with […]