Earlier this month, the P4 KVM project was brought to my attention. It provides IP KVM functionality to a Waveshare ESP32-P4-WIFI6-POE-ETH board when paired with a Toshiba TC358743 HDMI-to-CSI adapter. However, it doesn’t work with the new ESP32-P4 V3.x variants featuring a proper H.264 video encoding implementation, and the developer (Jonathan Rowny) says it’s just a proof-of-concept with many bugs and no security, so I decided to skip it. The good news is that he also encouraged others to fork the project, and Evgenij Spitsyn did just that with the release of the ESP-KVM project, which supports both MJPEG and H.264 encoding and a range of other features. ESP-KVM highlights: Video capture, resolution changes, and MJPEG or H.264 encoding Keyboard, absolute and relative pointer, media keys, copy/paste Touch mode for phones and tablets (trackpad, on-screen keyboard) Multiple viewers, one in control at a time with takeover HTTPS, login, physical password […]
Macintosh emulator works on ESP32-P4 display devkits from M5Stack and Waveshare
ESP32 chips have been used for retro gaming and computing for years, but Austin McChord (Amcchord) adds to that with a Macintosh emulator ported to a couple of ESP32-P4 display devkits. His project is a full port of the BasiliskII Macintosh 68k emulator, bringing classic Mac OS (System 7.x through Mac OS 8.1) to portable ESP32-P4 embedded devices with touchscreen, USB peripherals, and WiFi support through an ESP32-C6 on the boards. The main development platform appears to be the M5Stack Tab5 equipped with a 5-inch touchscreen display with 1280×720 resolution. However, if you need something with a larger screen, the Waveshare ESP32-P4-WIFI6-Touch-LCD-10.1 is also supported, and features a 10.1-inch display with 1280×800 resolution and a 10-point capacitive touchscreen. The actual Mac OS resolutions used are 640×360 and 640×400, respectively, then scaled twice to the native resolution of the display. Highlights of the project: CPU – Motorola 68040 emulation with FPU (68881) […]
Banana Pi BPI-VP10 – A low-cost servo control board based on Fortior FU7512L dual-core RISC-V MCU
Banana Pi BPI-VP10 is a low-cost servo control board based on the Fortior FU7512L RISC-V MCU and the FD6288Q pre-driver chip, designed for industrial control applications that rely on 100W/200W servos. The servo motor control board supports multiple control modes, including pulse/direction, analog, and RS485, and is compatible with absolute encoders (Tamagawa/BiSS-C protocols), incremental encoders, and Hall encoders. The BPI-VP10 board, also called BPI-BJ2403N, aims to provide an easy-to-source platform for developers to experiment with the FU7512L microcontroller and design projects or products around it. Banana Pi BPI-VP10 (FU7512L-SVDriver) specifications: Microcontroller – Fortior Technology FU7512L CPU 32-bit RISC-V core @ 48 MHz ME2 motor engine core @ 48 MHz with FOC module and CORDIC module Memory – 12kB SRAM, 4kB PRAM for program execution Storage – 64kB Flash with ECC and CRC, self-programming, and code protection Encoder Support – Absolute encoders (Tamagawa/BiSS-C protocols), incremental encoders, and Hall encoders. Pulse Input – […]
OpenC6 BIOS project brings PC-like firmware to ESP32-C6 MCU with network boot and OTA update support
OpenC6 BIOS is an open-source project by Rompass that takes a different approach to MCU development. It adds a BIOS-like system to the ESP32-C6, so the system part and application code can run separately rather than being combined into a single firmware image. In traditional development, hardware setup, networking, and application code are combined into a single firmware image. But the OpenC6 BIOS operates differently: it runs as the base system on the ESP32-C6 and handles hardware initialization and system functions. Instead of flashing a full application each time, it can load small payload programs separately. These payloads can run from RAM or flash (XIP) and use system functions through a simple Application Binary Interface (ABI), without needing the full firmware. In some ways, it operates like AkiraOS, but with a BIOS-like interface. Key features of the OpenC6 BIOS architecture: Dynamic CPU scaling – Adjusts CPU frequency based on load […]
SpacemiT K3 Pico-ITX RISC-V Chassis Kit Review – Part 2: What works, what doesn’t in Bianbu OS 4.0
Last month, I received the SpacemiT K3 Pico-ITX Chassis Kit based on the company’s K3 16-core RISC-V SoC, and started the review with an unboxing, a teardown, and a first boot to Bianbu OS 4.0. Since the system features a 10Gbps Ethernet SFP+ cage, I also had to order a 10GbE SFP+ to Copper adapter, as my 10GbE networking gear is exclusively based on RJ45 ports. In this review, I’ll check system information in Bianbu OS 4.0.1, run a few benchmarks, test 10GbE, GbE, and WiFi 6 networking performance, play YouTube videos at various resolutions, run AI workloads (LLM), check all/most features work as expected, and measure the power consumption of the SpacemiT K3 “Pico-ITX Chassis Kit” mini PC. It’s a fairly long review, so if you are short on time, you can check out the “what works, what doesn’t” section. Bianbu OS 4.0 System Information Before running anything, I […]
Pine64 Pinevoice – A $50 RISC-V Smart Speaker for Home Assistant based on Bouffalo Lab BL606P MCU
After over two years in the making, Pine64 has now launched the PineVoice (previously PineVox) smart speaker based on the Bouffalo Lab BL606P RISC-V wireless microcontroller with WiFi, Bluetooth, and Zigbee radio interfaces. The device also features two microphones, a speaker, a USB 2.0 OTG port, volume buttons, a mute button with LED, a start/stop button, and four RGB LEDs. The PineVoice smart speaker is mainly designed to work with Home Assistant. PineVoice specifications: SoC – Bouffalo Lab BL606P CPU D0 core – T-Head C906 64-bit RISC-V (RV64IMAFCV) CPU @ 480 MHz M0 core – T-Head E907 32-bit RISC-V (RV32IMAFCP) CPU @ 320 MHz Memory – 544KB RAM (788KB SRAM listed on the Pine64 store), 16MB embedded PSRAM Storage – 128KB ROM, 4KB eFuse Wireless 2.4 GHz 802.11 b/g/n 1T1R WiFi 4 Bluetooth 5.x Dual-mode (Classis + BLE) 802.15.4 radio (Zigbee) Storage – 128Mbit (16MB) SPI NOR flash Audio 2x […]
Zhihe A210 octa-core RISC-V SoC with 12 TOPS NPU powers SoM-based development board
Last year, we noted three upcoming high-performance RISC-V SoCs to watch out for: Zhihe A210, SpacemiT K3, and UltraRISC UR-DP1000. The K3 has already been launched, and I’ll work on the K3-Pico-ITX SBC/mini PC review this coming weekend, while the UR-DP1000 is (still?) expected on the Milk-V Titan motherboard. However, we did not have that many details about the Zhihe A210 so far. This has now changed since documentation has surfaced for the Zhihe A210 and a development kit (A210 SODIMM V2) based on a carrier board and a system-on-module itself powered by the octa-core RISC-V processor. Let’s have a look at both. Zhihe A210 octa-core RISC-V SoC Zhihe A210 specifications: CPU – Octa-core RISC-V RV64GCV processor 4x 64-bit RISC-V C920 cores @ up to 2.3 GHz with 64 KB I Cache and 64 KB D Cache for each core, 1 MB L2 cache; note: 1.9 GHz is also shown […]
Linux 7.1 Release – Main changes, Arm, RISC-V, and MIPS architectures
Linus Torvalds has just released Linux 7.1 on LKML: So it’s only Sunday morning back home, but it’s Sunday afternoon where I am right now, so I’m doing the 7.1 release at the regular time – just not in the regular timezone. This obviously means that the merge window opens tomorrow, but I’ll be in yet another timezone by then, so timing will all be a bit irregular. Normally I try to front-load the merge window and do as much as possible the first few days – this time I’m not sure that will work out with my laptop and a couple of long flights without internet, but I’ve made sure that I have fetched the early pull requests (thank you – you know who you are), so I will be able to do some of it off-line. Anyway, possible slight hiccups in the merge window aside, the news today […]

