risc-v

Posted on by Jean-Luc Aufranc (CNXSoft) - 7 Comments on Sipeed Tang Mega 138K Pro Dock features GOWIN GW5AST FPGA + RISC-V SoC

Sipeed Tang Mega 138K Pro Dock features GOWIN GW5AST FPGA + RISC-V SoC

Sipeed Tang Mega 138K Pro Dock

Sipeed has launched another FPGA board part of their Tang family with the Tang Mega 138K Pro Dock powered by a GOWIN GW5AST SoC with 138K logic elements as well as an 800 MHz AE350_SOC RISC-V hardcore unit, and featuring a PCIe 3.0 x4 interface, DVI Rx and Tx, two SFP+ cages, a Gigabit Ethernet RJ45 port, and more. We’ve previously seen companies like AMD (Xilinx) and Microchip produce FPGA SoCs with hard cores such as the Zynq Ultrascale+ family (4x Cortex-A53) or the PolarFire MPSoC (4x 64-bit SiFive U54 RISC-V cores), but it’s the first time I see GOWIN introduce an FPGA + RISC-V SoC, as all the previous parts that came to my attention were FPGA devices. Sipeed Tang Mega 138K Pro Dock specifications: System-on-Module – Sipeed Tang Mega 138K Pro SoC FPGA – GOWIN GW5AST-LV138FPG676A with 138,240 LUT4 1,080 Kb Shadow SRAM (SSRAM) 6,120 Kb Block SRAM […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 3 Comments on Lichee Cluster 4A mini-ITX RISC-V cluster board launched for $929 and up

Lichee Cluster 4A mini-ITX RISC-V cluster board launched for $929 and up

RISC-V cluster board

As expected, Sipeed has now launched their Lichee Cluster 4A mini-ITX cluster board and box taking up to seven RISC-V modules with prices starting at $929 on Aliexpress. All kits on offer are fitted with seven Sipeed LM4A system-on-modules based on the T-Head TH1520 quad-core RISC-V processor in either 8GB/32GB or 16GB/128GB memory and storage configuration. Lichee Cluster 4A specifications: SoM – 7x Sipeed LM4A modules with Alibaba T-Head TH1520 processor (4x C910 @ 1.85GHz) and a total of either 56 or 112GB LPDDR4X, and 224GB or 869GB eMMC flash Storage – 7x microSD card slots, one per slot Video Output – 1x HDMI port connected to slot 1 Networking 1x Gigabit Ethernet port for the cluster 1x Gigabit Ethernet port for slot 1 only 1x Ethernet for BMC control USB 7x USB 3.0 ports, one per slot 1x USB 2.0 port for BMC Power Supply – 12V DC input […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on Andes launches AX45MPV RISC-V CPU core with Vector Extension 1.0

Andes launches AX45MPV RISC-V CPU core with Vector Extension 1.0

AX45MPV RISC core vector extension

Andes Technology has recently announced the general availability of the AndesCore AX45MPV RISC-V CPU which builds upon the AX45MP multicore processor and adds RISC-V Vector Extension 1.0. Equipped with RISC-V vector processing and parallel execution capability, the new RISC-V CPU core targets SoCs processing large amounts of data for applications such as ADAS, AI inference and training, AR/VR, multimedia, robotics, and signal processing. AX45MPV key features and specifications: 64-bit in-order dual-issue 8-stage CPU core with up to 1024-bit Vector Processing Unit (VPU) – compliant with RISC-V V-extension (RVV) 1.0 + custom extensions Supports clusters of up to 8 cores L2 cache and coherence support High bandwidth vector local memory (HVM) AndeStar V5 Instruction Set Architecture (ISA) Compliant with RISC-V GCBPV extensions Andes performance extension Andes CoDense extension for further compaction of code size Separately licensable Andes Custom Extension (ACE) for customized scalar and vector instruction 64-bit architecture for memory space […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 12 Comments on Raspberry Pi CM4 compatible RISC-V SoM features StarFive JH7110 SoC

Raspberry Pi CM4 compatible RISC-V SoM features StarFive JH7110 SoC

Raspberry Pi CM4 RISC-V CPU module

We’ve seen many Arm-based system-on-modules following the Raspberry Pi CM4 form factor, but we’ve now got a RISC-V one courtesy of the Milk-V Mars CM CPU module powered by a StarFive JH7110 quad-core RISC-V SoC. The RISC-V module comes with up to 8GB RAM, a 16MB SPI flash, an optional eMMC flash, onboard GbE PHY, and a wireless module with WiFi 5 and Bluetooth 5.2 plus the two 100-pin board-to-board connectors offering (partial) compatibility with carrier boards made for the Raspberry Pi Compute Module 4. Specifications: SoC – StarFive JH7110 CPU – Quad-core RISC-V processor (RV64GC) at up to 1.5GHz GPU – Imagination BXE-4-32 GPU with support for OpenCL 1.2, OpenGL ES 3.2, Vulkan 1.2 VPU H.264 & H.265 4Kp60 decoding H.265 1080p30 encoding JPEG encoder / decoder System Memory – 2GB, 4GB, or 8GB LPDDR4 Storage SDIO 2.0 (options to eMMC) 16MB NOR flash Networking Gigabit Ethernet PHY (YT8513C) […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 14 Comments on LuckFox Pico Rockchip RV1103 Cortex-A7/RISC-V camera board comes with an optional Ethernet port

LuckFox Pico Rockchip RV1103 Cortex-A7/RISC-V camera board comes with an optional Ethernet port

LuckFox Pico Plus Camera Board

LuckFox Pico is a small Linux camera board based on the Rockchip RV1103 Cortex-A7 and RISC-V AI camera SoC and offered with an Ethernet port in a longer version of the PCB called LuckFox Pico Plus. Both models come with 64MB RAM (apparently embedded in RV1103), a microSD card slot for storage, a MIPI CSI camera connector, a USB Type-C port for power, and a few through holes for expansion through GPIO, I2C, UART, and so on. LuckFox Pico and Pico Plus specifications: SoC – Rockchip RV1103 with Arm Cortex-A7 processor @ 1.2GHz, RISC-V core, 64MB DDR2, 0.8 TOPS NPU, 4M @ 30 fps USP Storage MicroSD card slot LuckFox Plus only – 1Gbit (128MB) SPI flash (W25N01GV) Camera – 2-lane MIPI CSI connector Networking (LuckFox Pico Plus only) – 10/100M Ethernet RJ45 port USB – USB 2.0 Host/Device Type-C port Expansion – 2x 20-pin headers with up to 24x […]

Posted on by Jean-Luc Aufranc (CNXSoft) - No Comments on SiFive unveils P870 high-performance core, discusses future of RISC-V

SiFive unveils P870 high-performance core, discusses future of RISC-V

SiFive Hot Chips 2023 x86 vs Arm vs RISC-V

SiFive has just given a presentation at Hot Chips 2023 introducing the new high-performance P870 RISC-V core and its automotive equivalent the P870-A core, plus discussing RISC-V in general, its previous generation RISC-V cores, and what to expect going forward. SiFive has not officially announced the P870 and P870-A cores just yet, so most of the information we have from the English-speaking Internet is from ServeTheHome who managed to get some presentation slides, but this is also corroborated by various Chinese sources on Baidu and Guokr. SiFive P870 and P870-A The P870 and P870-A RISC-V cores are new cores from the SiFive Performance family compatible with the RISC-V RVA23 profile and succeeding the SiFive P670 core. The SpecINT2k6 benchmark reports 17 points per GHz on the P870 compared to 13.2 points per GHz for the P670 (comparable to the Arm Cortex-A78) or about a 29% higher performance at the same […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 4 Comments on Sipeed unveils RISC-V tablet, portable Linux console, and cluster

Sipeed unveils RISC-V tablet, portable Linux console, and cluster

Sipeed RISC-V tablet, cluster, Linux console

Sipeed has unveiled three new hardware platforms based on the LM4A RISC-V system-on-module found in their LicheePi 4A SBC, namely the Lichee Cluster 4A cluster for native RISC-V compilation, the Lichee Pad 4A 10.1-inch tablet running Android 13 or Debian, and the Lichee Console 4A a portable Linux console with a small 7-inch display and a built-in keyboard. As a quick reminder, the Sipeed LM4A SoM is based on the Alibaba T-Head TH1520 quad-core RISC-V processor @ 1.8 to 2.5 GHz that has just gotten some support in Linux 6.5, comes with up to 16GB RAM and up to 64 GB eMMC flash, integrates two Gigabit Ethernet PHY, and exposes all I/Os through a 260-pin SO-DIMM connector. We’ve previously noticed the TH1520 module delivers performance similar to the Raspberry Pi Compute Module 4 and even more when using a customized toolchain. Lichee Cluster 4A All new Sipeed hardware platforms feature […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on Linux 6.5 release – Notable changes, Arm, RISC-V and MIPS architectures

Linux 6.5 release – Notable changes, Arm, RISC-V and MIPS architectures

Linux 6.5 release

Linus Torvalds has just announced the release of Linux 6.5 on the Linux Kernel Mailing List (LKML): So nothing particularly odd or scary happened this last week, so there is no excuse to delay the 6.5 release. I still have this nagging feeling that a lot of people are on vacation and that things have been quiet partly due to that. But this release has been going smoothly, so that’s probably just me being paranoid. The biggest patches this last week were literally just to our selftests. The shortlog below is obviously not the 6.5 release log, it’s purely just the last week since rc7. Anyway, this obviously means that the merge window for 6.6 starts tomorrow. I already have ~20 pull requests pending and ready to go, but before we start the next merge frenzy, please give this final release one last round of testing, ok? Linus The earlier […]

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