HiFive Unleashed RISC-V Linux Development Board Gets a $2000 FPGA Expansion Board

If you’re a RISC-V architecture’s enthusiast or represent a company working on products with the new ISA, you may have spent $999 or more on Hifive Unleashed RISC-V Linux development board a few months ago. You now have the opportunity to spend an extra $1,999 for HiFive Unleashed Expansion Board powered by a MicroSemi PolarFire FPGA programmed with a PCIe root port bridge, and allowing you to test all sorts of peripherals such as HDD’s & SSD’s,  HDMI output, and audio cards, network adapters, graphics cards, and so on. Expansion board specifications: FPGA – Microsemi Low Power PolarFire FPGA with 300K Logic Element 4 Gbit DDR4 x16 SPI Flash for remote FPGA updates, QSPI Flash connected to GPIO 24 lane PCIe Switch x1 PCI Express card connector x16 PCI Express card connector with 4 lanes of PCIe gen2 connected SSD M.2 connector SATA connector HDMI connector eMMC Nand Flash uSD Card Slot USB to UART bridges 2 CAN transceivers FMC …

SiFive Partners with Western Digital to Produce 1 Billion RISC-V Cores

Architecture like Arm and x86 are well established, and initiatives like RISC-V opens source ISA have potential, but market acceptance and commercial success are not guaranteed. But RISC-V just got a big boost, as SiFive announced it raised $50.6 million in a Series C round from existing and new investors, as well as strategic partners such as Huami, SK Telecom and Western Digital. Even more importantly, Sifive and Western Digital signed a multi-year license for the Freedom Platform, with Western Digital pledging to produce 1 billion RISC-V cores. The announcement does not explicitly mention which Freedom platform, but Western Digital statement makes it quite clear they’ll use one of the more powerful (and Linux capable) core: RISC-V delivers a platform for innovation unshackled from the proprietary interface of the past. This freedom allows us to bring compute closer to data to optimize special purpose compute capabilities targeted at Big Data and Fast Data applications. The next generation of applications like Machine …

RISC-V Keynote at Embedded Linux Conference 2018 (Video)

The Embedded Linux Conference and OpenIoT Summit 2018 have just started, and the Linux Foundation has already uploaded a few keynote videos to YouTube, including the one by Yunsup Lee, Co-Founder and CTO, SiFive, entitled “Designing the Next Billion Chips: How RISC-V is Revolutionizing Hardware”. Yunsup explains the current problem with chip development, and go through the open source RISC-V solutions offered by Sifive. Currently design a chip has a high upfront (NRE = non-recurring engineering) costs, is time-consuming (1.5 to 2 years at least) and silicon vendors normally target high volume production, but now many applications like IoT or machine learning require custom chips that may not be (yet) manufactured in such high volume. The solution is to adapt some idea from open source software to open source hardware in order to lower the costs, enable fast prototyping, and involve the community of designers and software developers. He took Instagram as an example, as it sold for $1 billion …

SiFive Introduces HiFive Unleashed RISC-V Linux Development Board (Crowdfunding)

RISC-V free and open architecture has gained traction in the last couple of years. SiFive has been one of the most active companies with RISC-V architecture, introducing Freedom U500 and E500 open source RISC-V SoCs in the summer of 2016, before launching their own HiFive1 Arduino compatible board, and later the official Arduino Cinque board. That’s fine if you are happy with MCU class boards, but RISC-V is getting into more powerful processors, and recently got initial support o Linux 4.15, so it should come as no surprise the company has now launched HiFive Unleashed, the first RISC-V-based, Linux-capable development board. HiFive Unleashed key features and specifications: SoC – SiFive Freedom U540 with 4x U54 RV64GC application cores @ up to 1.5GHz with Sv39 virtual memory support, 1x E51 RV64IMAC Management Core, 2 MB L2 cache;  28 nm TSMC process System Memory – 8GB DDR4 with ECC Storage –  32MB Quad SPI Flash from ISSI, MicroSD card for removable storage …

SiFive U54-MC Coreplex is the First Linux Ready RISC-V based 64-bit Quad-Core Application Processor

We first covered SiFive when they unveiled their open source Freedom RISC-V SoCs. Since then, they moved away from open source for their customizable IP, since their customers did not require fully open source designs, but kept releasing more RISC-V cores such as 32-bit E31 Coreplex & 64-bit E51 Coreplex, as well as offering their one-time fee pricing without recurring royalties, contrary to what some competitors – such as Arm – are doing. The company has now just announced U54-MC Coreplex quad core real-time capable application processor with support for full featured operating systems such as Linux. U54-MC Coreplex main specifications / features: Fully compliant with the RISC-V ISA specification 4x RV64GC U54 Application Cores 32KB L1 I-cache with ECC, 32KB L1 D-cache with ECC 8x Region Physical Memory Protection 48x Local Interrupts per core Sv39 Virtual Memory support with 38 Physical Address bits 1x RV64IMAC E51 Monitor Core 4KB L1 I-Cache with ECC 8KB DTIM with ECC 8x Region …

LoFive is a Tiny Open Source Hardware Board based on SiFive FE310 RISC-V Open SoC

Do you remember HiFive1? It’s an Arduino compatible board based on the SiFive FE310 open source RISC-V SoC. Michael Welling has now started working on LoFive board using the same processor, but in a much smaller & breadboard friendly form factor. LoFive board specifications: MCU – SiFive Freedom E310 (FE310) 32-bit RV32IMAC processor @ up to 320+ MHz (1.61 DMIPS/MHz) Storage – 128-Mbit SPI flash (ISSI IS25LP128) Expansion – 2x 14-pin headers with JTAG, GPIO, PWM, SPI, UART, 5V, 3.3V and GND Misc – 1x reset button, 16 MHz crystal Power Supply – 5V via pin 1 on header; Operating Voltage: 3.3 V and 1.8 V Dimensions – 38 x 18 mm (estimated) The board will be programmable with Arduino IDE + Cinco just like HiFive1 board. The board is also open source hardware, so beside the aforelinked info on Hackster,io, you’ll also find the KiCAD schematics, PCB layout, and 3D renders, released under CERN Open Hardware License v1.2, on …

Arduino Cinque Combines SiFive RISC-V Freedom E310 MCU with ESP32 WiFi & Bluetooth SoC

SiFive introduced the first Arduino compatible board based on RISC-V processor late last year with HiFive1 development board powered by Freedom E310 MCU, but  the company has been working with Arduino directly on Arduino Cinque board equipped with SiFive Freedom E310 processor, ESP32 for WiFi and Bluetooth, and an STM32 ARM MCU to handle programming. Few other technical details have been provided for the new board, but since it looks so similar to HiFive1, I’ve come with up with preliminary/tentative Arduino Cinque specifications: MCU – SiFive Freedom E310 (FE310) 32-bit RV32IMAC processor @ up to 320+ MHz (1.61 DMIPS/MHz) WiSoC – Espressif ESP32 for WiFi and Bluetooth 4.2 LE Storage – 32-Mbit SPI flash I/Os 19x Digital I/O Pins 19x external interrupt pins 1x external wakeup pin 9x PWM pins 1/3 SPI Controllers/HW CS Pins I/O Voltages –  3.3V or 5V supported USB – 1x micro USB port for power, programming and debugging Misc – 6-pin ICSP header, 2x buttons …

SiFive Launches 32-bit E31 Coreplex & 64-bit E51 Coreplex RISC-V Processors, Reveals Pricing

SiFive unveiled their Freedom U500 and E500 open source RISC-V SoCs last year, and a little layer launched HiFive1 Arduino compatible development board based on SiFive Freedom E310 processor. The company has now launched their non-open source Coreplex IP also based on RISC-V ISA with the 32-bit E31 Coreplex and 64-bit E51 Coreplex, and explained details about pricing. Some of the key features of the processors are listed below: E31 Coreplex 32-bit RV32IMAC core @ 900 to 1.5 GHz (with 28nm process) Advanced Memory Subsystem – 16KB, 2-way Instruction Cache, Instruction Tightly Integrated Memory (ITIM) option, up to 64KB Data Tightly Integrated Memory (DTIM) support Up to 16 local interrupts with vectored addresses Performance – 1.61 DMIPS/MHz  ; 2.73 Coremark/MHz Power Consumption 28nm HPC process – Core only: 150 DMIPS/mW ; Coreplex: 41 DMIPS/mW 55nm LP process – Core only: 95 DMIPS/mW; Coreplex: 16 DMIPS/mW Applications: Edge Computing, Smart IoT or Wearables. Suited to replace the Cortex-M3 and Cortex-M4, but …