MediaTek Helio P22 SoC for “Mid Range Premium” Smartphones Relies on 12nm Manufacturing Process

MediaTek already has plenty of Arm Cortex A53 processors in their portfolio, but with MediaTek Helio P22 they’ve now added another one. One of the selling point of the new processor is that it is manufactured using a 12nm manufacturing process, just like the recently announced Helio P60 SoC, which better performance for the similar power consumption thanks to a higher CPU clock (2.0 GHz). MediaTek Helio P22 specifications: Processor – 8x Arm Cortex A53 @ up to 2.0 GHz GPU – Imagination PowerVR GE8320 GPU @ up to 650MHz System Memory – Up to 4GB LPDDR3 @ 933MHz, up to 6GB LPDDR4x @ 1600 MHz Storage I/F – eMMC 5.1 Connectivity Cellular Technologies – Carrier Aggregation (CA), CDMA2000 1x/EVDO Rev. A (SRLTE), FDD / TDD LTE, HSPA + Specific Functions -TAS 2.0, HUPE, IMS (VoLTE\ViLTE\WoWi-Fi), eMBMS, Dual 4G VoLTE (DSDS), Band 71 LTE Category – Cat-4, Cat-7 DL / Cat-13 UL GNSS – Beidou, Galileo, Glonass, GPS 802.11 a/b/g/n/ac WiFI Bluetooth 5.0 FM Radio Display – …

ZiP (zGlue Integration Platform) Enables the Design & Manufacturing of Low Cost Custom Chips

When I first started to read about zOrigin on Crowdsupply, I was not really impressed. Meh… Yet another Bluetooth LE fitness tracker with a few sensors, and an Android app. But as I read further, I found out the interesting part was inside the device: ZGLZ1BA, a custom chip manufactured using ZiP (zGlue Integration Platform) chip-stacking technology, which produces something similar to SiP (System-in-Package) but at a much lower cost and manufacturing lead time. But let’s have a look at zOrigin tracker first, which acts as a demonstration / evaluation platform for ZiP technology. Key specifications & features: “SoC” – ZGZL1BA ZiP with Dialog Semiconductor DA14585 16MHz 32-bit ARM Cortex M0 MCU with BLE Analog Devices AD8233 Heart Rate Analog Front End (AFE) Macronix MX25R4035F 2 Mbit Flash Memory MCube MC3672 Accelerometer Maxim MAX77734 Power Managment IC (PMIC) SiTime SIT1552 32 kHz Oscillator Vishay SI8466EDB MOSFET 30 passive components Package – 0.8-mm-pitch BGA package measuring 8.7 mm x 9.1 mm …

Synaptics Introduces VideoSmart BG5CT 4K HDR Multimedia Video Processor for Set-Top Boxes

Marvell used to design Media SoCs running Android TV such as ARMADA 1500 Ultra (aka BG4CT). That part of Marvell business has very recently been sold to Synaptics, which has just unveiled VideoSmart BG5CT multimedia SoC with 4K “Advanced” HDR video processing for the set-top-box market. The BG5CT is said to be pin-to-pin compatible with BG4CT Android TV SoC, features a quad core ARM CPU @ 1.6 GHz with 15K DMIPS, an Imagination PowerVR Series8XE GE8310 GPU, and a security engine enabling secure boot, Trusted Rendering Path, full TrustZone, and video watermarking carrier-grade security making it suitable for Pay TV operators and set-top-box manufacturers. Synaptics’ Qdeo video processing technology adds 4K “Advanced HDR” – including HDR10, HLG, Dolby Vision, and Technicolor HDR, among user video processing technology. The company did not provide that many details, but BG5CT appears to mostly add HDR support compared to BG4CT, and replace Vivante GC7000 GPU by PowerVR GE8310. Primary SDKs for BG5CT will include Android TV …

SiFive U54-MC Coreplex is the First Linux Ready RISC-V based 64-bit Quad-Core Application Processor

We first covered SiFive when they unveiled their open source Freedom RISC-V SoCs. Since then, they moved away from open source for their customizable IP, since their customers did not require fully open source designs, but kept releasing more RISC-V cores such as 32-bit E31 Coreplex & 64-bit E51 Coreplex, as well as offering their one-time fee pricing without recurring royalties, contrary to what some competitors – such as Arm – are doing. The company has now just announced U54-MC Coreplex quad core real-time capable application processor with support for full featured operating systems such as Linux. U54-MC Coreplex main specifications / features: Fully compliant with the RISC-V ISA specification 4x RV64GC U54 Application Cores 32KB L1 I-cache with ECC, 32KB L1 D-cache with ECC 8x Region Physical Memory Protection 48x Local Interrupts per core Sv39 Virtual Memory support with 38 Physical Address bits 1x RV64IMAC E51 Monitor Core 4KB L1 I-Cache with ECC 8KB DTIM with ECC 8x Region …

Qualcomm Provides Details about 64-bit ARM Falkor CPU Cores used in Centriq 2400 Server-on-Chip

Qualcomm officially announced they started sampling Centriq 2400 SoC with 48 ARMv8 cores for datacenters & cloud workloads using a 10nm process, but at the time the company did not provide that many details about the solution or the customization made to the CPU cores. Qualcomm has now announced that Falkor is the custom CPU design in Centriq 2400 SoC with the key features listed by the company including: Fully custom core design – Designed specifically for the cloud datacenter server market, with a 64-bit only micro-architecture based on ARMv8 (Aarch64). Scalable building block – The Falkor core duplex includes two custom Falkor CPUs, a shared L2 cache and a shared bus interface to the Qualcomm System Bus (QSB) ring interconnect. Designed for performance, optimized for power 4-issue, 8-dispatch heterogeneous pipeline designed to optimize performance per unit of power, with variable length pipelines that are tuned per function to maximize throughput and minimize idle hardware. power management techniques: independent p-state …

Qualcomm Snapdragon 845 Octa-core Processor To Feature ARM Cortex A75 Cores (Reports)

According to reports from China, Qualcomm’s next application processor (or rather mobile platform) will be Snapdragon 845, and if accurate, the comparison table below between the Snapdragon processor and Hisilicon Kirin 970 SoC shows the former will be powered by some customized (魔改) version of yet-to-be announced ARM Cortex 75 cores. Snapdragon 845 octa-core processor will be manufactured using Samsung 10nm LPE processor, come with four custom Cortex A75 cores, four Cortex A53 cores, an Adreno 630 GPU, and an LTE X20 modem supporting LTE Cat 18 for up to 1.2 Gbps download speed. Other features like 802.11ad (High bandwidth, short range WiFi), UFS 2.1, and LPDDR4X were already found on earlier model. I’ve been unable to find further details about ARM Cortex A75 right now, and we have to wait until ARM Techcon 2017 before getting more details. Mobile phones powered by Snapdragon 845 are supposed to start shipping in Q1 2018. Via Wccftech

SiFive Launches 32-bit E31 Coreplex & 64-bit E51 Coreplex RISC-V Processors, Reveals Pricing

SiFive unveiled their Freedom U500 and E500 open source RISC-V SoCs last year, and a little layer launched HiFive1 Arduino compatible development board based on SiFive Freedom E310 processor. The company has now launched their non-open source Coreplex IP also based on RISC-V ISA with the 32-bit E31 Coreplex and 64-bit E51 Coreplex, and explained details about pricing. Some of the key features of the processors are listed below: E31 Coreplex 32-bit RV32IMAC core @ 900 to 1.5 GHz (with 28nm process) Advanced Memory Subsystem – 16KB, 2-way Instruction Cache, Instruction Tightly Integrated Memory (ITIM) option, up to 64KB Data Tightly Integrated Memory (DTIM) support Up to 16 local interrupts with vectored addresses Performance – 1.61 DMIPS/MHz  ; 2.73 Coremark/MHz Power Consumption 28nm HPC process – Core only: 150 DMIPS/mW ; Coreplex: 41 DMIPS/mW 55nm LP process – Core only: 95 DMIPS/mW; Coreplex: 16 DMIPS/mW Applications: Edge Computing, Smart IoT or Wearables. Suited to replace the Cortex-M3 and Cortex-M4, but …

Imagination Technologies Announces MIPS Warrior I-class I6500 Heterogeneous CPU with up to 384 Cores

Imagination has just unveiled the successor of MIPS I6400 64-Bit Warrior Core with MIPS Warrior I-class I6500 heterogeneous CPU supporting up to 64 cluster, with up to 6 cores each (384 cores max), themselves up to 4 thread (1536 max), combining with IOCU (IO coherence units), and external IP such as PowerVR GPU or other hardware accelerators. The main features of MIPS I6400 processor are listed as follows:   Heterogeneous Inside – In a single cluster, designers can optimize power consumption with the ability to configure each CPU with different combinations of threads, different cache sizes, different frequencies, and even different voltage levels. Heterogeneous Outside – The latest MIPS Coherence Manager with an AMBA ACE interface to popular ACE coherent fabric solutions such as those from Arteris and Netspeed lets designers mix on a chip configurations of processing clusters – including PowerVR GPUs or other accelerators – for high system efficiency. Simultaneous Multi-threading (SMT) – Based on a superscalar dual …