Efinix Titanium Ti375 FPGA offers quad-core hardened RISC-V block, PCIe Gen 4, 10GbE

Efinix Titanium Ti375 SoC combines high-density, low-power Quantum compute fabric with a quad-core hardened 32-bit RISC-V block and features a LPDDR4 DRAM controller, a MIPI D-PHY for displays or cameras, and 16 Gbps transceivers enabling PCIe Gen 4 and 10GbE interfaces.

The Titanium Ti375 also comes with 370K logic elements, 1.344 DSP blocks, 2,688 10-Kbit SRAM blocks, and 27,53 Mbits embedded memory, as well as DSP blocks optimized for computing and AI workloads, and XLR (eXchangeable Logic and Routing) cells for logic and routing.

Efinix Titanium Ti375 RISC-V FPGA SoC

Efinix Titanium Ti375 specifications:

  • FPGA compute fabric
    • 370,137 logic elements (LEs)
    • 362,880 eXchangeable Logic and Routing (XLR) cells
    • 27,53 Mbits embedded memory
    • 2,688 10-Kbit SRAM blocks
    • 1,344 embedded DSP blocks for multiplication, addition, subtraction, accumulation, and up to 15-bit variable-right-shifting
  • Memory – 10-kbit high-speed, embedded SRAM, configurable as single-port RAM, simple dual-port RAM, true dual-port RAM, or ROM
  • FPGA interface blocks
    • 32-bit quad-core hardened RISC-V block (RISCV32I with M, A, C, F, and D extensions and six pipeline stages)
    • 4x high-speed transceiver banks, each with 4 lanes:
      • Support data rates from 1.25 Gbps up to 16 Gbps per channel
      • PCIe Gen4 x4
        • Compliant with the PCIe 4.0, 3.2, 2.1, and 1.1 specifications
        • Support x1, x2, and x4 configurations
        • Configure as Root Port (RP) or End Point (EP)
        • Single Root IO Virtualization (SRIOV)
      • Supports SGMII and 10GBase-KR protocols as well as PMA Direct
    • 2x LPDDR4/LPDDR4x PHY interfaces (supporting x32 DQ widths) with memory controller hard IP
    • 3x MIPI D-PHY RX and TX interfaces with speeds up to 2.5 Gbps
    • 2x Two varieties of general-purpose I/O (GPIO) pins:
      • High-voltage I/O (HVIO) – Simple I/O blocks that support the single-ended LVTTL and LVCMOS I/O standards at 1.8, 2.5, and 3.3 V
      • High-speed I/O (HSIO) – Complex configurable I/O blocks
        • Single-ended and differential I/O
        • LVDS, subLVDS, Mini-LVDS, and RSDS (RX, TX, and bidirectional) up to 1.5 Gbps
        • MIPI lanes (DSI and CSI) at 1.5 Gbps in high-speed and low-power modes, up to 1.5 Gbps
    • 1x oscillator
    • Spread-Spectrum Clocking (SSC) PLL
  • On-chip clocking
    • Low-skew global network supporting 32 clock or control signals
    • Regional and local clock networks
    • Up to 12x PLLs with support for fractional-N division, programmable duty cycle, spread-spectrum clocking, and dynamic reconfiguration
  • Device configuration
    • Standard SPI interface (active, passive, and daisy chain)
    • JTAG interface
    • Supports internal reconfiguration
  • Single-event upset (SEU) detection feature
  • Optional security feature
    • Asymmetric bitstream authentication using RSA-4096
    • Bitstream encryption/decryption using AES-GCM
  • Automotive grade support with AEC-Q100 qualification
  • Packages
    • 19x19mm 529-ball FPGA with 0.8mm pitch
    • 35x35mm 1,156-ball FPGA with 1.0mm pitch (coming soon)
  • Manufacturing Process – TSMC 16nm

Titanium Ti375 FPGA product matrix

Right now, eight 529-ball FBGA SKUs are available with different temperature ranges (commercial vs industrial) and speed grades. I could not find any information about the 1,156-ball FBGA devices, so I’d assume they may be coming later on.

The Ti375 is the most powerful Titanium FPGA from Efinix so far, although the Ti550, Ti750, and Ti1000 FPGAs are in the pipeline with up to around one million logic elements and the introduction of 25.8 Gbps transceivers.

EFinix FPGA portfolio

All Efinix FPGAs, including the new Titanium Ti375, are supported by the Efinity software (RTL-to-bitstream compiler) available for Windows 10/11 64-bit and Linux (Ubuntu/Red Hat Enterprise). The RISC-V block in the FPGA is based on the company’s Sapphire soft-core that can run bare metal code, RTOS, or Linux. Efinix provides BR2-Efinix custom Buildroot external tree for building Linux with OpenSBI, U-boot, Linux, and Buildroot configuration files as well as patches. You’ll find the code and instructions to get started on GitHub.

There’s no public information about an evaluation board for the Titanium Ti375 at this time. Potential applications include PCIe cards, RF repeaters and radio units, small cell/massive MIMO, cable modems, machine vision, automotive, AV equipment and broadcast, medical imaging, and video bridges.

I could not find pricing and availability information, but Efinix commits to supporting the Titanium family of FPGAs in customer designs until at least 2037. Additional information may be found on the product page.

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