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Posts Tagged ‘fpga’

Turtle Board is a Raspberry Pi 2 Like FPGA Board for J-Core J2 Open Source SuperH SH2 SoC

March 13th, 2017 8 comments

J-core J2 is an open source processor and SoC design implemented in VHDL, and using  SH2 instruction set found in some Renesas (previously Hitachi) micro-controllers. The code available royalty free under a BSD license, and it’s also patent-free since all SH2 related patents expired expired in October 2014. The developers used to run the code on Xilinx Spartan 6 based Numato Mimas v2 board since it was cheap ($50) and mostly did the job. “Mostly”, because it still lacked Ethernet, capability for SMP and the serial port was slow, so they decided to design their own Turtle Board to address those issues.

Turtle Board preliminary specifications:

  • FPGA – Xilinx Spartan 6 LS25 or LS45 FPGA
  • MCU – 8-bit Atmel MCU for load/update flash at power on.
  • Storage – micro SD slot, 8MB SPI flash
  • System memory – 256 MB RAM
  • Video & Audio Output – HDMI and AV jack
  • Connectivity – Ethernet
  • USB – 4x USB 2.0 ports
  • Expansion – 40-pin Raspberry Pi compatible header
  • Power Supply – 5V via micro USB port
  • Dimensions – Raspberry Pi 2/3 form factor

There are very few details about the board, and J-Core Project’s twitter account has not been very active recently. However, they showcased Turtle Board at ELC 2017 last month, so the project is still very alive.

Click to Enlarge

Based on the slide above, the board will start shipping in May 2017, and I could not find a link to pre-order them. They have a dedicated (currently parked) domain @ turtleplatform.com, so it could eventually be announced there, or via a Kickstarter campaign. Patents for newer SH3 and SH4 cores have recently expired too, and J-Core Roadmap includes plans for  J3 (SH3+MMU+FPU) in 2017 and J4 (SH4 64bit – Used in SEGA Dreamcast) in 2018.  If you want to know more about J-Core implementation, you may want to check out ELC 2016 presentation, and/or subscribe to J-Core mailing list.

Thanks to Leon for the ELC 2017 picture.

Arrow Chameleon96 Board To Feature Intel Altera Cyclone V SE FPGA + ARM SoC in 96Boards Form Factor

March 7th, 2017 No comments

Embedded World 2017 will start in about one week, and take place in March 14 – 16 in Nuremberg, Germany, so we can expect interesting embedded news coming soon. Arrow has written a blog post with plans to announce three 96Boards at the event: Meerkat based on NXP i.MX 7Dual, Chameleon96 based on Intel/Altera Cyclone V FPGA + ARM SoC, and Systart Oxalis 96Boards EE board powered by NXP LS1020A single core ARM Cortex A53 SoC. I’ll start with Chameleon (Chameleon96) today, as it’s the first with FPGA fabric, and I could find some technical details and photos about the board.

Click to Enlarge

Chameleon96 board specifications:

  • SoC – Intel PSG / Altera Cyclone V SE 5CSEBA6U19I7N with a dual core ARM Cortex A9 processor @ up to 800 MHz and FPGA fabric with 110K Logic Elements
  • Chips, Ports and Features connected to FPGA:
    • Integrated USB-Blaster II JTAG cable
    • Configuration sources: SD Card, JTAG
    • HDMI display output
    • WiFi 802.11 a/b/g/n + Bluetooth 4.1 module interface
  • Chips, Ports & Features connected to ARM system (HPS)
    • 512MB DDR3 SDRAM (16 bit data bus)
    • 2x USB 2.0 host ports, 1x micro USB OTG port
    • Micro SD card interface
    • Serial UART
    • User LEDs
    • Warm reset button
  • Expansion Connectors
    • 2x 20-pin Low speed expansion connector with UART, SPI, I2C, I2S, GPIO connectivity
    • 2x 30 High speed expansion connector with USB 2.0 Host, SPI, I2C, GPIO, and MIPI CSI-2 connectivity
  • Debugging – 3-pin UART connector
  • Misc – User LEDs, power button, reset button
  • Power Supply – 12V DC (8~18V supports as per 96Boards CE specifications)
  • Dimensions – 85 x 54 mm

The company will provide a Linux image and source code at launch with the board shipping with a 12V DC power supply, a USB to serial cable, a USB 2.0 AB cable, and a micro SD card pre-loaded with a Linux distribution with a graphical user interface, and source code.

One of the first use of the FPGA will be IoT security with the board including a “quantum-resistant” Ironwood Key Agreement Protocol, and WalnutDSA Digital Signature Algorithm reference design from SecureRF.

Block Diagram for Chameleon96 Board – Click to Enlarge

The board is not yet listed on Arrow Electronics website, but you can get some extra details on Rocketboard’s Chameleon96 Wiki page.

Amazon EC2 F1 Instances Put Xilinx Virtex Ultrascale+ FPGA Boards into the Cloud

February 22nd, 2017 4 comments

We’ve covered several board and modules based on Xilinx Zynq Ultrascale+ MPSoC such as the AXIOM Board and Trenz TE0808 SoM, both featuring ZU9EG MPSoC, with systems selling for several thousands dollars. But I’ve been informed you may not need to purchase a board to use Virtex UltraScale+ FPGAs, which are different from Zynq UltraScale+ since they lack the ARM CPU & GPU and normally feature a more capable FPGA, as last November, Amazon launched a developer preview of F1 instances giving access to this type of hardware from their cloud.

That’s the FPGA hardware you’ll be able to access from one F1 instance:

  • Xilinx UltraScale+ VU9P manufactured using a 16 nm process.
  • 64 GB of ECC-protected memory on a 288-bit wide bus (four DDR4 channels).
  • Dedicated PCIe x16 interface to the CPU.
  • Approximately 2.5 million logic elements.
  • Approximately 6,800 Digital Signal Processing (DSP) engines.
  • Virtual JTAG interface for debugging.

I understand those FPGA boards are PCIe card plugged into servers with an Intel Broadwell E5 2686 v4 processor, up to 976 GB of memory, and up to 4 TB of NVMe SSD storage. This is obviously only usable if the FPGA do not need extra hardware connected to the board.

You can choose from two instance types as described in the table below.

Instance Type FPGA Cards vCPUs Instance Memory (GiB) SSD Storage (GB) Enhanced Networking EBS Optimized
f1.2xlarge 1 8 122 480 Yes Yes
f1.16xlarge 8 64 976 4 x 960 Yes Yes

Amazon provides an hardware development kit or FPGA Developer AMI (Amazon Instance), where developers write and debug FPGA code on their own hardware/instance, before creating an “Amazon FPGA image” (AFI), and attaching it to an F1 instance as describe in the first diagram of this post. If you’re a customer who needs a specific “acceleration routine”, you don’t even need the FPGA development kit, as you can purchase the AFI on the market place, and deploy it on F1 instances.

If you are interested in Amazon solution and want to know more and get started, Amazon organized a one hour webinar last December.

Hardware-accelerated computing leveraging FPGAs is especially used for genomics research, financial analytics, real time video processing, big data search and analytics, and security applications.

AFAIK, Amazon has still not officially launched F1 instances commercially, at which point you’ll be able to pay by the hour for the use of the instance, but you can still sign up for the F1 preview.

Thanks to Jon for the tip.

Trenz Electronic TE0808 UltraSOM+ is a Xilinx Zynq Ultrascale+ ZU9EG System-on-Module

February 21st, 2017 1 comment

Xilinx Zynq Ultrascale+ ARM Cortex A53 + FPGA SoC have now started to show up in boards such as AXIOM Board based on Zynq Ultrascale+ ZU9EG. Price for the board has not been announced, and while a similar Xilinx development kit goes for close to $3,000, some people are expecting the board to sell for $400 to $600. Since the price of FPGA vary a lot from a few dollars to $40,000 for the top end chips, I decided to find pricing info about Xilinx Zynq Ultrascale+ MPSoCs which lead me to Trenz Electronic TE0808 system-on-module, which was unveiled in May last year, and I’ll cover in the second part of this post, after – hopefully quickly – describing Zynq Ultrascale+ family and nomenclature, and addressing the price “issue”.

First, there are three sub-families within Zynq Ultrascale+ MPSoC portfolio:

  • CG models with 2x Cortex A53, 2x Cortex R5, FPGA fabric
  • EG models with 4x Cortex A53, 2x Cortex R5, a Mali-400 GPU, and FPGA fabric
  • EV models based on EG, but adding a H.264 / H.265 video codec capable of simultaneous encode and decode up to 4Kx2K (60fps)

Within each sub-families there are multiple parts that differ by their number of logic cells, and I/Os. Since AXIOM board is using ZU9EG, I focused on EG family which start from ZU2EG up to ZU19EG.

Click to Enlarge

Once you’ve selected a part like ZU9EG, you’ll need to select a package ranging from FFVC900 (900-pin) to FFVE1924 (1924-pin), and offering options in terms of the number of the number serial transceivers and I/Os. So I plan to check the price for ZU9EG with FFBV900 package which should be the cheapest for that model.

While 1688.com is a great site to check price for Chinese SoCs, you’ll probably want to use Octopart to check for other silicon vendors, and that’s what I did to check ZZU9EG-FFVC900 price. The cheapest I could find was on AVNet Asia for $2407 in single unit. The price should go down a bit in multiple quantities, but we should still expect boards based on this model to be around $2,500 to 3,000.

With that out of the way, let’s now look at Trenz Electronics’ SoM.

Click to Enlarge

TE0808 UltraSOM+ specifications:

  • SoC – Xilinx Zynq Ultrascale+ ZU9EG MPSoC with four ARM Cortex A53 cores @ up to 1.2 GHz, two Cortex R5 “real-time” cores @ 500MHz, a Mali-400MP GPU, 600K System Logic Cells
  • System Memory –  2GB 64-Bit DDR4 by default (up to 8 GB supported)
  • Storage – 2x 32 MB dual parallel SPI Boot Flash by default (up to 512 MB supported)
  • User I/Os:
    • 65x MIO, 48x high-density (HD) I/Os (all), 156x high performance (HP) I/Os  (3 banks)
    • Serial transceiver – 4x GTR + 16 x GTH
    • Transceiver clocks inputs and outputs
    • PLL clock generator inputs and outputs
  • Board to Board Connectors – 4x 160-pin
  • Power Supply – Single 3.3V power source required; 14 on-board DC-DC regulators and 13 LDOs; LP, FP, PL separately controlled power domains
  • Dimensions – 76 x 52 mm; 3mm mounting hole for skyline heat spreader

Click to Enlarge

Two models are available with TE0808-03ES2 and TE0808-03-02I with the later coming with the first one based on XCZU9EG-1FFVC900 and the second XCZU9EG-2FFVC900I. I could not find what the differences are between “1FF” and “2FF” SoC. Note that the ICs used are currently engineering samples. The company recommends Vivado HL Design Edition to program the FPGA part of the chip, and PetaLinux 2016.4 is running on the ARM cores. You’ll find all technical information you may need via the Wiki, and support from the forums.

Trenz can also provide TEBF0808-04 baseboard for development, part of TE0808-03ES2-S Starter Kit with a E0808-03 module  SoM, a black Core V1 Mini-ITX Enclosure, a 12 V power supply, 2x XMOD FTDI JTAG Adapter, an 8 GB micro SD card, a USB cable and two Phillips screws.

Starter Kit and Baseboard – Click to Enlarge

Baseboard key features and specifications:

  • Storage – micro SD card, eMMC flash (both bootable), 1x SATA connector
  • Video Output – Displayport Single Lane PS GT Connected
  • Connectivity – Gigabit Ethernet RJ45, Dual SFP+
  • USB – USB3 with USB3 HUB
  • Expansion
    • PCIe slot – PS GT Connected, one PCIe lane (16 Lane Connector)
    • FMC HPC Slot (1.8V max VCCIO)
    • One Samtec FireFly (4 GT lanes bidir)
    • One Samtec FireFly connector for reverse loopback
    • CAN FD Transceiver (10 Pin IDC Connector)
  • Debugging – 20 Pin ARM JTAG Connector (PS JTAG0)
  • Misc – Fan connectors, FMC Fan, Intel front panel connector (PWR/RST/LED), Intel HDA Audio connector
  • Power Supply
    • ATX Power supply connector (12V only PS Required)
    • Optional 12V Standard Power Plug
  • Dimensions – Mini-ITX form factor

TE0808-03ES2 SoM sells for 2,500 Euros in low quantities excluding VAT and shipping costs, TE0808-03-02I for 3,500 Euros, and the Starter Kit for 3,800 Euros. Prices go down to as low as 1,750 Euros per unit  for orders of 1,000 modules or more. You’ll find purchase links on Trenz Electronic’ shop TE0808 Ultrascale+ page.

EU funded AXIOM Board is Powered by Xilinx Zynq UltraScale+ FPGA + ARM SoC

February 17th, 2017 9 comments

Back in 2015, Xilinx unveiled Zynq Ultrascale+ MPSoC combining ARM Cortex A53 & Cortex R5 cores, a Mali-400MP2 GPU, and UltraScale FPGA, and the company recently launched ZCU102 Evaluation Kit based on the SoC, which sells for just under $3,000. But if you are based in the European Union, you’ll be glad to learn about 4 millions Euros of your taxes have been spent to design a board based on the same MPSoC family as part of the AXIOM project, which was developed in collaboration with European universities and companies with the “aim of researching new software/hardware architectures for Cyber-Physical Systems (CPS) to meet the expectations” in terms of computational power, energy efficiency, scalability through modularity, easy programmability, and leverage of the best existing standards at minimal costs.

AXIOM (Agile, eXtensible, fast I/O Module) board’s key specifications:

  • SoC – Xilinx Zynq Ultrascale+ ZU9EG MPSoC with four ARM Cortex A53 cores @ 1.2GHz, two Cortex R5 “real-time” cores @ 500MHz, a Mali-400MP GPU @ 600 MHz, 600K System Logic Cells;
  • System Memory – 32 GB of swappable SO-DIMM RAM  (up to 32GB) for the Processing System, plus a soldered 1 GB Programmable Logic.
  • Storage – 8 GB eMMC flash (PCN layout supports up to 32GB), and a micro SD card reader.
  • Display – miniDP connector, single channel 24-bit LVDS interface, touch panel connector
  • Connectivity – Gigabit Ethernet port (RJ45)
  • USB – 4x USB Type C ports, 2x USB Type A ports
  • Expansion
    • Arduino UNO headers
    • 12x GTH transceivers @ 12.5 Gbps  (8 on USB Type C connectors + 4 on HS connector)

There’s also mention of an Axiom Link interface that would allow to interconnect multiple AXIOM boards in order to arrange small clusters.

Since it’s a public project I would have expected it to be open source. While there are some deliverables available for download, they appear to be outdated with “the technical specification of AXIOM board” PDF mentioning only AXIOM-15 and AXIOM-35 boards based on the previous Xilinx Zynq-7000 series SoCs. We can also find links to a Wiki, as well as git and svn repository, but all those are in a private area that requires a login, and as far as I could tell, it’s not possible to register. So maybe the EU commission wants to protect its investment, or we just need to be a little more patient. [Update: This Download page  seems to have more public info available]

Click to Enlarge

The AXIOM Board is said to combine features required for High-Performance Computing, Embedded Computing and Cyber-Physical Systems, with typical applications including real-time data analysis of a huge amount of data, machine learning, neural networks, server farms, bitcoin miners, and so on.

It’s unclear when/if the board will be available for sale, and at what price.

Via Board DB and Single Board Computers G+ community.

Alorium XLR8 Arduino Compatible Altera MAX 10 FPGA Board Sells for $75

October 21st, 2016 3 comments

We already have a fair choice of boards with Arduino compatible headers powered by an FPGA with options such as $99 Digilent Arty (Xilinx Artix-7 FPGA), FleaFPGA (Lattice FPGA), Papillio DUO (Xilinx Spartan 6), or Snickerdoodle + shieldBuddy (Xilinx Zynq-7010/20). There’s no yet another choice with Alorium Technology XLR8 Arduino UNO like board powered by Altera MAX10 FPGA.

xlr8-arduino-fpga-board

XLR8 board specifications:

  • FPGA – Altera MAX 10 FPGA
  • MCU – Atmel/Microchip ATmega328 8-bit MCU
  • Digital I/Os
    • 5V inputs, 3.3V outputs
    • 14x Digital I/O Pins
    • 6x PWM Digital I/O Pins
    • 6x Analog Pins
  • Analog Inputs
    • 5V tolerant
    • Op-amp circuit emulates 0-5V behavior of the ADCs on the Arduino UNO
    • Performance: 1 MHz;
    • Resolution: 12-bit sustained
    • Sample Rate: 154k samples/second
  • Power Supply – 5V via USB or barrel connector
  • Dimensions – Arduino UNO form factor

The board is supported by Altera Quartus Prime Lite Edition, and programmable either via JTAG though a USB blaster, or USB with OpenXLR8 and Arduino IDE without additional hardware as shown in the diagram below.

xlr8-programming

The FPGA can be programmed with what the company called Xcelerator Blocks (XB), an optimized hardware implementation of a specific processor intensive function, with functions such as  Floating-point math, servo control, or NeoPixel shields, strips, and arrays control currently available. Future implementations likely to be worked on include: Proportional-Integral-Derivative (PID) control,  event counters  and timers, quadrature encoders/decoders, PWM, multiple UARTs, and enhanced Analog-to-Digital  (ADC) functionality.

Alorium XLR8 board can be purchased on Mouser for $75. More details, including a wiki, a user forum, videos, and various getting started resources are available on Alorium Technology website.

Thanks to Nanik for the tip

Intel Has Started Sampling Altera Stratix 10 ARM Cortex A53 + FPGA SoC

October 12th, 2016 5 comments

Intel bought Altera last year, which means Intel is now in the FPGA business, and the company has recently announced they had started to provide samples of Startix 10 SoC manufactured using Intel 14 nm tri-gate process. The interesting part if that beside FPGA fabric, the SoC also includes four ARM Cortex A53 cores.

intel-stratix-10-fpga-arm

Intel / Altera Stratix 10 SoC key features and specifications:

  • Processor – Quad-core ARM Cortex-A53 MP Core up to 1.5 GHz
  • Logic Core Performance –  1 GHz
  • Logic Density Range – 500K LE – 5.5M LE
  • Embedded Memory – 229 Mb
  • Up to 11,520 18 x 19 Multipliers
  • Up to 144 Transceivers up to 30 Gbps data rate (Chip to Chip)
  • Memory Devices Supported – DDR4 SDRAM @ 1,333 MHz,DDR3 SDRAM @ 1066 MHz, LPDDR3 @ 800 MHz, RLDRAM 3 @ 1200 MHz, QDR IV SRAM @ 1066 MHz, QDR II+ SRAM @ 633 MHz, Hybrid Memory Cube
  • Hard Protocol IP – 3 EMACs, PCI Express Gen3 X 8, 10/40G BaseKR- forward error correction (FEC), Interlaken physical coding sublayer (PCS)
  • Security – AES-256/SHA-256 bitsream encryption/authentication, physically unclonable function (PUF), ECDSA 256/384 boot code authentication, multi-factor key infrastructure with layered hierarchy for root of trust, side channel attack protection

Compared to the previous FPGA generation (Stratix V), Intel claims twice the core performance, five times the density, up to 70% lower power consumption, up to 10 TFLOPS single-precision floating point DSP performance, and up to 1 TBps memory bandwidth with integrated High-Bandwidth Memory (HBM2) in-package.

The new FPGA family targets data centers and networking infrastructures, which require high-bandwidth, multiple protocols and modulation schemes support, with a high performance-per-watt ratio.

You’ll find more details on Altera Stratix 10 FPGA product page.

Categories: Altera Cyclone, Hardware Tags: altera, arm, armv8, fpga, intel

SiFive Introduces Freedom U500 and E500 Open Source RISC-V SoCs

July 12th, 2016 5 comments

Open source used to be a software thing, with the hardware design being kept secret for fear of being copied, but companies such as Texas Instruments realized that from a silicon vendor perspective it would make perfect sense to release open source hardware designs with full schematics, Gerber files and SoM, to allow smaller companies and hobbyists, as well as the education market, normally not having the options to go through standard sales channels and the FAE (Field Application Engineer) support, to experiment with the platform and potentially come up with commercial products. That’s exactly what they did with the Beagleboard community, but there’s still an element that’s closed source, albeit documented: the processor itself.

Freedom U500 Block Diagram

Freedom U500 Block Diagram

But this could change soon, as SiFive, a startup founded by the creators of the free and open RISC-V architecture, has announced two open source SoCs with Freedom U500 processor and Freedom E300 micro-controller.

Freedom U500 (Unleashed family) platform key specifications:

  • U5 Coreplex with 1 to 8 U54 cores @ 1.6GHz+
  • RV64GC Architecture (64- bit RISC-V)
  • Multicore, Cache Coherency Support
  • High Speed Peripherals: PCIe 3.0, USB3.0, GbE, DDR3/4
  • TSMC 28nm

The SoC supports Linux, and targets applications such as machine learning, storage, and networking.

Freedom E300 Block Diagram

Freedom E300 Block Diagram

Freedom E300 (Everywhere family) platform key specifications:

  • E3 Coreplex
  • RV32IMC/RV32EMC Architecture
  • On chip Flash, OTP, SRAM
  • TSMC 180nm

Three real-time operating systems, including FreeRTOS, have already been ported to Freedom E300 for embedded micro-controllers, IoT, and wearable markets.

Open source SoCs are made to be customizable to match your applications exact needs, instead of picking on existing SoC matching your requirements but with some uneeded features. SiFive also explains that “storage customers talks about custom instructions for bit manipulation so they can use one not 10 instructions for 10x speed up”. But before you get to Silicon, you’d normally ruin and customize the core on FPGA boards and three boards are currently available for development and evaluation:

  • Freedom U500:
  • Freedom E300 – Digilent Arty FPGA development kit powered by Xilinx XC7A35T-L1CSG324I FPGA, with 256 MB RAM, 16 MB flash, and vairous expension ports. Price: $99
Click to Enlarge

Xilinx Virtex-7 FPGA VC707 devkit – Click to Enlarge

You also have detailed documentation about the SoCs, U5 nd U3 coreplex, the development kits, software and tools, as well as developer forums, on SiFive developers website. You can also directly checkout the code and SDK on github.

RISC-V instructions set is royalty-free, so compared to the entry level $40,000 ARM license for startups using Cortex M0 MCU, it should provide some savings. It does not help with manufacturing costs which should remain the same. but SiFive expects that open source SoC could be manufactured through a “moderate” crowdfunding campaign.  I have not been able to figure out SiFive business model yet, unless they plan on selling their own chips too, and/or provide customization services to customers.

Lots more information can be found on Sifive website.

Via EETimes