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Posts Tagged ‘fpga’

Amazon EC2 F1 Instances Put Xilinx Virtex Ultrascale+ FPGA Boards into the Cloud

February 22nd, 2017 4 comments

We’ve covered several board and modules based on Xilinx Zynq Ultrascale+ MPSoC such as the AXIOM Board and Trenz TE0808 SoM, both featuring ZU9EG MPSoC, with systems selling for several thousands dollars. But I’ve been informed you may not need to purchase a board to use Virtex UltraScale+ FPGAs, which are different from Zynq UltraScale+ since they lack the ARM CPU & GPU and normally feature a more capable FPGA, as last November, Amazon launched a developer preview of F1 instances giving access to this type of hardware from their cloud.

That’s the FPGA hardware you’ll be able to access from one F1 instance:

  • Xilinx UltraScale+ VU9P manufactured using a 16 nm process.
  • 64 GB of ECC-protected memory on a 288-bit wide bus (four DDR4 channels).
  • Dedicated PCIe x16 interface to the CPU.
  • Approximately 2.5 million logic elements.
  • Approximately 6,800 Digital Signal Processing (DSP) engines.
  • Virtual JTAG interface for debugging.

I understand those FPGA boards are PCIe card plugged into servers with an Intel Broadwell E5 2686 v4 processor, up to 976 GB of memory, and up to 4 TB of NVMe SSD storage. This is obviously only usable if the FPGA do not need extra hardware connected to the board.

You can choose from two instance types as described in the table below.

Instance Type FPGA Cards vCPUs Instance Memory (GiB) SSD Storage (GB) Enhanced Networking EBS Optimized
f1.2xlarge 1 8 122 480 Yes Yes
f1.16xlarge 8 64 976 4 x 960 Yes Yes

Amazon provides an hardware development kit or FPGA Developer AMI (Amazon Instance), where developers write and debug FPGA code on their own hardware/instance, before creating an “Amazon FPGA image” (AFI), and attaching it to an F1 instance as describe in the first diagram of this post. If you’re a customer who needs a specific “acceleration routine”, you don’t even need the FPGA development kit, as you can purchase the AFI on the market place, and deploy it on F1 instances.

If you are interested in Amazon solution and want to know more and get started, Amazon organized a one hour webinar last December.

Hardware-accelerated computing leveraging FPGAs is especially used for genomics research, financial analytics, real time video processing, big data search and analytics, and security applications.

AFAIK, Amazon has still not officially launched F1 instances commercially, at which point you’ll be able to pay by the hour for the use of the instance, but you can still sign up for the F1 preview.

Thanks to Jon for the tip.

Trenz Electronic TE0808 UltraSOM+ is a Xilinx Zynq Ultrascale+ ZU9EG System-on-Module

February 21st, 2017 1 comment

Xilinx Zynq Ultrascale+ ARM Cortex A53 + FPGA SoC have now started to show up in boards such as AXIOM Board based on Zynq Ultrascale+ ZU9EG. Price for the board has not been announced, and while a similar Xilinx development kit goes for close to $3,000, some people are expecting the board to sell for $400 to $600. Since the price of FPGA vary a lot from a few dollars to $40,000 for the top end chips, I decided to find pricing info about Xilinx Zynq Ultrascale+ MPSoCs which lead me to Trenz Electronic TE0808 system-on-module, which was unveiled in May last year, and I’ll cover in the second part of this post, after – hopefully quickly – describing Zynq Ultrascale+ family and nomenclature, and addressing the price “issue”.

First, there are three sub-families within Zynq Ultrascale+ MPSoC portfolio:

  • CG models with 2x Cortex A53, 2x Cortex R5, FPGA fabric
  • EG models with 4x Cortex A53, 2x Cortex R5, a Mali-400 GPU, and FPGA fabric
  • EV models based on EG, but adding a H.264 / H.265 video codec capable of simultaneous encode and decode up to 4Kx2K (60fps)

Within each sub-families there are multiple parts that differ by their number of logic cells, and I/Os. Since AXIOM board is using ZU9EG, I focused on EG family which start from ZU2EG up to ZU19EG.

Click to Enlarge

Once you’ve selected a part like ZU9EG, you’ll need to select a package ranging from FFVC900 (900-pin) to FFVE1924 (1924-pin), and offering options in terms of the number of the number serial transceivers and I/Os. So I plan to check the price for ZU9EG with FFBV900 package which should be the cheapest for that model.

While 1688.com is a great site to check price for Chinese SoCs, you’ll probably want to use Octopart to check for other silicon vendors, and that’s what I did to check ZZU9EG-FFVC900 price. The cheapest I could find was on AVNet Asia for $2407 in single unit. The price should go down a bit in multiple quantities, but we should still expect boards based on this model to be around $2,500 to 3,000.

With that out of the way, let’s now look at Trenz Electronics’ SoM.

Click to Enlarge

TE0808 UltraSOM+ specifications:

  • SoC – Xilinx Zynq Ultrascale+ ZU9EG MPSoC with four ARM Cortex A53 cores @ up to 1.2 GHz, two Cortex R5 “real-time” cores @ 500MHz, a Mali-400MP GPU, 600K System Logic Cells
  • System Memory –  2GB 64-Bit DDR4 by default (up to 8 GB supported)
  • Storage – 2x 32 MB dual parallel SPI Boot Flash by default (up to 512 MB supported)
  • User I/Os:
    • 65x MIO, 48x high-density (HD) I/Os (all), 156x high performance (HP) I/Os  (3 banks)
    • Serial transceiver – 4x GTR + 16 x GTH
    • Transceiver clocks inputs and outputs
    • PLL clock generator inputs and outputs
  • Board to Board Connectors – 4x 160-pin
  • Power Supply – Single 3.3V power source required; 14 on-board DC-DC regulators and 13 LDOs; LP, FP, PL separately controlled power domains
  • Dimensions – 76 x 52 mm; 3mm mounting hole for skyline heat spreader

Click to Enlarge

Two models are available with TE0808-03ES2 and TE0808-03-02I with the later coming with the first one based on XCZU9EG-1FFVC900 and the second XCZU9EG-2FFVC900I. I could not find what the differences are between “1FF” and “2FF” SoC. Note that the ICs used are currently engineering samples. The company recommends Vivado HL Design Edition to program the FPGA part of the chip, and PetaLinux 2016.4 is running on the ARM cores. You’ll find all technical information you may need via the Wiki, and support from the forums.

Trenz can also provide TEBF0808-04 baseboard for development, part of TE0808-03ES2-S Starter Kit with a E0808-03 module  SoM, a black Core V1 Mini-ITX Enclosure, a 12 V power supply, 2x XMOD FTDI JTAG Adapter, an 8 GB micro SD card, a USB cable and two Phillips screws.

Starter Kit and Baseboard – Click to Enlarge

Baseboard key features and specifications:

  • Storage – micro SD card, eMMC flash (both bootable), 1x SATA connector
  • Video Output – Displayport Single Lane PS GT Connected
  • Connectivity – Gigabit Ethernet RJ45, Dual SFP+
  • USB – USB3 with USB3 HUB
  • Expansion
    • PCIe slot – PS GT Connected, one PCIe lane (16 Lane Connector)
    • FMC HPC Slot (1.8V max VCCIO)
    • One Samtec FireFly (4 GT lanes bidir)
    • One Samtec FireFly connector for reverse loopback
    • CAN FD Transceiver (10 Pin IDC Connector)
  • Debugging – 20 Pin ARM JTAG Connector (PS JTAG0)
  • Misc – Fan connectors, FMC Fan, Intel front panel connector (PWR/RST/LED), Intel HDA Audio connector
  • Power Supply
    • ATX Power supply connector (12V only PS Required)
    • Optional 12V Standard Power Plug
  • Dimensions – Mini-ITX form factor

TE0808-03ES2 SoM sells for 2,500 Euros in low quantities excluding VAT and shipping costs, TE0808-03-02I for 3,500 Euros, and the Starter Kit for 3,800 Euros. Prices go down to as low as 1,750 Euros per unit  for orders of 1,000 modules or more. You’ll find purchase links on Trenz Electronic’ shop TE0808 Ultrascale+ page.

EU funded AXIOM Board is Powered by Xilinx Zynq UltraScale+ FPGA + ARM SoC

February 17th, 2017 9 comments

Back in 2015, Xilinx unveiled Zynq Ultrascale+ MPSoC combining ARM Cortex A53 & Cortex R5 cores, a Mali-400MP2 GPU, and UltraScale FPGA, and the company recently launched ZCU102 Evaluation Kit based on the SoC, which sells for just under $3,000. But if you are based in the European Union, you’ll be glad to learn about 4 millions Euros of your taxes have been spent to design a board based on the same MPSoC family as part of the AXIOM project, which was developed in collaboration with European universities and companies with the “aim of researching new software/hardware architectures for Cyber-Physical Systems (CPS) to meet the expectations” in terms of computational power, energy efficiency, scalability through modularity, easy programmability, and leverage of the best existing standards at minimal costs.

AXIOM (Agile, eXtensible, fast I/O Module) board’s key specifications:

  • SoC – Xilinx Zynq Ultrascale+ ZU9EG MPSoC with four ARM Cortex A53 cores @ 1.2GHz, two Cortex R5 “real-time” cores @ 500MHz, a Mali-400MP GPU @ 600 MHz, 600K System Logic Cells;
  • System Memory – 32 GB of swappable SO-DIMM RAM  (up to 32GB) for the Processing System, plus a soldered 1 GB Programmable Logic.
  • Storage – 8 GB eMMC flash (PCN layout supports up to 32GB), and a micro SD card reader.
  • Display – miniDP connector, single channel 24-bit LVDS interface, touch panel connector
  • Connectivity – Gigabit Ethernet port (RJ45)
  • USB – 4x USB Type C ports, 2x USB Type A ports
  • Expansion
    • Arduino UNO headers
    • 12x GTH transceivers @ 12.5 Gbps  (8 on USB Type C connectors + 4 on HS connector)

There’s also mention of an Axiom Link interface that would allow to interconnect multiple AXIOM boards in order to arrange small clusters.

Since it’s a public project I would have expected it to be open source. While there are some deliverables available for download, they appear to be outdated with “the technical specification of AXIOM board” PDF mentioning only AXIOM-15 and AXIOM-35 boards based on the previous Xilinx Zynq-7000 series SoCs. We can also find links to a Wiki, as well as git and svn repository, but all those are in a private area that requires a login, and as far as I could tell, it’s not possible to register. So maybe the EU commission wants to protect its investment, or we just need to be a little more patient. [Update: This Download page  seems to have more public info available]

Click to Enlarge

The AXIOM Board is said to combine features required for High-Performance Computing, Embedded Computing and Cyber-Physical Systems, with typical applications including real-time data analysis of a huge amount of data, machine learning, neural networks, server farms, bitcoin miners, and so on.

It’s unclear when/if the board will be available for sale, and at what price.

Via Board DB and Single Board Computers G+ community.

Alorium XLR8 Arduino Compatible Altera MAX 10 FPGA Board Sells for $75

October 21st, 2016 3 comments

We already have a fair choice of boards with Arduino compatible headers powered by an FPGA with options such as $99 Digilent Arty (Xilinx Artix-7 FPGA), FleaFPGA (Lattice FPGA), Papillio DUO (Xilinx Spartan 6), or Snickerdoodle + shieldBuddy (Xilinx Zynq-7010/20). There’s no yet another choice with Alorium Technology XLR8 Arduino UNO like board powered by Altera MAX10 FPGA.

xlr8-arduino-fpga-board

XLR8 board specifications:

  • FPGA – Altera MAX 10 FPGA
  • MCU – Atmel/Microchip ATmega328 8-bit MCU
  • Digital I/Os
    • 5V inputs, 3.3V outputs
    • 14x Digital I/O Pins
    • 6x PWM Digital I/O Pins
    • 6x Analog Pins
  • Analog Inputs
    • 5V tolerant
    • Op-amp circuit emulates 0-5V behavior of the ADCs on the Arduino UNO
    • Performance: 1 MHz;
    • Resolution: 12-bit sustained
    • Sample Rate: 154k samples/second
  • Power Supply – 5V via USB or barrel connector
  • Dimensions – Arduino UNO form factor

The board is supported by Altera Quartus Prime Lite Edition, and programmable either via JTAG though a USB blaster, or USB with OpenXLR8 and Arduino IDE without additional hardware as shown in the diagram below.

xlr8-programming

The FPGA can be programmed with what the company called Xcelerator Blocks (XB), an optimized hardware implementation of a specific processor intensive function, with functions such as  Floating-point math, servo control, or NeoPixel shields, strips, and arrays control currently available. Future implementations likely to be worked on include: Proportional-Integral-Derivative (PID) control,  event counters  and timers, quadrature encoders/decoders, PWM, multiple UARTs, and enhanced Analog-to-Digital  (ADC) functionality.

Alorium XLR8 board can be purchased on Mouser for $75. More details, including a wiki, a user forum, videos, and various getting started resources are available on Alorium Technology website.

Thanks to Nanik for the tip

Intel Has Started Sampling Altera Stratix 10 ARM Cortex A53 + FPGA SoC

October 12th, 2016 5 comments

Intel bought Altera last year, which means Intel is now in the FPGA business, and the company has recently announced they had started to provide samples of Startix 10 SoC manufactured using Intel 14 nm tri-gate process. The interesting part if that beside FPGA fabric, the SoC also includes four ARM Cortex A53 cores.

intel-stratix-10-fpga-arm

Intel / Altera Stratix 10 SoC key features and specifications:

  • Processor – Quad-core ARM Cortex-A53 MP Core up to 1.5 GHz
  • Logic Core Performance –  1 GHz
  • Logic Density Range – 500K LE – 5.5M LE
  • Embedded Memory – 229 Mb
  • Up to 11,520 18 x 19 Multipliers
  • Up to 144 Transceivers up to 30 Gbps data rate (Chip to Chip)
  • Memory Devices Supported – DDR4 SDRAM @ 1,333 MHz,DDR3 SDRAM @ 1066 MHz, LPDDR3 @ 800 MHz, RLDRAM 3 @ 1200 MHz, QDR IV SRAM @ 1066 MHz, QDR II+ SRAM @ 633 MHz, Hybrid Memory Cube
  • Hard Protocol IP – 3 EMACs, PCI Express Gen3 X 8, 10/40G BaseKR- forward error correction (FEC), Interlaken physical coding sublayer (PCS)
  • Security – AES-256/SHA-256 bitsream encryption/authentication, physically unclonable function (PUF), ECDSA 256/384 boot code authentication, multi-factor key infrastructure with layered hierarchy for root of trust, side channel attack protection

Compared to the previous FPGA generation (Stratix V), Intel claims twice the core performance, five times the density, up to 70% lower power consumption, up to 10 TFLOPS single-precision floating point DSP performance, and up to 1 TBps memory bandwidth with integrated High-Bandwidth Memory (HBM2) in-package.

The new FPGA family targets data centers and networking infrastructures, which require high-bandwidth, multiple protocols and modulation schemes support, with a high performance-per-watt ratio.

You’ll find more details on Altera Stratix 10 FPGA product page.

Categories: Altera Cyclone, Hardware Tags: altera, arm, armv8, fpga, intel

SiFive Introduces Freedom U500 and E500 Open Source RISC-V SoCs

July 12th, 2016 5 comments

Open source used to be a software thing, with the hardware design being kept secret for fear of being copied, but companies such as Texas Instruments realized that from a silicon vendor perspective it would make perfect sense to release open source hardware designs with full schematics, Gerber files and SoM, to allow smaller companies and hobbyists, as well as the education market, normally not having the options to go through standard sales channels and the FAE (Field Application Engineer) support, to experiment with the platform and potentially come up with commercial products. That’s exactly what they did with the Beagleboard community, but there’s still an element that’s closed source, albeit documented: the processor itself.

Freedom U500 Block Diagram

Freedom U500 Block Diagram

But this could change soon, as SiFive, a startup founded by the creators of the free and open RISC-V architecture, has announced two open source SoCs with Freedom U500 processor and Freedom E300 micro-controller.

Freedom U500 (Unleashed family) platform key specifications:

  • U5 Coreplex with 1 to 8 U54 cores @ 1.6GHz+
  • RV64GC Architecture (64- bit RISC-V)
  • Multicore, Cache Coherency Support
  • High Speed Peripherals: PCIe 3.0, USB3.0, GbE, DDR3/4
  • TSMC 28nm

The SoC supports Linux, and targets applications such as machine learning, storage, and networking.

Freedom E300 Block Diagram

Freedom E300 Block Diagram

Freedom E300 (Everywhere family) platform key specifications:

  • E3 Coreplex
  • RV32IMC/RV32EMC Architecture
  • On chip Flash, OTP, SRAM
  • TSMC 180nm

Three real-time operating systems, including FreeRTOS, have already been ported to Freedom E300 for embedded micro-controllers, IoT, and wearable markets.

Open source SoCs are made to be customizable to match your applications exact needs, instead of picking on existing SoC matching your requirements but with some uneeded features. SiFive also explains that “storage customers talks about custom instructions for bit manipulation so they can use one not 10 instructions for 10x speed up”. But before you get to Silicon, you’d normally ruin and customize the core on FPGA boards and three boards are currently available for development and evaluation:

  • Freedom U500:
  • Freedom E300 – Digilent Arty FPGA development kit powered by Xilinx XC7A35T-L1CSG324I FPGA, with 256 MB RAM, 16 MB flash, and vairous expension ports. Price: $99
Click to Enlarge

Xilinx Virtex-7 FPGA VC707 devkit – Click to Enlarge

You also have detailed documentation about the SoCs, U5 nd U3 coreplex, the development kits, software and tools, as well as developer forums, on SiFive developers website. You can also directly checkout the code and SDK on github.

RISC-V instructions set is royalty-free, so compared to the entry level $40,000 ARM license for startups using Cortex M0 MCU, it should provide some savings. It does not help with manufacturing costs which should remain the same. but SiFive expects that open source SoC could be manufactured through a “moderate” crowdfunding campaign.  I have not been able to figure out SiFive business model yet, unless they plan on selling their own chips too, and/or provide customization services to customers.

Lots more information can be found on Sifive website.

Via EETimes

OpenCellular is Facebook’s (soon to be) Open Source Wireless Access Platform

July 7th, 2016 4 comments

A few months after Canonical and Lime Micro LimeSDR open source software defined radio aiming to be used as a development platform, but also as the base for low cost cellular or other wireless base stations, Facebook has announced their own open source wireless access platform with OpenCellular project whose goal is to lower the cost of Internet connectivity in remote areas where the infrastructure does not exist.

OpenCellularThis is how Marc Zuckerberg summarizes the project:

We designed OpenCellular as an open system so anyone — from telecom operators to researchers to entrepreneurs — can build and operate wireless networks in remote places. It’s about the size of a shoe box and can support up to 1,500 people from as far as 10 kilometers away.

Along with our solar-powered aircraft Aquila and high-bandwidth laser beams, OpenCellular is the next step on our journey to provide better, more affordable connectivity to bring the world closer together.

But we can get some more details via another post by Kashif Ali, Engineer at Facebook including the following key points:

  • OpenCellular will supporting everything from 2G to LTE.
  • The system is composed of two main subsystems: general-purpose and base-band computing (GBC) with integrated power and housekeeping system, and radio frequency (RF) with integrated analog front-end.
  • The project will become open source over time, with hardware design, firmware and control software source code released publicly.
  • Facebook will collaborate with Telecom Infra Project (TIP) members, whose aim is to “reimagine the traditional approach to building and deploying telecom network infrastructure”.

OpenCellular_GBC_Radio The current GBC system supports four power sources: PoE (power-over-ethernet), solar, DC, and external (lead acid) or internal (lithium ion) batteries, and also includes sensors to monitor temperature, voltage, current, etc.. Two versions of the radio system are available on based on either one SoC (fixed functionality), or one FPGA (software defined radio). The radio can be used a full network-in-a-box when connected to the GBC, or an access point in standalone mode.

The systems have also been designed to allow a single person to install and operate them, and the enclosures are rugged to withstand all kinds of weather. The company has been testing it using 2G connectivity within their office, and expect to release the first reference design this summer.

Thank you Nanik!

Categories: Hardware Tags: 2g, 3G, facebook, fpga, lte, sdr, sensor, solar

LinkSprite O-board Altera Cyclone IV FPGA Development Board Targets OpenRISC Development

May 24th, 2016 2 comments

OpenRISC project‘s goal is to create a free and open processor for embedded system that include  RISC instruction set architecture with DSP features, an open source implementations of the architecture, open source development tools and software, and simulators. You normally need FPGA board to emulate the processor before silicon is made available, so LinkSprite designed the O-board powered by Altera Cyclone IV FPGA to help with OpenRISC development and evaluation.

O-BoardO-board specifications:

  • FPGA – Altera Cyclone IV E with 22K LUT (P/N: EP4CE22F17C8N)
  • System Memory – 32MB SDRAM
  • Storage – 1MB SPI FLASH, micro SD slot
  • Connectivity – 1x Fast Ethernet (RJ45)
  • USB – 1x micro USB for OTG HOST/SLAVE, 1 x micro USB for power supply, configuration, 2x UARTs, 2x JTAG…
  • Expansion connectors – 2x 70-pin headers
  • Power Supply – 5V via miro USB
  • Dimensions – 96 x 40 mm

OpenRISC_FPGA_BoardThe Wiki for the board explained how to get started with development with a Ubuntu image for VirtualBox pre-loaded with all necessary tools and files to program the FPGA and then boot Linux on OpenRISC processor emulated on the FPGA.

O-board is sold for $179 on CuteDigi store and $185 on Amazon US.