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Posts Tagged ‘fpga’

IceZero Lattice iCE40 FPGA Board is Designed for Raspberry Pi Zero

June 24th, 2017 1 comment

Yesterday, we reported about Olimex’s open source hardware iCE40HX8K-EVB board with a Lattice iCE40 (HX8K) FPGA, and today, another iCE40 FPGA board, also open source hardware, appeared in my news feed with Trenz Electronic’s IceZero board specifically designed to be programmed using a Raspberry Pi Zero board.

Click to Enlarge

IceZero board specifications:

  • FPGA – Lattice ICE40HX4K with 3520 logic gates, and 80 Kbit memory
  • Storage – SPI Flash for FPGA self-configuration
  • Misc – 3x User LEDs;  User Clock: 100 MHz
  • Expansion – 4x unpopulated PMOD Connectors; 40-pin Raspberry Pi female header
  • Dimensions – 56 x 30.5mm (Raspberry Pi HAT Compatible)

The board is supported by icoTC open source FPGA toolchain for Windows and Linux, which you can use in Raspberry Pi Zero (W), and other RPi board with a 40-pin header running Raspbian, as explained in that simple example in Github. Trenz electronic only shared part of the documentation, but you’ll find everything on a blog post on Black Mesa Labs with the design files licensed with the CERN Open Hardware License v1.2, and more technical details about the board.

Block Diagram with Raspberry Pi

Trenz Electronic sells IceZero board for 34 Euros excluding VAT and shipping, but in case you’d like to make it yourself, you can also order the bare PCB on OSH Park.

Olimex Introduces 40 Euros iCE40HX8K-EVB Board with Lattice ICE40 FPGA

June 23rd, 2017 No comments

Last year, Olimex launched their first FPGA board with iCE40HX1K-EVB. The board is very cheap at 22 Euros, but what you can do with it is limited since it only comes with 1280 logic cells. The company has now introduced an upgraded model called iCE40HX8K-EVB with 7680 logic cells, and more I/O headers.

Olimex iCE40HX8K-EVB specifications:

  • FPGA – Lattice Semi iCE40HX8K-CT256 FPGA with 7680 logic gates, 960 Logic Array Blocks, and 128 Kbit memory
  • System Memory – 256Kx16 SRAM (512KB SRAM)
  • Storage – 2MB serial flash
  • Expansion
    • 34-pin connector to access FPGA I/Os
    • 4x 40 pin connectors for GPIOs
  • Debugging / Programming – 10-pin “PGM” connector
  • Misc – 2x user buttons, reset button, 2x user LEDs, power & programming status LEDs
  • Power Supply – 5V via power jack
  • Dimensions – 67×65 cm

The board is open source hardware with the KiCAD schematics and PCB layout, BoM, and Gerber files available on Github. Lattice IceCube2 or Project IceStorm can be used to program the board. So that means we have an open source FPGA board designed with an open source CAD software (KiCAD), and programmable in Verilog with an open source tool (Project IceStorm).

iCE0-ADC Board

You can use the 34-pin connector to connect add-on boards such as:

  • iCE40-ADC with 100Mhz ADC
  • iCE40-DAC with 100Mhz DAC
  • iCE40-IO with VGA, PS2 and IrDA transceiver
  • MOD-DIO with logic analyzer level shifter with programmable 1.5-5.5V threshold.

The modules can be daisy chained with up to 4x DAC and 4x ADC modules.

Olimex iCE40HX8K-EVB can be purchased for 39.95 Euros on Olimex store, where you’ll also find the aforementioned add-on boards for 9.95 to 15.95 Euros.

$89 MiniZed Development Board based on Xilinx Zynq Z-7007S SoC Includes WiFi, Bluetooth, Arduino Headers

June 14th, 2017 6 comments

Avnet has unveiled MiniZed development board – part of ZedBoard family – powered by a Xilinx Zynq Z-7007s SoC with an ARM Cortex A9 processor and FPGA fabric,  supporting WiFi and Bluetooth connectivity, and equipped with Arduino and PMOD headers.

MiniZed board (AES-MINIZED-7Z007-G) specifications:

  • SoC – Xilinx Zynq-7007S single ARM Cortex A9 processor up to 677 MHz + FPGA with 23K logic cells, 1.8 Mb block RAM, 60 DSP slices
  • System Memory – 512 MB DDR3L
  • Storage –  8 GB eMMC flash, 128 Mbit QSPI flash
  • Connectivity –  Wi-Fi 802.11b/g/n and Bluetooth 4.1 plus EDR and BLE  via Murata “Type 1DX” wireless module
  • USB – 1x USB 2.0 host port
  • Sensors – 3-axis accelerator and temperature sensor (LIS2DS12);  Digital Microphone (MP34DT05)
  • Expansion Interfaces:
    • 2x Pmod compatible connectors with 16x GPIOs
    • Arduino UNO R3 compatible header with 22x GPIOs
  • Debugging –  JTAG and serial console via micro USB port
  • Misc – 2x bi-element user LEDs, user & reset push buttons; user switch
  • Power Supply – 5V via micro USB port

The company provides bare-metal code samples, as well as Xilinux PetaLinux for the board. You’ll find hardware and software documentation, including BoM, schematics, and getting started guides on the documentation page.

 

Click to Enlarge

MiniZed is the cheapest Zedboard so far, which makes it ideal as a training, prototyping and proof-of-concept demo platform, and it can be used to showcase wireless designs using Wi-Fi and Bluetooth, audio signal processing examples with the MIC input, as well as IoT & cloud demos using external and on-board sensors.

MiniZed can be purchased for $89 on Avnet with the company mentioning that the retail price may be higher in Asia, Australia, New Zealand and Japan. You may find further info on Zedboard.org’s MiniZed page.

Intel DLIA is a PCIe Card Powered by Aria 10 FPGA for Deep Learning Applications

May 29th, 2017 No comments

Intel has just launched their DLIA (Deep Learning Inference Accelerator) PCIe card powered by Intel Aria 10 FPGA, aiming at accelerating CNN (convolutional neural network) workloads such as image recognition and more, and lowering power consumption.

Some of Intel DLIA hardware specifications:

  • FPGA – Intel (previously Altera) Aria 10 FPGA @ 275 MHz delivering up to 1.5 TFLOPS
  • System Memory – 2 banks 4G 64-bit DDR4
  • PCIe – Gen3 x16 host interface; x8 electrical; x16 power & mechanical
  • Form Factor – Full-length, full-height, single wide PCIe card
  • Operating Temperature – 0 to 85 °C
  • TDP – 50-75Watts hence the two cooling fans

The card is supported in CentOS 7.2, and relies on Intel Caffe framework, Math Kernel library for Deep Neural Networks (MKL-DNN), and works with various network topologies (AlexNet, GoogleNet, CaffeNet, LeNet, VGG-16, SqueezeNet…). The FPGA is pre-programmed with Intel Deep Learning Accelerator IP (DLA IP).

Intel DLIA can be used by cloud services providers to filter content, track product photos, for surveillance and security applications for example for face recognition and license plate detection, in the factory to detect defects automatically, and in retail stores to track foot traffic, and monitor inventory.

You’ll find more details including links to get started and the SDK in the product page.

Melon S3 FPGA Arduino & Raspberry Pi Compatible Board is Programmable over WiFi using ESP8266 WiSoC

May 25th, 2017 4 comments

Q-Wave Systems, an embedded systems company based in Thailand, has designed Melon S3 FPGA board powered by a Xilinx Spartan 3E FPGA with WiFi connectivity added through a ESP8266 module programmable with the Arduino IDE , and featuring two Raspberry Pi compatible headers. The FPGA bitstream can be updated over  WiFi, and does not require a JTAG debugger.

Melon S3 FPGA Prototype

Melon S3 FPGA specifications:

  • FPGA – Xilinx Spartan XC3S500E FPGA with 500K gates, 73Kb Distributed RAM, 4 Digital Clock Manager (DCM), 20 Multipliers (18×18), 360 Kb Block RAM
  • WiFi module – WROOM-2 with Espressif ESP8266 32-bit MCU @ 80 MHz supporting 802.11 b/g/n WiFi.
  • Storage – 4MB SPI flash in total with 1MB for ESP8266, 3 MB for FPGA
  • Expansion – 2x 40-pin Raspberry Pi compatible headers; 3.3V tolerant
  • Debugging – Onboard USB-UART Silicon Labs CP2104 for configuration, debugging and power; 6-pin JTAG port for debugging/programming
  • Misc – 8x Users LEDs, 4x DIP switch user button, 1x reset button,  on-board 50 MHz FPGA clock
  • Power Supply – 5V via micro USB port
  • Dimensions – 65 mm x 56.5 mm x 10 mm
  • Weight – 20g

Block Diagram for Melon S3 FPGA – Click to Enlarge

The board can be used in standalone, but it’s also compliant with Raspberry Pi HAT form factor, and can be inserted on top of Raspberry Pi boards with 40-pin headers, which in theory would allow you to run the Arduino IDE directly on Raspberry Pi to program Melon S3 FPGA board.

You can also program the FPGA  using development tools such as Xilinx ISE Webpack (free), MATLAB HDL Coder/HDL Verifier and National Instruments LabVIEW FPGA Toolkit, and upload the resulting bitstream using the board’s web interface.

Melon S3 FPGA Labview Programming with Raspberry Pi / Computer

The board is available via a sort of self-organized crowdfunding campaign, with at least 50 backers required by May 31. At the latest update, they had 74 backers, so the project will go ahead with mass production and shipping taking place in June. They’ll eventually post all documentation, hardware design files, and source code in Melon_S3_FPGA github repository (currently empty), but in the meantime you can get some information, including schematics in PDF, and a more details overview of the board and the way to program it in the product page in English, where you’ll also be able to order it for $79.99 plus shipping.  If you are based in Thailand, you can get it for 2,800 Baht instead.

All backers will also be invited to a free one day seminar to learn out to use the board, as long as you are ready to go to Bangkok  in Thailand.

Meet Zynqberry, a Xilinx Zynq FPGA Board with Raspberry Pi 2/3 Form Factor

May 10th, 2017 19 comments

Earlier this year, I wrote about Trenz Electronic’s Xilinx Zynq Ultrascale+ system-on-module, but I’ve just found out I missed another interesting product from the company. The ZynqBerry is a board powered by Zilinx Zync Z-7007S or Z-7010 ARM + FPGA SoC with Raspberry Pi 2/3 form factor.

Click to Enlarge

ZynqBerry specifications:

  • SoC
    • Xilinx Zynq XC7Z007S-1CLG225C (Z-7007S) single core ARM Cortex-A9 MPCore up to 766MHz + FPGA with 23K logic cells
    • Xilinx Zynq XC7Z010-1CLG225C (Z-7010) dual core ARM Cortex-A9 MPCore up to 866 MHz + FPGA with 28K logic cells
  • System Memory – 128 or 512 MB DDR3L
  • Storage – 16 MB Flash SPI flash + micro SD card slot
  • Video Output – HDMI, MIPI DSI interface
  • Audio Output – HDMI, 3.5mm audio jack (PWM audio only)
  • Connectivity – 100 MBit Ethernet via (LAN9514 USB Hub with Ethernet
  • USB – 4x USB 2.0 host ports
  • Camera – MIPI CSI-2 interface
  • Expansion – 40-pin Raspberry Pi compatible header
  • Debugging – USB UART and JTAG ARM & FPGA debug via micro USB
  • Power Supply – 5V via micro USB port
  • Dimensions – Raspberry Pi form factor

TE0726-03

Three different hardware versions of the board are available:

  • TE0726-03R – Minimal version with Xilinx Z-7010, 128 MB RAM, no Ethernet, no USB, no HDMI, no MIPI connectors – 79 Euros
  • TE0726-03M – Xilinx Z-7010 with 512 MB RAM – 109 Euros
  • TE0726-03-07S-1C – New model equipped with Xilinx Z-7007S + 512 MB RAM – 99 Euros

The ARM core(s) on the board run PetaLinux, and FPGA part can be programmed using Vivado Design Suite. You’ll find software and hardware documentation, and demos (HDMI, SDR, ALSA, CSI) in the Wiki. Some knowledge of German may be useful in the download area.

ZynqBerry boards can be purchased directly on Trenz Electronic website.

Christmann RECS|Box Atlas Quad Apalis Microserver Evaluation Kit Supports Four Toradex Apalis SoM

May 10th, 2017 1 comment

System-on-modules are normally used in low volume embedded systems, but they can also be used in microservers, for example to upgrade capacity as needed. Christmann informationstechnik + medien GmbH has developed a microserver evaluation kit taking up to 4 Toradex Apalis SoMs for example based on Nvidia Tegra K1 processor, and also offers full rack systems with up to 72 modules.

RECS|Box Atlas Quad Apalis with 4 Apalis Modules – Click to Enlarge

Christmann RECS|Box Atlas Quad Apalis specifications:

  • Modules – 4x Slots for Apalis SoM
  • Connectivity – 1 GBit/s Compute Ethernet, 1 GBit/s Management Ethernet
  • Video Output – 1x HDMI
  • USB – 3x USB host ports, 1x micro USB port
  • Misc – 5 Status LEDs for USB, communication, and serial console, 4x fan connectors, KWM switch, 5x temperature sensors, 6x current sensors, 1x voltage monitor, fan speed monitoring
  • Power Supply – 12V via a 4-pin jack
  • Dimensions – 300 x 145 x 68 mm

The evaluation kit includes an Atlas board with an  acrylic base plate and 2 fans, a power supply, a micro USB cable, and an Apalis baseboard, but Apalis modules, which could have to purchase separately with a choice of NXP i.MX6, Nvidia Tegra 3, or Tegra K1 processor. Toradex is also working on an NXP i.MX8 version of their Apalis module, and Christmann  appears to have designed their own Apalis compliant SoM based on Samsung Exynos 5250. There’s no mention about the operating systems to run on the module, but the company provides “RECS Master” monitoring software running on your computer.

Click to Enlarge

RECS|Box Atlas Quad Apalis platform is sold for 1,275 Euros (without the modules), and once you are happy with your evaluation, you may select rack systems such as RECS|Box Antares and Arneb 19”  which can run 24 and 72 Apalis System on Modules respectively in a cluster configuration. If you prefer x86 (or FPGA) servers, the company also provides eval kit and servers taking COM Express modules. You’ll find more info on Christmann informationstechnik + medien’s embedded website.

SiFive Launches 32-bit E31 Coreplex & 64-bit E51 Coreplex RISC-V Processors, Reveals Pricing

May 5th, 2017 4 comments

SiFive unveiled their Freedom U500 and E500 open source RISC-V SoCs last year, and a little layer launched HiFive1 Arduino compatible development board based on SiFive Freedom E310 processor. The company has now launched their non-open source Coreplex IP also based on RISC-V ISA with the 32-bit E31 Coreplex and 64-bit E51 Coreplex, and explained details about pricing.

E51 Coreplex – Click to Enlarge

Some of the key features of the processors are listed below:

  • E31 Coreplex
    • 32-bit RV32IMAC core @ 900 to 1.5 GHz (with 28nm process)
    • Advanced Memory Subsystem – 16KB, 2-way Instruction Cache, Instruction Tightly Integrated Memory (ITIM) option, up to 64KB Data Tightly Integrated Memory (DTIM) support
    • Up to 16 local interrupts with vectored addresses
    • Performance – 1.61 DMIPS/MHz  ; 2.73 Coremark/MHz
    • Power Consumption
      • 28nm HPC process – Core only: 150 DMIPS/mW ; Coreplex: 41 DMIPS/mW
      • 55nm LP process – Core only: 95 DMIPS/mW; Coreplex: 16 DMIPS/mW
    • Applications: Edge Computing, Smart IoT or Wearables.
    • Suited to replace the Cortex-M3 and Cortex-M4, but provides even higher performance without sacrificing area or power.
  • E51 Coreplex
    • 64-bit RV64IMAC embedded core @ 900 to 1.5 GHz (28nm process)
    • Advanced Memory Subsystem – 16KB, 2-way Instruction Cache, Instruction Tightly Integrated Memory (ITIM) option, up to 64KB Data Tightly Integrated Memory (DTIM) support
    • Support for up to 40 physical address bits
    • Up to 16 local interrupts with vectored addresses
    • Performance – 1.8 DMIPS/MHz  ; 2.76 Coremark/MHz
    • Power Consumption
      • 28nm HPC process – Core only: 125 DMIPS/mW ; Coreplex: 36 DMIPS/mW
      • 55nm LP process – Core only: 36 DMIPS/mW; Coreplex: 15 DMIPS/mW
    • Applications:
      • System or host control core within a larger 64-bit SoC
      • SSD controllers and network processors which require 64-bit compute without the requirement of virtual memory or full-featured operating systems.

SiFive R31 Coreplex Block Diagram – Click to Enlarge

If you want to manufacture an ARM processor, you first need to buy a license before accessing any information, and once you’re shipping your chips, you’ll pay royalties for each SoC sold with one or more ARM cores. SiFive business model is different. First, it’s free to try Coreplex IP on FPGA boards such as Digilent Arty, or evaluate RTL code in your own environment, so you don’t need to commit to any large investment before knowing whether you’ll go ahead with the cores. SiFive Coreplex IP is also royalty-free so how much you pay does not depend on how many chips you sell, and the way they make money is through a one-time license that costs $275,000 and up for E31 Coreplex, and $595,000 and up for E51 Coreplex with the exact price depending on options.

You’ll find the full details on Sifive Coreplex IP product page.

Categories: Hardware Tags: fpga, risc-v, sifive, soc