ARM TechCon 2015 has just started, and there have been a few announcements including the launch of a Cortex-A7 replacement with Cortex A35 providing 10% lower power consumption, 6 to 40% performance boost, and a better design flexibility making it suitable for SoC for smartphones to wearables.
The main specifications of Cortex A35 cores:
- Architecture ARMv8-A (AArch32 and AArch64 )
- Multicore 1-4x SMP within a single processor cluster, and multiple coherent SMP processor clusters through AMBA 5 CHI or AMBA 4 ACE technology
- ISA Support
- AArch32 for full backward compatibility with ARMv7
- AArch64 for 64-bit support and new architectural features
- TrustZone security technology
- NEON Advanced SIMD
- DSP & SIMD extensions
- VFPv4 Floating point
- Hardware virtualization support
- Debug & Trace CoreSight DK-A35
The new core can both be used in quad core configuration at 1 GHz for a smartphone (90 mW per core), or in single core configuration at 100 MHz for wearables (6 mW) in a 0.4mm2 silicon footprint.
Cortex-A35 also consumes about 33 percent less power per core, and occupies 25 percent less silicon area compared to Cortex-A53. Considering quad core Cortex A53 devices ship for less than $50 today, you can expect ultra low cost (and low power) smartphones, wearables, and set-top boxes by the end of 2016. Cortex A35 is also expecting in low-power servers and smart TVs.
Visit ARM Cortex A35 page for more details.
ARM is also addressing IoT security by bringing ARM TrustZone and stack limits to micro-controllers with ARMv8-M architecture.
Some of the key features of ARMv8-M include (new in bold):
- 32-bit architecture
- ARM Thumb-2 technology for excellent code density
- ‘C’ friendly exception model
- Protected memory system support for real-time operating system use
- Real time deterministic interrupt response
- Adds fast, low overhead hardware based security extensions with ARM TrustZone for ARMv8-M
- Enhances debug and trace with more flexible breakpoints and watchpoints
- Improves productivity by making it easier to scale solutions from the smallest to the most performant
- Makes it easier to protect code with a simpler to program memory protection unit.
There will be two variants with ARMv8-M Baseline and ARMv8-M Mainline, with the latter adding optional DSP and FPU, more instructions, etc…
Charbax is at the conference and did a good job at filming Mike Muller, ARM CTO, keynote, where he unveiled both Cortex A35 and ARMv8-M, beside addressing imprinted circuits, ARM servers (arm.com is now running on those), weak security for IoT applications, CryptoCell 700 series for Cortex A processors, Cryptocell 300 series for ARMv8-M, and mbed OS 3.0. He concludes with the new industry equation: (trust x perf)/(energy x $) to emphasize the importance of security.
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