J-core J2 is an open source processor and SoC design implemented in VHDL, and using SH2 instruction set found in some Renesas (previously Hitachi) micro-controllers. The code available royalty free under a BSD license, and it’s also patent-free since all SH2 related patents expired expired in October 2014. The developers used to run the code on Xilinx Spartan 6 based Numato Mimas v2 board since it was cheap ($50) and mostly did the job. “Mostly”, because it still lacked Ethernet, capability for SMP and the serial port was slow, so they decided to design their own Turtle Board to address those issues.
- FPGA – Xilinx Spartan 6 LS25 or LS45 FPGA
- MCU – 8-bit Atmel MCU for load/update flash at power on.
- Storage – micro SD slot, 8MB SPI flash
- System memory – 256 MB RAM
- Video & Audio Output – HDMI and AV jack
- Connectivity – Ethernet
- USB – 4x USB 2.0 ports
- Expansion – 40-pin Raspberry Pi compatible header
- Power Supply – 5V via micro USB port
- Dimensions – Raspberry Pi 2/3 form factor
There are very few details about the board, and J-Core Project’s twitter account has not been very active recently. However, they showcased Turtle Board at ELC 2017 last month, so the project is still very alive.
Based on the slide above, the board will start shipping in May 2017, and I could not find a link to pre-order them. They have a dedicated (currently parked) domain @ turtleplatform.com, so it could eventually be announced there, or via a Kickstarter campaign. Patents for newer SH3 and SH4 cores have recently expired too, and J-Core Roadmap includes plans for J3 (SH3+MMU+FPU) in 2017 and J4 (SH4 64bit – Used in SEGA Dreamcast) in 2018. If you want to know more about J-Core implementation, you may want to check out ELC 2016 presentation, and/or subscribe to J-Core mailing list.
Thanks to Leon for the ELC 2017 picture.