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Posted on by Debashis Das - No Comments on High-end 25MP global shutter camera with 10GbE interface is designed for NVIDIA Holoscan platform

High-end 25MP global shutter camera with 10GbE interface is designed for NVIDIA Holoscan platform

Leopardimaging LI-IMX530-10GigE-NL 10GigE Global Shutter IMX530 camera with Holoscan based solution

Leopard Imaging LI-IMX530-10GigE-NL is a high-end 25MP global shutter camera designed specifically for the NVIDIA Holoscan edge AI platform. The camera utilizes a 10GbE interface for high-bandwidth, low-latency data transmission, making it suitable for gesture recognition, iris scanning, head roll, and eye tracking. At the core of the camera module is the Sony IMX530, a 1.2-inch CMOS sensor with 5328 × 4608 resolution and a 2.74 μm pixel size. The sensor data is handled by a Lattice CertusPro-NX FPGA, and a Marvell 10GbE PHY takes care of high-bandwidth data transfer to GPU systems. The camera supports NVIDIA Jetson AGX Orin, IGX Orin, and Thor platforms. LI-IMX530-10GigE-NL specifications: FPGA – Lattice CertusPro-NX FPGA 52K to 96K logic cells 7.3 Mb total embedded memory External LPDDR4 memory support Up to 156x (18 x 18) multipliers within sysDSP blocks for AI/ML workloads 10 Gigabit Ethernet PCS blocks Image sensor Sony IMX530 Diagonal 19.3 mm […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 7 Comments on AERIS-10 open-source hardware radar can track multiple objects up to 20km away

AERIS-10 open-source hardware radar can track multiple objects up to 20km away

AERIS-10 open-source hardware radar

AERIS-10 is an open-source hardware, “low-cost” (more on that later) 10.5 GHz phased array radar system featuring Pulse Linear Frequency Modulated (LFM) modulation and based on an AMD Artix-7 FPGA. Two versions are available: the AERIS-10N (Nexus), providing up to 3km range with an 8×16 patch antenna array, and the AERIS-10X (Extended), offering up to 20km range thanks to a 32×16 dielectric-filled slotted waveguide array. ARIES-10 key components and features: Main board FPGA – AMD Artix-7 XC7A100T for: PLFM Chirps generation via the DAC Raw ADC data read Automatic Gain Control (AGC) I/Q Baseband Down-Conversion Decimation Filtering Forward FFT Pulse Compression Doppler, MTI, and CFAR processing USB Interface MCU – ST STM32F746xx microcontroller for Power management FPGA communication Setup and interface with the components on the main, frequency synthesizer, and power amplifier boards, plus: GPS module for GUI map centering GY-85 IMU for pitch/roll correction of target coordinates BMP180 Barometer […]

Posted on by Debashis Das - No Comments on AMD VEK385 Versal AI Edge Gen 2 FPGA evaluation kit plugs directly into a PCIe Gen5/Gen4 slot

AMD VEK385 Versal AI Edge Gen 2 FPGA evaluation kit plugs directly into a PCIe Gen5/Gen4 slot

VEK385 Evaluation Kit with AMD Versal AI Edge Series Gen 2 XC2VE3858 adaptive SoC

AMD has introduced the VEK385 Evaluation Kit built around the Versal AI Edge Gen 2 XC2VE3858 SoC FPGA, which combines eight Cortex-A78AE cores, ten Cortex-R52 cores, FPGA fabric with 543,104 LUTs, 144 AI Engine-ML v2 tiles (up to 184 INT8 TOPS), 2,064 DSPs, a Mali-G78AE GPU, and an integrated ISP. The kit features 20 GB of LPDDR5X memory, a PCIe x8 edge connector supporting Gen5 x4 and Gen3/4 x8, and two HDMI 2.1 RX/TX ports for video. There is also an SFP28 port for 25–100 Gb/s Ethernet, and CAN-FD alongside PL/PS Ethernet for deterministic control applications. The board is designed to accelerate prototyping for automotive (ADAS, autonomous driving), industrial (AMR, edge AI boxes), healthcare (ultrasound, endoscopy, 3D imaging), and aerospace-grade systems. VEK385 Evaluation Kit specifications Adaptive SoC – AMD Versal AI Edge Series Gen 2 XC2VE3858-2MSESSVA2112 heterogeneous adaptive SoC CPU – 8x Arm Cortex-A78AE application cores Real-time – 10x Arm Cortex-R52 […]

Posted on by Debashis Das - 16 Comments on xSDR – A tiny M.2 2230 SDR module with Artix-7 FPGA and LMS7002M RFIC (Crowdfunding)

xSDR – A tiny M.2 2230 SDR module with Artix-7 FPGA and LMS7002M RFIC (Crowdfunding)

xSDR single sided M.2 software defined radio with 2× RX TX channels up to 3.8 GHz

Wavelet Lab’s xSDR is a tiny, single-sided M.2 2230 software-defined radio (SDR) module designed for integration into laptops, embedded systems, and edge computing devices. A successor to the company’s previous uSDR, the “x” in xSDR stands for “extended,” adding 2×2 MIMO support and a wider frequency range to the same tiny footprint. The module is built around the Lime Microsystems LMS7002M RFIC and an AMD Artix-7 XC7A50T FPGA as found in the LimeNET Micro 2.0 Developer Edition board. This combination allows for a tuning range of 30 MHz to 3.8 GHz and a sample rate of up to 122.88 MSPS, making this SDR suitable for cellular research (LTE/5G), spectrum analysis, satellite tracking, and high-speed data links (with two modules). Wavelet Lab’s xSDR specifications: RFIC – Lime Microsystems LMS7002M programmable RF (FPRF) transceiver IC FPGA – AMD Embedded XC7A50T (Artix-7) with 52,160 logic cells RF capabilities Channels – 2×2 MIMO (2x […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 1 Comment on AMD Kintex UltraScale+ Gen 2 mid-range FPGA family to be available until at least 2045

AMD Kintex UltraScale+ Gen 2 mid-range FPGA family to be available until at least 2045

AMD Kintex UltraScale+ Gen 2

AMD Kintex UltraScale+ Gen 2 is a mid-range FPGA family designed for the broadcast, test, industrial, and medical markets, which provides an update to the Spartan UltraScale+ FPGA family introduced in 2024, and promises availability until at least 2045. Key features include high-speed transceivers and PCIe Gen4 for support of 4K AV-over-IP, multi-stream capture, and frame-accurate transport, increased memory bandwidth for semiconductor test and inspection systems, and advanced imaging and real-time control for machine vision, industrial automation, medical imaging, and robotic systems. AMD Kintec UltraScale+ Gen2 key features AMD says the Kintex UltraScale+ Gen 2 devices deliver up to 5x increase in memory bandwidth when comparing the AMD Kintex UltraScale+ Gen 2 XC2KU040P and XC2KU050P FPGAs to the previous generation Kintex UltraScale+ FPGA, and up to 2x higher channel density per PCIe interface compared to the Altera Agilex A5EC065A FPGA. The company further states that compared to “competing platforms”, the family delivers […]

Posted on by Debashis Das - 1 Comment on AMD Embedded+ mini-ITX Board features Ryzen AI Embedded P132 CPU, Versal AI Edge Gen2 VE3558 SoC FPGA

AMD Embedded+ mini-ITX Board features Ryzen AI Embedded P132 CPU, Versal AI Edge Gen2 VE3558 SoC FPGA

SAPPHIRE EDGE+ VPR 7P132, a Mini ITX AMD Embedded+

At CES 2026, Sapphire Technology introduced the EDGE+VPR-7P132, an “AMD Embedded+” Mini-ITX motherboard built around AMD’s newly announced Ryzen AI Embedded P100 series of SoCs, namely the hexa-core Ryzen P132 (V4526iX) CPU, and an AMD Versal AI Edge Gen 2 VE3558 SoC FPGA, which features octa-core Arm Cortex-A78AE + ten Cortex-R52 real-time cores beyond FPGA fabric. It’s the first AMD Ryzen AI Embedded motherboard we’ve seen. It represents a massive update from last year’s Edge+ VPR-5050 motherboard, which relied on Zen 2-based Ryzen Embedded V2000 series and first-generation Versal silicon. The new VPR-7P132 skips multiple generations, jumping straight to Zen 5 CPU cores and RDNA 3.5 graphics, with an upgraded Versal Gen 2 adaptive Edge AI SoC for real-time inference, along with faster LPDDR5 (4266MHz) memory and 40 Gbps USB4 connectivity. SapphireTech EDGE+ VPR-7P132-MB specifications: AMD Embedded+ Architecture Adaptive SoC Subsystem Adaptive SoC – AMD Versal AI Edge Gen 2 […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 2 Comments on Lattice Semi MachXO4 FPGA family offers up to 9400 LUTs, 448 kb user flash, improved “hot socketing”

Lattice Semi MachXO4 FPGA family offers up to 9400 LUTs, 448 kb user flash, improved “hot socketing”

MachXO4 development board

Lattice Semiconductor has recently launched the MachXO4 low-power FPGA family featuring 896 to 9400 LUTs, fabric performance of up to 150 MHz, and improved “hot socketing” with a low leakage current of 350 μA. Other features include up to 432 kb embedded RAM, 73 kb distributed RAM, 448 kb User Flash Memory (UFM), up to 382 I/Os, hardened SPI and I2C interfaces, a wide range of packages from 2.5×2.5mm to 20 x 20 mm, and three temperature grades (consumer, industrial, and automotive). Lattice Semi MachXO4 key features and specifications: FPGA Fabric 896 to 9400 LUTs 1,100 to 11,300 logic cells Up to 150 MHz operation Memory Embedded RAM – 64 kb to 432 kb Distributed RAM – 10 kb to 73 kb Storage – 64 to 448 kb User Flash Memory (UFM) I/O and peripherals Up to 382 I/O pins 1x Phased Lock Loop (PLL) Hardened functions: SPI, 2x I2C, […]

Posted on by Jean-Luc Aufranc (CNXSoft) - 8 Comments on Linux 6.18 LTS release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 6.18 LTS release – Main changes, Arm, RISC-V, and MIPS architectures

Linux 6.18

Linus Torvalds has just announced the release of Linux 6.18 on the Linux Kernel Mailing List (LKML), which will likely become the next LTS kernel [update: it’s now official]: So I’ll have to admit that I’d have been happier with slightly less bugfixing noise in this last week of the release, but while there’s a few more fixes than I would hope for, there was nothing that made me feel like this needs more time to cook. So 6.18 is tagged and pushed out. Most of the last-minute fixes are minor fixes to drivers, with some random noise elsewhere (bluetooth, ceph, afs..). Nothing strikes me as standing out, but hey, there’s a shortlog appended if you want to see the details. And this obviously means that the merge window will open tomorrow, and I already have three dozen pull requests pending. Thanks. And as I already mentioned a couple of […]