BayLibre TPMP Lowers the Cost and Time of PVT Characterization

If you don’t quite understand the title of this post, don’t worry that’s normal! So let me explains. TPMP stands for Thermo-regulated Power Measurement Platform, and PVT (Power, Voltage, Temperature) characterization is  a step in semiconductor manufacturing that involves testing wafers with various voltages, clock frequencies, and temperatures – known as Operating Performance Points (OPP) – to see how the properties of the wafer change.

The equipment required to perform this characterization is usually very expensive, and the process takes time. So BayLibre was tasked by one of their customers to automate the process, and find a lower cost solution. That’s how BayLibre TPMP came to life.

BayLibre TPMP
Click to Enlarge

The TPMP is comprised of six main hardware components in order to measure NXP i.MX8 processor die-temperature:

The TEC-1091 chip controls both the Peltier element and the fan to heat or cool the die to the specified temperature. The system supports temperature from 12°C to 115°C, however there’s a delta between the measured and actual die temperature of about 2°C for low-temperature ranges and 8°C for high-temperature ranges due to thermal resistance. That means the system’s chip external sensor must be calibrated before measurement to adjust for this delta in software.

It takes between 5 and 10 minutes to ramp from 25°C (ambient room temperature) to 115°C and stabilize at this temperature. The software is written in Python3, and should be easy to integrate in an automation suite. BayLibre mentions the source code can be retrieved with Git:


But I get the following error while running the command:


The script enable the user to set the die temperature, launch tests and save the results, and includes post-processing tools to analyze test results.

It’s what the output would look like when setting the die temperature to 30℃:


The Peltier element temperature overshoots to 34°C before stabilizing at around 30°C.

The solution is said to cost around ten times less to build than standard equipment, and it’s easier and faster to use, as you can run hundreds of test scripts with different power, temperature and voltage values within two hours. Doing the same thing manually may take a full day.

Eventually support for TPMP may be integrated into KernelCI project. You’ll find more details on BayLibre blog post.

Share this:
FacebookTwitterHacker NewsSlashdotRedditLinkedInPinterestFlipboardMeWeLineEmailShare

Support CNX Software! Donate via cryptocurrencies, become a Patron on Patreon, or purchase goods on Amazon or Aliexpress

ROCK Pi 4C Plus

10 Replies to “BayLibre TPMP Lowers the Cost and Time of PVT Characterization”

  1. Where is Tkaiser 🙂 ? Thermal regulation is a game changer on those SBC’s. Just look at the RaspberryPi where the thermal regulation is controlled by an obscure ThreadX binary blob, and your CPU is only running at half the speed 🙂

    1. > Thermal regulation is a game changer on those SBC’s

      Clearly not. The Foundation “outdoes” itself with each new thermal design*, and yet they’re wildly successful compared to those wanna-be-Pi losers wasting time and money (no matter how little — any time or money > 0 is a waste) on such worthless automation as the one subject to this article. So I don’t know why Jean-Luc wastes the time of cnx readers with this Foundation-disproven pseudo-engineering /s

      * RPi4 idling at 60C (post fix) at 27C amb is worthy of the Guiness book.

    2. >thermal regulation is controlled by an obscure ThreadX binary blob,

      I’m not totally sure that’s a bad thing. Seems a bit better than some random code written by an intern running on an invisible 8051 somewhere in the chip that has a port to main memory and io.

      1. > some random code written by an intern running on an invisible 8051 somewhere in the chip that has a port to main memory and io

        Aren’t we talking about this exactly? ThreadX doesn’t run on an 8051 but on the two VideoCore CPU cores…

        1. >Aren’t we talking about this exactly?

          Not really. You know the videocore cores are there. That’s better than the only hint of a pm core being hidden somewhere being a random mention of an interrupt for it in some header file.

          >ThreadX doesn’t run on an 8051 but on the two VideoCore CPU cores…

          ThreadX is documented, has support for some limited memory protection, presumably pretty battle hardened[0] and so on. If I have to have something that has unfettered access to everything I’d prefer it had the potential to be implemented properly at least.

          0 – It’s in the ex-broadcom now-cypress WICED IoT platform and maybe broadcom wifi firmware, Marvell’s wifi firmware

  2. When you have a random chip with just some crappy vendor code to work from knowing what to use for the opp table for cpufreq is a guess really. This could help make some less than stable boards better.

  3. Not really. When you have an irregular chip with simply some bad seller code to work from realizing what to use for the opp table for cpufreq is an estimate truly.

Leave a Reply

Your email address will not be published. Required fields are marked *

Khadas VIM4 SBC
Khadas VIM4 SBC